Skip to the content
PCBKitNew board
4 layers64 × 88.6 mmSF500, the printed circuit board in 3D

Spitfire 500, A low-end 14 MHz Accelerator with IDE and 4/8 MB fast RAM for the Amiga 500.

Size
64 × 88.6 mm
Copper layers
4
Thickness
1.6 mm
Parts
52
Nets
152
Pads
600
Tracks, vias
2,150, 218
Pours
7
Routed
Yes
KiCad
KiCad 5 (file 20171130)
Created
26 Apr 2021
Updated
4 Feb 2022

Overview

SF500 is an open-source printed circuit board by jbilander, from the jbilander/SF500 repository on GitHub, published under the CC-BY-SA-4.0 licence. It is a 4-layer board of 64 × 88.6 mm with 52 parts on 152 nets, routed with 2,150 tracks and 218 vias.

It is built around the 74HCT2G14GW, LM1117-3.3 and NB3N502D. Its parts include 17 capacitors, 16 resistors, 11 ICs, 3 connectors and 1 switch. It belongs with the FPGA and CPLD boards of this library.

Main components

3

README

README.md

SF500

Spitfire 500, A low-end 14 MHz Accelerator with IDE and 4/8 MB fast RAM for the Amiga 500.


Heavily inspired by Matthias Heinrichs' CDTV-RAM-IDE board. Many thanks to Matze for sharing his work and letting me open source this project.

https://gitlab.com/MHeinrichs/CDTV-RAM-IDE/

Please note, if you are going to build boards and sell for profit, you will need a consent from Matthias and also from Oliver Kastl if you are going to bundle this software http://aminet.net/package/disk/misc/oktapus with the hardware (ROM-chip).


text
Board is four layers:

signal (with 3V3-zone)
power plane (GND)
power plane (VCC)
signal

Rev. 1B installed in an A500. The 7/14 MHz switch can be easily accessed if hanging out the sidecar port opening of the A500 case. This switch can also be switched while the machine is running.



Videos:

https://drive.google.com/file/d/1c2K9_kcEqxMMBJBd1aELfbt1fV5XXoU6/view?usp=sharing

SysInfo tests running oktagon.device on WB 1.3 on KS 1.3:
https://drive.google.com/file/d/1rewl8bivpIMPoLze_-Y7_mGYqzTiX6ET/view?usp=sharing

Cold boot running oktagon.device and WB 1.3 on KS 1.3:
https://drive.google.com/file/d/1MFdxnaCo8lNMqMQ6eJMtNUMSsBB8mtb-/view?usp=sharing

Cold boot running scsi.device v109.3 (oktapussy) and ClassicWB 3.1 (with 1.3 theme) on KS 3.1:
https://drive.google.com/file/d/1IrmWWG6SJgc65BBj8jGnHebKbp6LAcYa/view?usp=sharing


The CPU and the speed-select switch clears the A500 keyboard nicely when installed. Also the CF- or SD-card adapter clears the ROM-chip nicely.



Performance

14 MHz and JP3 Open (scsi.device v109.3):



14 MHz and JP3 Closed (oktagon.device v6.10):


Keep in mind Kickstart 1.3 does not have FFS (Fast File System) in ROM, so in order to use FFS with 1.3 make a small boot-partition (e.g. ~200 MB) and format it DOS\1, not International (DOS\3) or DirCache (DOS\5), and not OFS (DOS\0). For KS 3.1 I would format it FFS International (DOS\3) or perhaps use PFS3.

https://en.wikipedia.org/wiki/Amiga_Fast_File_System

Also, do not forget to set the MaxTransfer to 0x1fe00 and hit Enter button after typing, then save the setting. This applies to all versions except the new KS 3.2



Disk's partition and filesystem information should now be stored in the RDB (Rigid Disk Block) for autoboot to work under WB 1.3 with oktagon.device. To install WB 1.3: Copy all content of the WB 1.3 floppy to the newly formatted Drive.

How to Build:

The ROM image to burn to the AM29F040B-70JC chip can be downloaded from here:
https://gitlab.com/MHeinrichs/CDTV-RAM-IDE/-/blob/master/Prog/ATOKTACOMBINED.rom-512.bin

The 64 KB ROM under Releases is a combined ROM I made with the instructions from the textfile EPROM-Hack_english.txt in this repo (also available in German). It is 060-compatible too, not that it makes any difference for this accelerator that uses a 68000 or 68010 CPU.

Burning any of the two ROM:s above will work with this Accelerator (SF500).

The last version of the Oktagon2008 from BSC is 6.12 - but still reports as 6.10. As far as I know, only the boot code has changed to be compatible with the 68060. The actual driver is still 6.10.

Remember to Program the chip BEFORE you solder it down to the PCB. Do not byteswap if you are using a TL866II-Plus or similar programmer on Windows/Intel-arch, these parts are 8-bit so there is no concept of byte swapping.


Soldering: Start with all the surface mounts and then TH. I usually start with the Voltage regulator and verify the 3V3. Then the CPLD and verify JTAG-connection, doing a boundary scan with ISE-Impact. No need to solder a pin header to the JTAG connector on the PCB, just hold the connector in position and press gently. It should also be possible to use a Raspberry Pi and the program xc3sprog. Optionally you can put 10k or 4.7k pull-ups on R10-R12 (TMS,TDI,TCK) if you have problems connecting to the CPLD, those are 3V3 pull-ups so shouldn't damage anything using GPIO from a RPi. VCC is +5V and can be supplied through a typical usb phone-charger or similar, check polarity BEFORE you plug it in.




Using some kapton tape can help to hold the chip in place while tacking it down to get everything aligned properly. For the ROM-chip I pre-tin the pads and then use hot air rework station to solder it in place.




When all the surface mount components are done it's time for the TH-pins. I use an old 68k CPU as a jig and a piece of pin strip on the other side to align the pins while soldering them in position. Press ontop the CPU somewhat at the same time when soldering for a great result.



I used a 1.2mm thick PCB as a spacer while soldering the 44-pin IDE connector in place. This because it'll clear the Kickstart ROM chip better if the connector and hence the adapter is positioned a little higher up. The 44-pinout on the PCB is deliberately flipped/designed so that you can plug the CF or SD-adapter directly to the angled-connector the "right" way, no ribbon cable and no buffering is used.




The final result. The mini-slide switch can optionally be soldered directly to the PCB if you prefer it that way. Only two pins are actually used, it's a normal two pin jumper with default pull-up, the third pin/hole is not connected and is only there to allow for soldering the mini-slide switch directly onto the PCB.



Programming can now be done either this way...




...or like in picture below...it requires the Amiga PSU to be turned ON to provide +5V to the Accelerator, do not connect any external +5V here:



Jumpers:

text
/CFGIN = This jumper is to activate autoconfig (active low with 1k pull-down resistor R3). No jumper here means no RAM nor IDE will be autoconfigured. 
SW1 = CPU speed toggle between 7 or 14 MHz, default 10k pull-up means 14 MHz
JP2 = Selects between 4 or 8 MB fast ram autoconfig, 8 MB requires U7,U8 populated too.
JP3 = Selects between IDE driver oktagon.device or scsi.device_v109.3 (oktapussy)
JP4 = Selects between Autoboot or Not, jumper Closed means autoconfigure will not load the ROM-vector (the JP3-selected driver).

Synthesis Summary:

Zipped JED-file (main_top.jed) available under Releases

New firmware released 2021-12-22 that supports DMA from A590, available under Releases


SF500 and A590

With the updated firmware it's now possible to use an A590 (on the A500 expansion edge) togheter with a SF500.
You will need to solder/connect a jumper-wire from the CFGOUT-goldfinger-pad and run it to the CFGIN-pin on the SF500. This will asure that there will be no conflict during AutoConfig cycles. They will be daisy-chained meaning the A590 configures first and the SF500 is second in line.


Having the A590 jumper set to enable onboard memory (2MB in picures below) is not optimal in this case since that memory will automatically be used first by the system. You will have to set the jumper (JP2) to ON (4MB) on the SF500 in this scenario but as you can see only 0.84 mips here:


In this case it's much better to set the A590 jumper to Amnesia and hence "only" use the 4MB or 8MB from the SF500. Don't worry the A590 can then DMA (Direct Memory Access) into that memory:



With the SF500 set to Amnesia we get the full performance at 14 MHz and we can use the Hard Drive in the A590 either to boot from or just as a second harddrive for storage or backup (this depends on boot prio setting). Both the Oktagon.device and the Oktapussy scsi.device can co-exist with the A590 driver. As you can see the oktapussy driver takes the name 2nd scsi device here:




Changing boot priority in HDToolBox let us select which drive to boot from. Please note, I used prio 10 here but if you still want the DF0 floppy drive as the first device (you probably will) then you can't put in a number above 5. Keep it below 5 since DF0 has boot priority 5 by default, this was just for testing, remember to press Enter after entering the new value in the box and then hit the Save Changes to Drive button before you do a reboot.


A short video showing boot from A590 in Amnesia mode and copying a 2.2 MB file from the SF500 IDE drive to the A590 XT drive.

https://drive.google.com/file/d/1oLW0H9GmMaRv7rbYKLQVwRg4RvrDyU3E/view?usp=sharing

Here a short video booting from the SF500 IDE drive (with higher boot prio set) than the A590 (still in Amnesia mode). The A590 harddrive is automatically mounted and available to the system after startup:

https://drive.google.com/file/d/13qs9DawRrVdHNif9vCZlh3xlq8YgDj_f/view?usp=sharing


BOM Rev. 1B

PositionName/ValuePackageNotes
U164Pcs socket pins for Round Plug 0.5mm Diameter100PcsIC Leads Receptacle, gold or nickel plated, used as TH Pin Header. https://www.aliexpress.com/item/1005002830101899.html
U2CPU Socket, 2 x 32 Female Pin Header 2.54mm pitch2 x Single Row 40PinRound Female Pin Header gold or nickel plated machined pins.
U3Voltage Regulator 3.3V, LM1117-3.3 or AMS1117-3.3SOT-2233.3V 1A Low Drop-Out (LDO) Voltage regulator.
U4NB3N502 - 14 MHz to 190 MHz PLL Clock MultiplierSOIC-8PLL with CLKOUT and at the same time output the input aligned reference clock signal (REF).
U5-U62 x CY62167G-45ZXI or 2 x CY62167ELL-45ZXI48-pin TSOP-I configurable as 1M × 16 or 2M × 8 SRAMFirst 4 MB. Cost $3 / Pcs from here https://www.aliexpress.com/item/1005003256658439.html (verified ok)
U7-U82 x CY62167G-45ZXI or 2 x CY62167ELL-45ZXI(Optional) Second 4 MB.
U9XC95144XL-TQ100TQFP-100_14x14mm_P0.5mmIC Xilinx CPLD 144MC 10NS 100TQFP, XC95144XL-10TQG100C
U1029F040 or 29F010PLCC-32_11.4x14.0mm_P1.27mme.g. AM29F040B-70JC or AS29CF010-55CCIN
U1174HCT2G14TSOP-6Dual inverting Schmitt trigger
R110k1206/VPA Pull-up resistor
R210k1206JP2 Pull-up resistor (P74)
R31k1206/CFGIN Pull-down resistor (P70)
R433 Ohm or 0 Ohm1206(Optional) /CFGOUT series resistor (P68)
R510k1206JP3 Pull-up resistor (Line A15 ROM)
R64.7k1206IDE_IORDY Pull-up resistor (P12)
R71k1206IDE_IRQ Pull-down resistor (P27)
R84.7k1206/AS_CPU Pull-up resistor (P79)
R91k1206/DTACK_CPU Pull-up resistor (P13)
R104.7k or 10k0805(Optional) TMS 3.3V Pull-up resistor (P47)
R114.7k or 10k0805(Optional) TDI 3.3V Pull-up resistor (P45)
R124.7k or 10k0805(Optional) TCK 3.3V Pull-up resistor (P48)
R1310k0805SW1 Pull-up resistor debounce circuit (P76)
R1410k0805resistor in (RC) debounce circuit
R1510k1206JP4 Pull-up (P67)
R164.7k or 10k0805(Optional) CFGIN Pull-up (P70)
C110uF1206capacitor for Voltage regulator
C210uF1206capacitor for Voltage regulator
C30.1uF = 100nF0805capacitor for Voltage regulator
C40.1uF = 100nF0805decoupling capacitor for U4 (PLL)
C5-C60.1uF = 100nF0805decoupling capacitors for U5-U6 (first 2 x SRAM)
C7-C80.1uF = 100nF0805decoupling capacitors for U7-U8 (if populated, second 2 x SRAM)
C9-C120.1uF = 100nF0805decoupling capacitors for U9 (CPLD)
C1310uF1206capacitor for VCC-pin
C1410uF1206capacitor for IDE VCC-pin
C150.1uF = 100nF0805decoupling capacitor for U10 (ROM)
C160.1uF = 100nF0805capacitor in (RC) debounce circuit (SW1)
C170.1uF = 100nF0805decoupling capacitor for U11 (Schmitt trigger inverter)
J1JTAG Pin Header 2.54mm pitchSingle row 6pin(Optional) Pressing JTAG-header pins against holes while programming is enough.
J2External Pin Header 2.54mm pitchSingle row 5pin angled or straight2.54mm Jumper on CFGIN-pin needed for enable Autoconfig unless daisy chained.
SW1 (J3)3Pin Header 2.54mm pitchSingle row 3pinPin header with jumper select 7/14MHz or On-Off mini slide switch SS12D00 3pin 1P2T 2 Position toggle switch. Handle length: 3mm-6mm
J42.0mm Pitch Right Angle IDE-socketDouble Row (2 x 22) Female 44pin header socket2 x 25 or 2 x 40, pull pin 45, 46 using a plier and cut with a hacksaw = Pin header 2 x 22. https://www.aliexpress.com/item/4001286548060.html

Happy Hackin'


CC BY-SA 4.0

This work is licensed under a Creative Commons Attribution-ShareAlike 4.0 International License.

CC BY-SA 4.0

Parts

52
QtyValueFootprintReferences
120.1uFCapacitor_SMD:C_0805_2012Metric_Pad1.15x1.40mm_HandSolderC3, C5, C6, C7, C8, C9, C10, C11, C12, C15, C16, C17
410kResistor_SMD:R_1206_3216Metric_Pad1.42x1.75mm_HandSolderR1, R2, R5, R15
410uFCapacitor_SMD:C_1206_3216Metric_Pad1.42x1.75mm_HandSolderC1, C2, C13, C14
4CY62167G-48TSOP-IPackage_SO:TSOP-I-48_18.4x12mm_P0.5mmU5, U6, U7, U8
310kResistor_SMD:R_0805_2012Metric_Pad1.15x1.40mm_HandSolderR13, R14, R16
31kResistor_SMD:R_1206_3216Metric_Pad1.42x1.75mm_HandSolderR3, R7, R9
34.7kResistor_SMD:R_0805_2012Metric_Pad1.15x1.40mm_HandSolderR10, R11, R12
3Jumper_2_OpenConnector_PinHeader_2.54mm:PinHeader_1x02_P2.54mm_VerticalJP2, JP3, JP4
24.7kResistor_SMD:R_1206_3216Metric_Pad1.42x1.75mm_HandSolderR6, R8
1100nFCapacitor_SMD:C_0805_2012Metric_Pad1.15x1.40mm_HandSolderC4
129F040-PLCC-32Package_LCC:PLCC-32_11.4x14.0mm_P1.27mmU10
133Resistor_SMD:R_1206_3216Metric_Pad1.42x1.75mm_HandSolderR4
168000D_CPU_socketPackage_DIP:DIP-64_W22.86mm_LongPadsU2
168000D_MB_socketSF500:DIP-64_W22.86mm_LongPadsU1
174HCT2G14Package_SO:TSOP-6_1.65x3.05mm_P0.95mmU11
1Conn_01x05Connector_PinHeader_2.54mm:PinHeader_1x05_P2.54mm_HorizontalJ2
1Conn_01x06Connector_PinHeader_2.54mm:PinHeader_1x06_P2.54mm_VerticalJ1
1LM1117-3.3Package_TO_SOT_SMD:SOT-223U3
1NB3N502Package_SO:SOIC-8_3.9x4.9mm_P1.27mmU4
1SW_SPDTConnector_PinHeader_2.54mm:PinHeader_1x03_P2.54mm_VerticalSW1
1XC95144XL-TQ100Package_QFP:TQFP-100_14x14mm_P0.5mmU9
1ide_ata_44_pinConnector_PinSocket_2.00mm:PinSocket_2x22_P2.00mm_HorizontalJ4

The 51 most common of 52 parts.

Questions

How big is the SF500 PCB?

It measures 64 × 88.6 mm and has 4 copper layers, 1.6 mm thick.

What parts does the SF500 use?

52 parts, built around the 74HCT2G14GW, LM1117-3.3 and NB3N502D. The full list of its parts is on this page, with links to each part's symbol and footprint where PCBKit's library has them.

Where can I download the SF500 KiCad files?

From the jbilander/SF500 repository on GitHub, at the commit this page was made from: the board is KiCad/SF500.kicad_pcb. PCBKit opens the board in the browser, with nothing to install.

Can I use the SF500 design in my own project?

Its repository publishes it under the CC-BY-SA-4.0 licence: you may reuse it on that licence's terms (keep the author's notice, and for a copyleft licence share your changes alike).

Similar boards

  • 4 layers165 × 142.5 mmTestboard, the printed circuit board in 3D

    Testboard

    anthonydotmoe/68040pc

    A general purpose computer platform for retrocomputing enthusiasts

    175 parts9
  • 4 layers34.6 × 25 mmAmiga DB23 video adapter, the printed circuit board in 3D

    Amiga DB23 video adapter

    jbilander/Amiga_DB23_video_adapter

    A PCB for creating Amiga SCART or Amiga VGA cables. You can also use this adapter to feed a new clock to the Amiga via XCLK making your machine true PAL/NTSC switchable

    32 parts42CC-BY-SA-4.0
  • 2 layers25.4 × 18 mmA500 IDE LED board, the printed circuit board in 3D

    A500 IDE LED board

    jbilander/A500_IDE_LED_board

    Amiga 500 Floppy LED to also Display IDE Activity

    10 parts16CC-BY-SA-4.0
  • 2 layers45 × 15 mmA1200 IDE LED fix board, the printed circuit board in 3D

    A1200 IDE LED fix board

    jbilander/A1200_IDE_LED_fix_board

    A small PCB that fixes the IDE Activity LED always lit problem on the A1200.

    6 parts5CC-BY-SA-4.0
  • 4 layers60.5 × 60 mmAmiga RGB video splitter, the printed circuit board in 3D

    Amiga RGB video splitter

    jbilander/Amiga_RGB_video_splitter

    Extend your amiga RGB video signal to two display units - screens, monitors, etc, simultaneously

    36 parts4CC-BY-SA-4.0
  • 2 layers33.7 × 97.8 mmHAN ESP TSS721, the printed circuit board in 3D

    HAN ESP TSS721

    UtilitechAS/amsreader-firmware

    ESP8266 and ESP32 compatible firmware to read, interpret and publish data to MQTT from smart electrical meters, both DLMS and DSMR is supported

    29 parts470
  • 2 layers52.5 × 36.6 mmESP8266-WebRadio, the printed circuit board in 3D

    ESP8266-WebRadio

    karawin/Ka-Radio

    A wifi webradio with only low cost boards ESP8266 and VS1053 by Jp Cocatrix

    52 parts453
  • 2 layers95.2 × 57.2 mmDomesdayDuplicator, the printed circuit board in 3D

    DomesdayDuplicator

    Domesday86/DomesdayDuplicator

    High-speed LaserDisc RF sampler

    66 parts325GPL-3.0