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2 layers96.5 × 55 mmVera full audiojack, the printed circuit board in 3D

Vera full audiojack

ifilot/open-vera-module

VERA (Versatile Embedded Retro Adapter) is a self-contained FPGA video and audio module for retro-computing projects.

Size
96.5 × 55 mm
Copper layers
2
Thickness
1.6 mm
Parts
105
Nets
135
Pads
492
Tracks, vias
1,203, 245
Pours
623
Routed
Yes
KiCad
KiCad 10.0 (file 20260206)
Created
23 Aug 2026
Updated
28 Aug 2026

Overview

Vera full audiojack is an open-source printed circuit board by ifilot, from the ifilot/open-vera-module repository on GitHub, published under the MIT licence. It is a 2-layer board of 96.5 × 55 mm with 105 parts on 135 nets, routed with 1,203 tracks and 245 vias.

It is built around the ICE40UP5K-SG48ITR50, AP3417CKTR-G1 and THS7314D, with the W25Q16JVSNIQ, WM8524CGEDT and 74AHC00PW among its other parts. Its parts include 39 resistors, 32 capacitors, 10 ICs, 7 connectors and 1 inductor. It belongs with the FPGA and CPLD boards of this library.

Main components

11

README

README.md

VERA Module

FPGA firmware GUI installer Programmer builds Documentation pages Licensing

VERA (Versatile Embedded Retro Adapter) is a self-contained FPGA video and audio module for retro-computing projects. It provides tile and bitmap graphics, sprites, programmable audio, PCM playback, and SPI/SD-card access through a straightforward host interface.

This repository contains the hardware, FPGA design, host bridge, programmer, desktop GUI, and documentation needed to build and use the module.

[!NOTE] Upstream attribution and independence: Open VERA Module is a community-maintained fork of the original VERA Module created by Frank van den Hoef. It preserves the original project’s history and VERA compatibility goals, but is an independent project and is not affiliated with, endorsed by, or an official release of Frank van den Hoef or the original VERA project. See NOTICE and LICENSING.md for attribution and licensing details.

Highlights

  • Two tile-or-bitmap graphics layers
  • Up to 128 hardware sprites
  • 256-entry colour palette
  • PSG audio and PCM audio FIFO
  • SPI interface with SD-card support
  • Arduino Mega bridge and a Qt-based desktop test application

Repository layout

PathContents
pcb/KiCad hardware designs for the VERA module and accessories.
firmware/FPGA source and scripts for generating the flashable bitstream.
driver/src/vera_driver/Arduino Mega 2560 serial-to-VERA bridge firmware.
driver/gui/Qt desktop application for connecting to and testing a VERA module.
toolchain/programmer/RP2040 programmer firmware and command-line tooling.
docs/Sphinx documentation.

Quick start

FPGA firmware

The reproducible Docker build is the recommended way to generate a bitstream:

sh
bash firmware/build-docker.sh

The resulting flashable image is written to firmware/build/vera.bin. See the firmware README for local-toolchain builds and timing reports.

Arduino Mega bridge

The bridge exposes VERA over USB serial using an Arduino Mega 2560. Compile and upload it with arduino-cli:

sh
arduino-cli compile --fqbn arduino:avr:mega driver/src/vera_driver
arduino-cli upload --fqbn arduino:avr:mega --port <serial-port> driver/src/vera_driver

Consult the bridge documentation for the VERA bus pin mapping.

Desktop GUI

The GUI requires Qt 6 with the Widgets and SerialPort components. Configure and build it with CMake:

sh
cmake -S driver/gui -B driver/gui/build
cmake --build driver/gui/build --parallel

On launch, the application attempts to connect to a detected bridge automatically; closing it resets the connected VERA module. The Windows installer is also available from the GUI installer workflow.

Documentation

Project documentation lives in docs/. The published documentation is built by GitHub Actions; its current status is shown above. Start with docs/index.rst for the table of contents.

Contributing

Contributions and issue reports are welcome. Please keep changes focused, include relevant build or test results, and follow the guidance in CONTRIBUTING.md.

License

The project is licensed by component: maintained hardware designs are released under CERN-OHL-S-2.0 and maintained software under GPL-3.0-or-later. Historic upstream material remains MIT-licensed where marked. See LICENSING.md for the complete licence map and NOTICE for attributions.

Parts

105
QtyValueFootprintReferences
14100nFCapacitor_SMD:C_0603_1608MetricC1, C3, C4, C5, C6, C9, C10, C16, C17, C18, C19, C27, C33, C35
1047kResistor_SMD:R_0603_1608MetricR4, R5, R6, R7, R8, R9, R14, R16, R19, R20
9CAY16-1001F4LFResistor_SMD:R_Array_Convex_4x0603RN1, RN2, RN3, RN4, RN5, RN6, RN7, RN8, RN9
74.7uFCapacitor_SMD:C_0603_1608MetricC2, C7, C8, C11, C12, C22, C37
510uFCapacitor_SMD:C_0805_2012MetricC23, C24, C25, C26, C34
4MountingHoleMountingHole:MountingHole_3.2mm_M3H1, H2, H3, H4
31070Resistor_SMD:R_0603_1608MetricR24, R33, R40
310kResistor_SMD:R_0603_1608MetricR1, R2, R3
32150Resistor_SMD:R_0603_1608MetricR25, R35, R41
34300Resistor_SMD:R_0603_1608MetricR27, R38, R42
3536Resistor_SMD:R_0603_1608MetricR21, R31, R39
375Resistor_SMD:R_0603_1608MetricR22, R26, R30
21Resistor_SMD:R_0603_1608MetricR17, R18
21kResistor_SMD:R_0603_1608MetricR28, R36
22.7nFCapacitor_SMD:C_0603_1608MetricC13, C15
2470Resistor_SMD:R_0603_1608MetricR23, R32
2560Resistor_SMD:R_0603_1608MetricR13, R15
2820Resistor_SMD:R_0603_1608MetricR34, R37
10Resistor_SMD:R_0603_1608MetricR29
11nFCapacitor_SMD:C_0603_1608MetricC30
11uCapacitor_SMD:C_0603_1608MetricC14
11uFCapacitor_SMD:C_0603_1608MetricC21
12.2uFCapacitor_SMD:C_0603_1608MetricC20
174AHC00PWPackage_SO:TSSOP-14_4.4x5mm_P0.65mmU2
174CBTLV3126PW,118Package_SO:TSSOP-14_4.4x5mm_P0.65mmU4
174LVC4245APWPackage_SO:TSSOP-24_4.4x7.8mm_P0.65mmU5
1AP3417CKTR-G1Package_TO_SOT_SMD:SOT-23-5U9
1AudioJack3Connector_Audio:Jack_3.5mm_CUI_SJ1-3525N_HorizontalJ6
1BusConnector_PinHeader_2.54mm:PinHeader_2x12_P2.54mm_VerticalJ1
1Compositevera-module:RCJ-014J4
1Flash enableConnector_PinHeader_2.54mm:PinHeader_1x02_P2.54mm_VerticalJP1
1ICE40UP5K-SG48ITR50Package_DFN_QFN:QFN-48-1EP_7x7mm_P0.5mm_EP5.3x5.3mmU1
1MIC5504-3.3YM5Package_TO_SOT_SMD:SOT-23-5U10
1NRS4018T2R2MDGJInductor_SMD:L_Bourns-SRN4018L1
1ProgConnector_PinHeader_2.54mm:PinHeader_1x08_P2.54mm_VerticalJ2
1S-videovera-module:MD-40SJ9
1SD_Cardcomponents:CONN9_MSD-1_CUDJ3
1SG5032CAN_25.000000M-TJGA3Oscillator:Oscillator_SMD_SeikoEpson_SG8002LB-4Pin_5.0x3.2mmX1
1SN74CBTD3861PWRPackage_SO:TSSOP-24_4.4x7.8mm_P0.65mmU3
1THS7314DPackage_SO:SOIC-8_3.9x4.9mm_P1.27mmU11
1VGAvera-module:ICD15S13E4GV00LFJ5
1W25Q16JVSNIQPackage_SO:SOIC-8_3.9x4.9mm_P1.27mmU7
1WM8524CGEDTPackage_SO:TSSOP-16_4.4x5mm_P0.65mmU6

The 104 most common of 105 parts.

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Questions

How big is the Vera full audiojack PCB?

It measures 96.5 × 55 mm and has 2 copper layers, 1.6 mm thick.

What parts does the Vera full audiojack use?

105 parts, built around the ICE40UP5K-SG48ITR50, AP3417CKTR-G1, THS7314D and W25Q16JVSNIQ. The full list of its parts is on this page, with links to each part's symbol and footprint where PCBKit's library has them.

Where can I download the Vera full audiojack KiCad files?

From the ifilot/open-vera-module repository on GitHub, at the commit this page was made from: the board is pcb/vera-full-audiojack/vera-full-audiojack.kicad_pcb and its schematic pcb/vera-full-audiojack/vera-full-audiojack.kicad_sch. PCBKit opens the board in the browser, with nothing to install.

Can I use the Vera full audiojack design in my own project?

Its repository publishes it under the MIT licence: you may reuse it on that licence's terms (keep the author's notice, and for a copyleft licence share your changes alike).