Gwent hat

Gwent HAT — KiCad project

A Raspberry Pi 4 HAT carrier PCB for the Gwent Companion. Hosts headers and Qwiic connectors so the existing breakout modules (MFRC522, SSD1306 OLED, TCA9548A mux, three IS31FL3731 charlieplex matrices, PEC11 rotary encoder) plug in without re-soldering. Targets fabrication at JLCPCB.

Canonical hardware spec: design/tasks/011-hardware-specification.md. If anything in the schematic conflicts with that doc, the doc wins — fix the schematic.

Quick facts

Required tools

• KiCad 9.x — https://www.kicad.org/download/
• git with submodule support
• (optional) JLCPCB plugin for KiCad — https://github.com/Bouni/kicad-jlcpcb-tools — generates BOM and pick-and-place files in the format JLCPCB wants

Once KiCad is installed, open gwent-hat.kicad_pro and KiCad will pull in the project's symbol/footprint library tables (in sym-lib-table / fp-lib-table) which point at the vendored libs in libs/.

First-time setup

cd hardware/pcb
open gwent-hat.kicad_pro          # macOS
# or
xdg-open gwent-hat.kicad_pro      # Linux

KiCad will create the schematic (gwent-hat.kicad_sch) and PCB (gwent-hat.kicad_pcb) on first save if they don't already exist. All symbols and footprints come from KiCad's bundled libraries — no extra setup required.

Optional: SparkFun KiCad library (for nicer Qwiic visuals)

# From hardware/pcb/
git clone --depth 1 https://github.com/sparkfun/SparkFun-KiCad-Libraries.git libs/sparkfun-kicad
# Then in KiCad: Preferences → Manage Symbol Libraries → add libs/sparkfun-kicad
#                Preferences → Manage Footprint Libraries → add libs/sparkfun-kicad/footprints

This isn't required — KiCad's Connector_JST:JST_SH_* symbols are functionally equivalent — but the SparkFun version comes with proper Qwiic-branded silkscreen and 3D models.

How the project is organized

Workflow

1. Schematic — open gwent-hat.kicad_sch and follow BUILD.md step by step. Place every symbol from the BOM, wire nets per docs/netlist.md, assign footprints, run ERC.
2. PCB layout — Tools → Update PCB from Schematic. Footprints will appear inside the pre-drawn board outline. Place, route, run DRC. Match design rules to JLCPCB's "2-layer, 6/6 mil min trace, 0.3 mm min hole" capability tier.
3. Fab outputs — File → Plot → Gerbers (use the JLCPCB-friendly settings documented in BUILD.md), then File → Fabrication Outputs → Drill Files. Run the JLCPCB plugin to generate BOM + CPL CSVs.
4. Order — zip the Gerber/drill/BOM/CPL set into fab/gwent-hat-v1.0-jlcpcb.zip, upload to https://jlcpcb.com, pick stackup + finish + quantity, pay.

Versioning

• v1.0 — initial Pi HAT carrier with breakouts on headers/Qwiic
• v1.1 — corrections from first fab run (TBD)
• v2.0 — integrate IS31FL3731 + LEDs and TCA9548A onto the board (TBD)

Each fab order zip is committed under fab/gwent-hat-vN.M-jlcpcb.zip so the as-fabbed artifact is always reproducible.

Status

• Project scaffold (this commit)
• Canonical netlist documented (docs/netlist.md)
• Bill of materials (BOM.md)
• Build guide (BUILD.md)
• Project file (gwent-hat.kicad_pro)
• Schematic with all symbols placed (gwent-hat.kicad_sch, generated by scripts/gen_schematic.py)
• Schematic wired (add wires + net labels per BUILD.md)
• ERC clean
• Board outline drawn to Pi HAT spec on Edge.Cuts layer
• PCB placement
• PCB routing
• DRC clean
• Gerbers exported
• BOM + CPL generated
• First boards ordered