4 layers35.1 × 77 mm
4 layers57 × 27 mm
4-layer flight data recorder. Open altlog.kicadpro in KiCad 10.
- Size
- 57 × 27 mm
- Copper layers
- 4
- Thickness
- 1.6 mm
- Parts
- 47
- Nets
- 60
- Pads
- 221
- Tracks, vias
- 504, 87
- Pours
- 4
- Routed
- Yes
- KiCad
- KiCad 10.0 (file 20260206)
- Created
- 15 Jun 2026
- Updated
- 15 Jun 2026
Overview
Altlog is an open-source printed circuit board by alexdortiz, from the alexdortiz/flight-data-recorder repository on GitHub, published under the MIT licence. It is a 4-layer board of 57 × 27 mm with 47 parts on 60 nets, routed with 504 tracks and 87 vias.
It is built around the STM32F411CEU6, MS5611-01BA03 and W25Q128JVSIQ, with the AP2112K-3.3, LSM6DSO32 and MCP73831 among its other parts. Its parts include 21 capacitors, 8 resistors, 7 ICs, 3 diodes and 3 connectors. It belongs with the STM32 boards of this library.
Main components
7
STM32F411CEU6
UFQFPN-48(7x7)-40℃~+85℃ 1.7V~3.6V 100MHz 128KB 12bit 32 Bit 36 512KB ARM Cortex-M4 Built-in FLASH UFQFPN-48(7x7) Microcontrollers (MCU/MPU/SOC) ROHSSTMicroelectronicsMicrocontrollers (MCU/MPU/SOC)
MS5611-01BA03
QFN-8(3x5)QFN-8(3x5) Pressure Sensors ROHSMEASPressure Sensors
W25Q128JVSIQ
SOIC-8-208mil-40℃~+85℃ 100,000 cycles 120ms@(32KB) 128Mbit 133MHz 1uA 2.7V~3.6V 20 Years 3ms Power-on reset、Hardware write protection、Software write protection、Write enable latch、Absolute write protection SPI SOIC-8-208mil NOR FLASH ROHSWinbondNOR FLASH
AP2112K-3.3
SOT253.3V 600mA CMOS Low Dropout Linear Regulator with EnableDiodes IncorporatedUncategorised
LSM6DSO32
LGA-14(2.5x3)-40℃~+85℃ 1.71V~3.6V 9KB Accelerometer Gyroscope SPI、I2C、MIPI I3C X,Y,Z X,Y,Z ±2000dps ±32g LGA-14(2.5x3) Accelerometers ROHSSTMicroelectronicsAccelerometers
MCP73831
UncategorisedMicrochip Technology
TPD2E001DZD
SOT-23-4-40℃~+85℃ 1.5pF 11V 1nA 2 5.5V ESD IEC 61000-4-2 Unidirectional SOT-23-4 ESD and Surge Protection (TVS/ESD) ROHSTexas InstrumentsESD And Surge Protection (TVS/ESD)
README
hardware/README.mdAltLog — KiCad project (hardware/)
4-layer flight data recorder. Open altlog.kicad_pro in KiCad 10.
Files
| File | What it is |
|---|---|
altlog.kicad_pro | Project: design rules (min track 0.15 mm), USB/Power/Default net classes |
altlog.kicad_sch | Schematic — auto-generated, ERC-clean (0 errors), all 47 parts wired |
altlog.kicad_pcb | 4-layer board scaffold — 50×22 mm rounded outline + 2× M2 holes (empty, ready for placement) |
altlog.kicad_sym | Project symbol library — the custom TPD2E001 symbol (U7) |
sym-lib-table | Registers the altlog symbol library with the project |
altlog.pretty/ | Project footprint library — MS5611 (U2) land pattern (buzzer now uses a stock footprint) |
fp-lib-table | Registers the altlog footprint library with the project |
gen/schgen.py | Generates the schematic + altlog.kicad_sym |
gen/genfp.py | Generates the altlog.pretty footprints (from datasheet land patterns) |
Schematic notes (read before editing)
- Style: netlist-style capture — parts sit on a grid and are joined by global labels, not hand-drawn wires. It is electrically complete and ERC-clean; for a portfolio drawing you may want to re-arrange and wire it conventionally.
- On first open: accept "Update symbols from library" (clears 5
lib_symbol_mismatchwarnings from the generated symbol cache). - U3 LSM6DSO32 uses the pin-compatible
Sensor_Motion:LSM6DS3library symbol (the part is LSM6DSO32 — same LGA-14 pinout). U7 TPD2E001 uses the custom symbol inaltlog.kicad_sym(pinout 1=IO1, 2=GND, 3=NC, 4=VCC, 5=IO2, per the TI datasheet). Both are fully wired. - Remaining ERC warnings are benign: 5 symbol-cache mismatches (cleared by the
symbol-update above) + 2 power/IO notices (flash
/WP+/HOLDpulled to +3V3). - All 47 footprints assigned. U2 (MS5611) uses a project land pattern in
altlog.pretty/; LS1 = Murata PKMCS0909E (9×9 piezo, stock footprint — swapped from the 16×16 CMT-1603 so it fits the board). LS1 is piezo, so D3 (flyback) is OPTIONAL/DNP. - Placement done: all 47 parts are auto-placed on the board (no overlaps) via
gen/place.pyover the KiCad IPC API. Refine interactively, then route.
Workflow from here
- Open project → accept Update symbols from library. Footprints are already
assigned (incl. the
altlog.prettyones viafp-lib-table). - ERC to zero (Week-2 exit).
- Open PCB Editor (the 4-layer board scaffold with outline + holes is ready) → Tools ▸ Update PCB from Schematic (loads all 47 footprints + ratsnest) → place per ../docs/layout-plan.md → add copper zones: In1.Cu = GND, In2.Cu = +3V3 → route.
- DRC to zero (Week-3 exit) → Gerbers + drill → order.
⚠
altlog.kicad_pcbis now owned by the KiCad GUI. Unlike the schematic, do not regenerate it (gen/genpcb.pyis one-time and refuses to overwrite).
See ../docs/schematic-plan.md (net-by-net), ../docs/layout-plan.md, and ../docs/verification.md.
Regenerate the schematic
cd gen && python schgen.py ../altlog.kicad_schParts
47| Qty | Value | Footprint | References |
|---|---|---|---|
| 12 | 0.1uF | Capacitor_SMD:C_0402_1005Metric | C1, C2, C3, C4, C5, C6, C7, C8, C9, C10, C11, C12 |
| 3 | 10uF | Capacitor_SMD:C_0805_2012Metric | C13, C14, C15 |
| 2 | 1k | Resistor_SMD:R_0402_1005Metric | R5, R6 |
| 2 | 1uF | Capacitor_SMD:C_0402_1005Metric | C18, C19 |
| 2 | 27pF | Capacitor_SMD:C_0402_1005Metric | C20, C21 |
| 2 | 5.1k | Resistor_SMD:R_0402_1005Metric | R1, R2 |
| 1 | 100R | Resistor_SMD:R_0402_1005Metric | R7 |
| 1 | 100k | Resistor_SMD:R_0402_1005Metric | R8 |
| 1 | 10k | Resistor_SMD:R_0402_1005Metric | R3 |
| 1 | 2.2uF | Capacitor_SMD:C_0603_1608Metric | C17 |
| 1 | 25MHz | Crystal:Crystal_SMD_3225-4Pin_3.2x2.5mm | Y1 |
| 1 | 2N7002 | Package_TO_SOT_SMD:SOT-23 | Q1 |
| 1 | 4.7k | Resistor_SMD:R_0402_1005Metric | R4 |
| 1 | 4.7uF | Capacitor_SMD:C_0603_1608Metric | C16 |
| 1 | AP2112K-3.3 | Package_TO_SOT_SMD:SOT-23-5 | U5 |
| 1 | Arm/Erase | Button_Switch_SMD:SW_SPST_B3U-1000P | SW1 |
| 1 | Ferrite | Inductor_SMD:L_0603_1608Metric | FB1 |
| 1 | JST-PH | Connector_JST:JST_PH_B2B-PH-K_1x02_P2.00mm_Vertical | J2 |
| 1 | LED green | LED_SMD:LED_0603_1608Metric | D1 |
| 1 | LED red | LED_SMD:LED_0603_1608Metric | D2 |
| 1 | LSM6DSO32 | Package_LGA:LGA-14_3x2.5mm_P0.5mm_LayoutBorder3x4y | U3 |
| 1 | MCP73831 | Package_TO_SOT_SMD:SOT-23-5 | U6 |
| 1 | MS5611-01BA03 | altlog:MS5611-01BA_QFN-8_5x3mm | U2 |
| 1 | PKMCS0909E | Buzzer_Beeper:Buzzer_Murata_PKMCS0909E | LS1 |
| 1 | STM32F411CEU6 | Package_DFN_QFN:QFN-48-1EP_7x7mm_P0.5mm_EP5.6x5.6mm | U1 |
| 1 | SWD | Connector_PinHeader_1.27mm:PinHeader_2x05_P1.27mm_Vertical | J3 |
| 1 | Schottky 20V | Diode_SMD:D_SOD-123 | D3 |
| 1 | TPD2E001 | Package_TO_SOT_SMD:SOT-553 | U7 |
| 1 | USB-C | Connector_USB:USB_C_Receptacle_GCT_USB4105-xx-A_16P_TopMnt_Horizontal | J1 |
| 1 | W25Q128JVSIQ | Package_SO:SOIC-8_3.9x4.9mm_P1.27mm | U4 |
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Questions
How big is the Altlog PCB?
It measures 57 × 27 mm and has 4 copper layers, 1.6 mm thick.
What parts does the Altlog use?
47 parts, built around the STM32F411CEU6, MS5611-01BA03, W25Q128JVSIQ and AP2112K-3.3. The full list of its parts is on this page, with links to each part's symbol and footprint where PCBKit's library has them.
Where can I download the Altlog KiCad files?
From the alexdortiz/flight-data-recorder repository on GitHub, at the commit this page was made from: the board is hardware/altlog.kicad_pcb and its schematic hardware/altlog.kicad_sch. PCBKit opens the board in the browser, with nothing to install.
Can I use the Altlog design in my own project?
Its repository publishes it under the MIT licence: you may reuse it on that licence's terms (keep the author's notice, and for a copyleft licence share your changes alike).