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2 layers22 × 16 mmSmall, the printed circuit board in 3D

AI-assisted circuit design, verified by real SPICE.

Size
22 × 16 mm
Copper layers
2
Thickness
1.6 mm
Parts
6
Nets
6
Pads
18
Tracks, vias
24, 2
Routed
Yes
KiCad
KiCad 0.0.1 (file 20241229)
Created
29 May 2026
Updated
17 Oct 2026

Overview

Small is an open-source printed circuit board by Abdulberk, from the Abdulberk/circuit-forge repository on GitHub. It is a 2-layer board of 22 × 16 mm with 6 parts on 6 nets, routed with 24 tracks and 2 vias.

Its parts include 3 resistors, 1 capacitor, 1 IC and 1 diode.

README

README.md

⚡ Circuit Forge

AI-assisted circuit design, verified by real SPICE. Every verdict is backed by measured evidence — never by a model's say-so.

CI PCB quality gate Release npm

ngspice Node pnpm TypeScript

Quick start · What it does · Architecture · Quality · Docs · Status


Most AI tools tell you a circuit works. Circuit Forge proves it. A design is only called verified after real ngspice simulates it and every stated acceptance criterion is checked against measured values — voltages, branch currents, cutoff frequency, THD, gain. What you get back is not "looks good": it is an evidence pack.

jsonc
// POST /verify-design → DesignEvidence (truncated)
{
  "verdict": "pass",
  "summary": "Simulation OK — 3/3 checks passed",
  "assertions": [
    {
      "label": "LED current ≈ 10 mA",
      "probe": "i(R1)", "metric": "final", "op": "approx",
      "target": 0.01, "actual": 0.0091, "pass": true,
      "detail": "final(i(R1)) = 0.0091 ✓ approx 0.01"
    }
    // …every criterion, with the measured value and its signed distance to target
  ],
  "measurements": [ { "node": "@r1[i]", "min": 0.0091, "max": 0.0091, "final": 0.0091 } /* … */ ],
  "robustness": {
    "worstCase": { "componentsCornered": ["R1"], "evaluated": 2, "passed": 2, "passAllCorners": true }
  }
}

Heads up — this repo is pnpm-only. Internal packages use the workspace:* protocol, which npm install cannot parse. Always use pnpm. See LOCAL_SETUP.md.


✨ What it does

Capability
🧠 AI design loopDescribe intent → the LLM designs against a live parts catalog (real MPNs + sourcing), simulates, reads the measured failures, and self-repairs until the spec is met — or honestly reports why not.
✅ Deterministic verificationCircuit JSON → generated SPICE netlist → sandboxed ngspice → typed results → pass/fail per acceptance criterion (min · max · final · pp · avg · rms · cutoff · thd · gain).
🎲 Robustness, not just nominalMonte-Carlo yield with confidence interval, worst-case ±tolerance corner analysis (2ᵏ extremes), and parametric sweeps — a design that only works at nominal isn't a design.
📈 Broad analysis coverageOperating point, transient, AC, DC sweep, noise, DC sensitivity — plus Fourier/THD, .meas measurements, and small-signal transfer function.
🔀 Mixed-signalDigital XSPICE devices (gates, flip-flops, latches, tristate) auto-bridged to the analog domain.
🔁 SPICE interchangeImport/export standard SPICE decks (LTspice/KiCad round-trip), analog and digital.
🧩 Real componentsTME-backed catalog search over 1.3M+ manufacturer parts (stock, pricing, datasheets), E-series (IEC 60063) value snapping, per-version BOM export.
🖨️ PCB pipelineAutorouted layout, KiCad-based DRC, Gerber / BOM / pick-and-place export, and a 3D board model (GLB) — as an async job queue.
🏢 Multi-tenant platformOrgs & RBAC, JWT auth, usage metering + quotas, platform-admin API with audit trail, OpenTelemetry observability (opt-in), readiness probes.

🏗️ Architecture

The heart of the system is a closed feedback cycle: design → simulate → measure → repair. Every netlist runs in a sandboxed subprocess — non-root, resource-limited, no network, hard timeout — so a hostile or degenerate circuit can burn only its own cage. Batch work (queued simulations, Monte-Carlo, corner sweeps) runs in a dedicated worker; the synchronous AI verify loop and /verify-design spawn ngspice inside the API process under the same rlimit sandbox.

mermaid
flowchart LR
    U["Circuit JSON<br/>+ acceptance criteria"] --> API["API<br/>(NestJS)"]
    P["Design prompt"] -.-> LLM["AI design loop<br/>(parts-grounded)"]
    LLM -.->|"proposes circuit"| API
    API -->|"enqueue"| Q[("BullMQ<br/>queue")]
    Q --> W["Simulation worker"]
    W --> NG["ngspice<br/>sandboxed subprocess"]
    NG --> W
    W --> DB[("Postgres / S3")]
    API -->|"poll"| DB
    API --> EV["Evidence pack:<br/>verdict · measurements · robustness"]
    EV -.->|"measured failures feed back"| LLM

Monorepo layout (pnpm + Turborepo):

text
apps/
  api/          NestJS REST API — auth, orgs, projects, simulation, AI generation, parts, usage
  worker-sim/   Simulation worker — sandboxed ngspice, Monte-Carlo / corner / sweep batch runners
  pcb-worker/   PCB worker — layout, DRC, Gerber/BOM/PnP, 3D model jobs
  pcb-viewer/   Dev tool — 3D board preview
packages/
  eda-core/     The EDA brain — circuit model, netlist generation, SPICE sanitization, ERC,
                result parsing, assertions, Monte-Carlo/corner/sweep engines  (MIT)
  llm-core/     AI design loop — parts-grounded tool use, simulate-in-the-loop self-repair
  pcb-core/     PCB contracts — fab profiles, DRC oracle, Gerber/BOM/PnP writers
crates/
  pcb-placement-rs/  Rust placement engine (cf-pcb-place) — out-of-process, ~100× on dense boards

Deep dive — services, queues, sandbox model, graceful shutdown, environment variables: docs/ARCHITECTURE.md.


🔬 Tested against real ngspice — in CI

Unit tests alone are not enough for an EDA tool: the bugs live at the circuit-to-SPICE boundary and in simulator version drift. So besides the per-package unit and integration suites, every PR runs a real-ngspice regression battery:

HarnessWhat it locks down
Coverage matrix — 83 cellsEvery device × analysis × probe-form combination, checked against analytic expectations
Edge battery — 51 casesNumeric limits, convergence, safety invariants, physics sanity
Pairwise sweep — 200 combosParameter × hostile-name interactions
Seeded fuzzRandom circuits must fail loudly or produce finite data — never silently wrong

The engine itself is pinned and drift-guarded: CI asserts the runner's ngspice major, and a dedicated job runs the same battery against the exact Alpine binary production ships — so an engine upgrade is an explicit, matrix-verified decision, never a silent change.


🚀 Quick start

Verified step-by-step instructions (incl. Windows specifics and port-conflict handling) live in LOCAL_SETUP.md.

powershell
cp .env.example .env                        # REQUIRED — .env is gitignored; the API refuses to boot
                                            # without two distinct 32+ char JWT secrets
pnpm install                                # never `npm install`
docker compose up -d postgres redis minio create-bucket   # create-bucket is NOT optional: nothing else
                                            # creates the S3 bucket, and /health/ready 503s without it
pnpm db:migrate:dev                         # apply schema (needs DATABASE_URL visible to apps/api —
                                            # see LOCAL_SETUP.md if it fails with Prisma P1012)
pnpm db:seed                                # demo data (optional)
pnpm dev                                    # start all apps in watch mode

ngspice (required for actual simulation results):

powershell
# Windows (Administrator PowerShell)
choco install ngspice -y
# Linux:  sudo apt-get install ngspice     |     macOS:  brew install ngspice
Root scripts
ScriptPurpose
pnpm dev / pnpm buildWatch mode / build all (Turbo)
pnpm test / test:cov / test:e2eUnit + integration suites
pnpm test:matrix / test:edge / test:sweep / test:fuzzReal-ngspice regression battery
pnpm test:robustnessMonte-Carlo/corner current-criteria proof (real ngspice)
pnpm test:layoutPCB layout + DRC eval harness (real freerouting + kicad-cli)
pnpm test:tierRobustness-tier reachability proof (real ngspice)
pnpm typecheck / lint / formatStatic checks
pnpm db:migrate / db:generate / db:seed / db:studioDatabase workflows

📚 Documentation

DocContents
docs/ARCHITECTURE.mdSystem design, environment variables, queues, sandbox
docs/API.mdFull endpoint reference
docs/EDA_CORE.mdCircuit model, netlist generation, analyses
docs/OBSERVABILITY.mdOpenTelemetry setup (opt-in, inert by default)
VERIFICATION.mdWhat "verified" means here, and how it is enforced
LOCAL_SETUP.mdVerified local setup, Windows gotchas

🗺️ Status & roadmap

Current: v0.1.0 (pre-release). This is the backend milestone — honest about what it is:

  • ✅ Simulation, verification, robustness, AI loop, PCB pipeline, multi-tenant platform — built and tested
  • 🚧 Web frontend — in progress (this repo is backend + API today)
  • 🚧 Security hardening for hostile multi-tenant traffic — deferred, tracked
  • 🚧 Load testing & production deployment — not yet

APIs may change before 1.0.

📄 License

@circuit-forge/eda-core is MIT and published on npm (from this monorepo — see packages/eda-core). The remaining packages and applications are not yet licensed (all rights reserved) while the project is pre-release — licensing will be finalized before 1.0.

Parts

6
QtyValueFootprintReferences
210kΩtscircuit:resistor_res0603R1, R2
1tscircuit:chip_soic8U1
1100nFtscircuit:capacitor_0603C1
1330Ωtscircuit:resistor_res0603R3
1LEDtscircuit:led_0603LED1

Questions

How big is the Small PCB?

It measures 22 × 16 mm and has 2 copper layers, 1.6 mm thick.

What parts does the Small use?

6 parts. The full list of its parts is on this page, with links to each part's symbol and footprint where PCBKit's library has them.

Where can I download the Small KiCad files?

From the Abdulberk/circuit-forge repository on GitHub, at the commit this page was made from: the board is packages/pcb-core/__fixtures__/small.kicad_pcb. PCBKit opens the board in the browser, with nothing to install.

Can I use the Small design in my own project?

Its repository states no licence, so its author keeps all rights: ask Abdulberk before reusing the design.

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