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anyon_e, a highly integrated, high end, open source laptop. Attempt the impossible.

AI-assisted circuit design, verified by real SPICE.
Small is an open-source printed circuit board by Abdulberk, from the Abdulberk/circuit-forge repository on GitHub. It is a 2-layer board of 22 × 16 mm with 6 parts on 6 nets, routed with 24 tracks and 2 vias.
Its parts include 3 resistors, 1 capacitor, 1 IC and 1 diode.
AI-assisted circuit design, verified by real SPICE. Every verdict is backed by measured evidence — never by a model's say-so.
Quick start · What it does · Architecture · Quality · Docs · Status
Most AI tools tell you a circuit works. Circuit Forge proves it. A design is only called verified after real ngspice simulates it and every stated acceptance criterion is checked against measured values — voltages, branch currents, cutoff frequency, THD, gain. What you get back is not "looks good": it is an evidence pack.
// POST /verify-design → DesignEvidence (truncated)
{
"verdict": "pass",
"summary": "Simulation OK — 3/3 checks passed",
"assertions": [
{
"label": "LED current ≈ 10 mA",
"probe": "i(R1)", "metric": "final", "op": "approx",
"target": 0.01, "actual": 0.0091, "pass": true,
"detail": "final(i(R1)) = 0.0091 ✓ approx 0.01"
}
// …every criterion, with the measured value and its signed distance to target
],
"measurements": [ { "node": "@r1[i]", "min": 0.0091, "max": 0.0091, "final": 0.0091 } /* … */ ],
"robustness": {
"worstCase": { "componentsCornered": ["R1"], "evaluated": 2, "passed": 2, "passAllCorners": true }
}
}Heads up — this repo is pnpm-only. Internal packages use the
workspace:*protocol, whichnpm installcannot parse. Always usepnpm. See LOCAL_SETUP.md.
| Capability | |
|---|---|
| 🧠 AI design loop | Describe intent → the LLM designs against a live parts catalog (real MPNs + sourcing), simulates, reads the measured failures, and self-repairs until the spec is met — or honestly reports why not. |
| ✅ Deterministic verification | Circuit JSON → generated SPICE netlist → sandboxed ngspice → typed results → pass/fail per acceptance criterion (min · max · final · pp · avg · rms · cutoff · thd · gain). |
| 🎲 Robustness, not just nominal | Monte-Carlo yield with confidence interval, worst-case ±tolerance corner analysis (2ᵏ extremes), and parametric sweeps — a design that only works at nominal isn't a design. |
| 📈 Broad analysis coverage | Operating point, transient, AC, DC sweep, noise, DC sensitivity — plus Fourier/THD, .meas measurements, and small-signal transfer function. |
| 🔀 Mixed-signal | Digital XSPICE devices (gates, flip-flops, latches, tristate) auto-bridged to the analog domain. |
| 🔁 SPICE interchange | Import/export standard SPICE decks (LTspice/KiCad round-trip), analog and digital. |
| 🧩 Real components | TME-backed catalog search over 1.3M+ manufacturer parts (stock, pricing, datasheets), E-series (IEC 60063) value snapping, per-version BOM export. |
| 🖨️ PCB pipeline | Autorouted layout, KiCad-based DRC, Gerber / BOM / pick-and-place export, and a 3D board model (GLB) — as an async job queue. |
| 🏢 Multi-tenant platform | Orgs & RBAC, JWT auth, usage metering + quotas, platform-admin API with audit trail, OpenTelemetry observability (opt-in), readiness probes. |
The heart of the system is a closed feedback cycle: design → simulate → measure → repair.
Every netlist runs in a sandboxed subprocess — non-root, resource-limited, no network, hard timeout —
so a hostile or degenerate circuit can burn only its own cage. Batch work (queued simulations, Monte-Carlo,
corner sweeps) runs in a dedicated worker; the synchronous AI verify loop and /verify-design spawn ngspice
inside the API process under the same rlimit sandbox.
flowchart LR
U["Circuit JSON<br/>+ acceptance criteria"] --> API["API<br/>(NestJS)"]
P["Design prompt"] -.-> LLM["AI design loop<br/>(parts-grounded)"]
LLM -.->|"proposes circuit"| API
API -->|"enqueue"| Q[("BullMQ<br/>queue")]
Q --> W["Simulation worker"]
W --> NG["ngspice<br/>sandboxed subprocess"]
NG --> W
W --> DB[("Postgres / S3")]
API -->|"poll"| DB
API --> EV["Evidence pack:<br/>verdict · measurements · robustness"]
EV -.->|"measured failures feed back"| LLMMonorepo layout (pnpm + Turborepo):
apps/
api/ NestJS REST API — auth, orgs, projects, simulation, AI generation, parts, usage
worker-sim/ Simulation worker — sandboxed ngspice, Monte-Carlo / corner / sweep batch runners
pcb-worker/ PCB worker — layout, DRC, Gerber/BOM/PnP, 3D model jobs
pcb-viewer/ Dev tool — 3D board preview
packages/
eda-core/ The EDA brain — circuit model, netlist generation, SPICE sanitization, ERC,
result parsing, assertions, Monte-Carlo/corner/sweep engines (MIT)
llm-core/ AI design loop — parts-grounded tool use, simulate-in-the-loop self-repair
pcb-core/ PCB contracts — fab profiles, DRC oracle, Gerber/BOM/PnP writers
crates/
pcb-placement-rs/ Rust placement engine (cf-pcb-place) — out-of-process, ~100× on dense boardsDeep dive — services, queues, sandbox model, graceful shutdown, environment variables: docs/ARCHITECTURE.md.
Unit tests alone are not enough for an EDA tool: the bugs live at the circuit-to-SPICE boundary and in simulator version drift. So besides the per-package unit and integration suites, every PR runs a real-ngspice regression battery:
| Harness | What it locks down |
|---|---|
| Coverage matrix — 83 cells | Every device × analysis × probe-form combination, checked against analytic expectations |
| Edge battery — 51 cases | Numeric limits, convergence, safety invariants, physics sanity |
| Pairwise sweep — 200 combos | Parameter × hostile-name interactions |
| Seeded fuzz | Random circuits must fail loudly or produce finite data — never silently wrong |
The engine itself is pinned and drift-guarded: CI asserts the runner's ngspice major, and a dedicated job runs the same battery against the exact Alpine binary production ships — so an engine upgrade is an explicit, matrix-verified decision, never a silent change.
Verified step-by-step instructions (incl. Windows specifics and port-conflict handling) live in LOCAL_SETUP.md.
cp .env.example .env # REQUIRED — .env is gitignored; the API refuses to boot
# without two distinct 32+ char JWT secrets
pnpm install # never `npm install`
docker compose up -d postgres redis minio create-bucket # create-bucket is NOT optional: nothing else
# creates the S3 bucket, and /health/ready 503s without it
pnpm db:migrate:dev # apply schema (needs DATABASE_URL visible to apps/api —
# see LOCAL_SETUP.md if it fails with Prisma P1012)
pnpm db:seed # demo data (optional)
pnpm dev # start all apps in watch modePORT in .env)minioadmin / minioadmin)demo@circuitforge.io / demo123456ngspice (required for actual simulation results):
# Windows (Administrator PowerShell)
choco install ngspice -y
# Linux: sudo apt-get install ngspice | macOS: brew install ngspice| Script | Purpose |
|---|---|
pnpm dev / pnpm build | Watch mode / build all (Turbo) |
pnpm test / test:cov / test:e2e | Unit + integration suites |
pnpm test:matrix / test:edge / test:sweep / test:fuzz | Real-ngspice regression battery |
pnpm test:robustness | Monte-Carlo/corner current-criteria proof (real ngspice) |
pnpm test:layout | PCB layout + DRC eval harness (real freerouting + kicad-cli) |
pnpm test:tier | Robustness-tier reachability proof (real ngspice) |
pnpm typecheck / lint / format | Static checks |
pnpm db:migrate / db:generate / db:seed / db:studio | Database workflows |
| Doc | Contents |
|---|---|
| docs/ARCHITECTURE.md | System design, environment variables, queues, sandbox |
| docs/API.md | Full endpoint reference |
| docs/EDA_CORE.md | Circuit model, netlist generation, analyses |
| docs/OBSERVABILITY.md | OpenTelemetry setup (opt-in, inert by default) |
| VERIFICATION.md | What "verified" means here, and how it is enforced |
| LOCAL_SETUP.md | Verified local setup, Windows gotchas |
Current: v0.1.0 (pre-release). This is the backend milestone — honest about what it is:
APIs may change before 1.0.
@circuit-forge/eda-core is MIT and published on
npm (from this monorepo — see
packages/eda-core). The remaining packages and applications are not yet licensed
(all rights reserved) while the project is pre-release — licensing will be finalized before 1.0.
| Qty | Value | Footprint | References |
|---|---|---|---|
| 2 | 10kΩ | tscircuit:resistor_res0603 | R1, R2 |
| 1 | tscircuit:chip_soic8 | U1 | |
| 1 | 100nF | tscircuit:capacitor_0603 | C1 |
| 1 | 330Ω | tscircuit:resistor_res0603 | R3 |
| 1 | LED | tscircuit:led_0603 | LED1 |
It measures 22 × 16 mm and has 2 copper layers, 1.6 mm thick.
6 parts. The full list of its parts is on this page, with links to each part's symbol and footprint where PCBKit's library has them.
From the Abdulberk/circuit-forge repository on GitHub, at the commit this page was made from: the board is packages/pcb-core/__fixtures__/small.kicad_pcb. PCBKit opens the board in the browser, with nothing to install.
Its repository states no licence, so its author keeps all rights: ask Abdulberk before reusing the design.

byrantech/laptop
anyon_e, a highly integrated, high end, open source laptop. Attempt the impossible.


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