
Musicbrain busboard v2
MarkWestbroek/MusicBrain
A central brain running on teensy or a lighter MCU to process any control signals (MIDI, CV, our own) into the same but adding logic, ADSRs, DCOs, CV matrices etc. to it

A central brain running on teensy or a lighter MCU to process any control signals (MIDI, CV, our own) into the same but adding logic, ADSRs, DCOs, CV matrices etc. to it
Musicbrain vcf8kern is an open-source printed circuit board by MarkWestbroek, from the MarkWestbroek/MusicBrain repository on GitHub, published under the MIT licence. It is a 4-layer board of 110 × 92 mm with 412 parts on 280 nets, routed with 6,134 tracks and 710 vias.
It is built around the AD5754BREZ, DAC128S085CIMTX and 74HC4051, with the ADR421AR and LM311 among its other parts. Its parts include 299 resistors, 82 capacitors, 27 ICs, 3 connectors and 1 transistor.
Kernkaart van het poly-analog-spoor (doc/poly-analog-spec.md, VCF8 +
B3/B7/B10): 8 identieke SSI2140-stemmen met pole-mixing multimode (8 modes
via een 4051 per stem), cutoff/Q vanuit de Brain via de SPI-bus. Staande
kaart achter de VCF8-backbone (kernslot-contract v1.1). 110×92, 4-laags
(In1/In2 = GND-planes), dubbelzijdig bestukt (besluit 2026-07-21: per stem
gaat de pole-mix-ster + buffer-steun + ontkoppeling naar de B-zijde via JLC
PCBA; de SSI2140's op de top soldeer je zelf), passieven 0603.
Schema = hiërarchisch/gepagineerd + bedraad (2026-07-21): root +
in-uit-DACs-pagina + 1 pagina per stem (stem1..stem8, identiek
op ref/net-suffix na). Elke stempagina toont de SSI2140 met echte draadjes
naar zijn lokale subcircuits (gm-trap-knopen, integrator-caps, EXPO-, Q- en
pole-mix-netwerk → 4051); de tap-bus (AINB, OUT1..OUT4) loopt als globale
labels (die fan-outen naar meerdere stages + de pole-mix, net als de OLED-bus
in het TD-12-interposer-schema). Cross-pagina-netten (VCUT/VQ/FMCVB/MOUT/MODE)
= globale labels = de kale PCB-netnamen (PCB-netten hebben géén /-prefix).
Bron: gen_vcf8kern.py (+schlib_hier.py). Dicht maar leesbaar; kan verder
uitgespreid worden.
Status: routing af, reproduceerbaar DRC 0/0 (2026-07-31) — ERC 0,
netcheck OK, plaatsing net-bewust (v3), alle signalen + voedingen geroute.
Een volledige run van gen_vcf8kern.py, gevolgd door KiCad DRC met opnieuw
gevulde zones, geeft 0 violations + 0 unconnected. De definitieve
handroutes staan in de generator; het PCB is dus niet afhankelijk van
handwerk in pcbnew. Recept + valkuilen: WERKWIJZE.md §"Dichte borden".
Dit is een rev-0.1-validatiekaart: verwacht een respin na de bench-test
(SSI2140-niveaus, pole-mix-matching, tune-lus).
┌───────────── per stem (×8) ──────────────┐
kernslot ─SCLK/SDIN/CS/LDAC─► 2× AD5754 (daisy) ─VCUTk─►54.9k─► EXPO(7) SSI2140
(v1.1) ─SCLK2/SDIN2/CS2──► DAC128S085 ─VQk─►13k─► Q CTRL(12) 4-pole cascade
─FMCV─►buffer─►100k─► EXPO(7) IN1→gm1..gm4→OUT4
J2 AUDIO IN ─►/5-buffer─► AINB ─►15k─► IN1 ... cascade ... OUT1..OUT4
│
taps E0=AINB,E1..E4=OUT1..OUT4 ─► 8 passieve som-sterren
└─► 4051 (MODE0..2) ─► ×5-buffer ─► J3 AUDIO UIT
OUT4 (×8) ─► 4051 (TSEL0..2) ─► LM311 ─► TOUT (open-drain, TEN via 2N7002)⚠️ Pinout datasheet-geverifieerd (2026-07-20): de buildspec had pins 1–6 verwisseld. Correct: 1=OUT2 2=CAP2 3=IN2 4=OUT1 5=CAP1 6=IN1 (ingang) 7=EXPO 8=TEMPCO 9=Q VCA OUT 10=GND 11=V− 12=Q CTRL 13=Q VCA IN+ 14=OUT4 15=CAP4 16=IN4 17=OUT3 18=CAP3 19=IN3 20=V+.
IN1(6)→gm1→OUT1(4)→IN2(3)→gm2→OUT2(1)→IN3(19)→gm3→OUT3(17)→IN4(16) →gm4→OUT4(14). Per trap 15k serie-in + 15k feedback + 200Ω shunt→GND +
1nF C0G op CAPx (Fig-20-schaling 15k voor buffer-load ≥5k). Elke cel
inverteert → de pole-mix-tekens komen gratis.5 taps (E0 = gebufferde ingang AINB, E1..E4 = OUT1..OUT4) → 8 passieve gewogen-som-sterren (één per mode) → een 4051 kiest de mode (MODE0..2) → uitgangsbuffer. Gewicht w → weerstand 75k/w (R_ref = 75k = Fig-20 RF); gebruikte waarden 75k/37.4k/18.7k/12.4k. De passieve normalisatie (÷Σgewichten) egaliseert de modeniveaus vanzelf. Tekens komen uit de trap-inversies, dus alle weerstanden positief naar één knoop (AN701 §2).
Modemenu (tap-zuinig, 15 mix-R/stem):
| MODE0..2 | Mode | Gewichten (E0,E1,E2,E3,E4) |
|---|---|---|
| 000 | 4-pole LP | 0,0,0,0,1 |
| 001 | 3-pole LP | 0,0,0,1,0 |
| 010 | 2-pole LP | 0,0,1,0,0 |
| 011 | 1-pole LP | 0,1,0,0,0 |
| 100 | 2-pole HP | 1,2,1,0,0 |
| 101 | 2-pole BP | 0,1,1,0,0 |
| 110 | 4-pole BP | 0,0,1,2,1 |
| 111 | notch | 1,2,2,0,0 |
MODE gedeeld = globale modekeuze (v1); per-stem-modes = contract-extensie.
OUT4 van elke stem → 4051 (TSEL0..2 selecteren de stem) → LM311 comparator → TOUT (open-drain, pull-up op de backbone). TEN (geografisch) schakelt via een 2N7002 de LM311-emitter naar GND: TEN hoog = déze kaart drijft TOUT; anders hoog-Z. De Brain pollt via CS2, de RP2040-PIO meet de periode/duty. Geen analoge tune-lijn over de bus.
doc/poly-analog-spec.md B7)Haakse male 2×12 aan de onderrand (J1), plugt in de verticale female 2×12 op de backbone. Pins 1–6 spiegelen het busslot.
| Pin | Net | Pin | Net |
|---|---|---|---|
| 1 | GND | 2 | +12V |
| 3 | GND | 4 | −12V |
| 5 | FMCV | 6 | +3V3 |
| 7 | SCLK | 8 | GND |
| 9 | SDIN (AD5754 in) | 10 | SDO (daisy uit) |
| 11 | CS (SYNC) | 12 | LDAC |
| 13 | SCLK2 | 14 | SDIN2 (DAC128 in) |
| 15 | SDO2 (daisy uit) | 16 | CS2 |
| 17 | MODE0 | 18 | MODE1 |
| 19 | MODE2 | 20 | TSEL0 |
| 21 | TSEL1 | 22 | TSEL2 |
| 23 | TEN (geografisch) | 24 | TOUT (open-drain) |
Audio loopt níet door dit contract: J2 = AUDIO IN, J3 = AUDIO UIT (1×10, jack8-contract: 1=GND, 2–9=stem1–8, 10=GND), verticaal op de bovenrand (tegenover de kernslot). Verticale headers = van bovenaf geplugd in de kaart-tot-kaart-gap; er is een plug-keepout omheen zodat het IDC-huis vrij ligt (de lage 0603's ernaast lopen er in Z onderdoor).
| Stem | cutoff (AD5754) | Q (DAC128S085) | J2/J3 | tune-mux |
|---|---|---|---|---|
| 1–4 | U31 A/B/C/D | VOUTA–D | pin 2–5 | Y4/Y7/Y6/Y5 |
| 5–8 | U32 A/B/C/D | VOUTE–H | pin 6–9 | Y2/Y0/Y1/Y3 |
De tune-mux-Y's zijn geografisch gemapt (2026-07-21, routing): linker fysieke pinnen = helft-L (stem 1–4), rechter = helft-R (stem 5–8). Firmware- tabel TSEL-code n (=Yn) → stem: 0→6, 1→7, 2→5, 3→8, 4→1, 5→4, 6→3, 7→2.
Zie musicbrain-vcf8kern-testadapter: passief kaartje dat de kern direct
op de hoofd-SPI-bus zet (MOSI→SDIN+SDIN2, SCLK→SCLK+SCLK2, IRQ→CS2), met
MODE/TSEL-jumpers en een TOUT-pullup — bench-test vóór de VCF8-backbone bestaat.
De kaart heeft drie connectoren: J1 KERNSLOT (de kernslot-bus naar de Brain: SPI, LDAC, TOUT, voedingen), J2 AUDIO IN en J3 AUDIO UIT (elk 8 kanalen tussen twee GND-pinnen).
Bovenaanzicht van het bord (kijkend op de pinnen); pin 1 = vierkant.
Gegenereerd uit het bordbestand met hardware/kicad-generators/pinout_svg.py.
| Qty | Value | Footprint | References |
|---|---|---|---|
| 96 | 75k | Resistor_SMD:R_0603_1608Metric | R119, R130, R131, R132, R133, R134, R136, R137, R138, R139, R141, R142, R219, R230, R231, R232 +80 |
| 72 | 15k | Resistor_SMD:R_0603_1608Metric | R101, R102, R103, R104, R105, R106, R107, R108, R121, R201, R202, R203, R204, R205, R206, R207 +56 |
| 45 | 100n | Capacitor_SMD:C_0603_1608Metric | C105, C106, C107, C205, C206, C207, C305, C306, C307, C405, C406, C407, C505, C506, C507, C605 +29 |
| 32 | 1n | Capacitor_SMD:C_0603_1608Metric | C101, C102, C103, C104, C201, C202, C203, C204, C301, C302, C303, C304, C401, C402, C403, C404 +16 |
| 32 | 200R | Resistor_SMD:R_0603_1608Metric | R109, R110, R111, R112, R209, R210, R211, R212, R309, R310, R311, R312, R409, R410, R411, R412 +16 |
| 32 | 37.4k | Resistor_SMD:R_0603_1608Metric | R135, R140, R143, R144, R235, R240, R243, R244, R335, R340, R343, R344, R435, R440, R443, R444 +16 |
| 16 | 1k | Resistor_SMD:R_0603_1608Metric | R114, R118, R214, R218, R314, R318, R414, R418, R514, R518, R614, R618, R714, R718, R814, R818 |
| 9 | 74HC4051 | Package_SO:TSSOP-16_4.4x5mm_P0.65mm | U11, U12, U13, U14, U15, U16, U17, U18, U35 |
| 8 | 100k | Resistor_SMD:R_0603_1608Metric | R115, R215, R315, R415, R515, R615, R715, R815 |
| 8 | 13k | Resistor_SMD:R_0603_1608Metric | R116, R216, R316, R416, R516, R616, R716, R816 |
| 8 | 16.2k | Resistor_SMD:R_0603_1608Metric | R117, R217, R317, R417, R517, R617, R717, R817 |
| 8 | 18.7k | Resistor_SMD:R_0603_1608Metric | R120, R220, R320, R420, R520, R620, R720, R820 |
| 8 | 54.9k | Resistor_SMD:R_0603_1608Metric | R113, R213, R313, R413, R513, R613, R713, R813 |
| 8 | 60.4k | Resistor_SMD:R_0603_1608Metric | R122, R222, R322, R422, R522, R622, R722, R822 |
| 8 | SSI2140 | Package_SO:SSOP-20_3.9x8.7mm_P0.635mm | U1, U2, U3, U4, U5, U6, U7, U8 |
| 5 | TL074 | Package_SO:TSSOP-14_4.4x5mm_P0.65mm | U21, U22, U23, U24, U25 |
| 4 | 10u | Capacitor_SMD:CP_Elec_4x5.3 | C911, C912, C913, C914 |
| 2 | 1M | Resistor_SMD:R_0603_1608Metric | R902, R903 |
| 2 | AD5754BREZ | Package_SO:HTSSOP-24-1EP_4.4x7.8mm_P0.65mm_EP3.2x5mm | U31, U32 |
| 1 | 10k | Resistor_SMD:R_0603_1608Metric | R901 |
| 1 | 10n | Capacitor_SMD:C_0603_1608Metric | C915 |
| 1 | 2N7002 | Package_TO_SOT_SMD:SOT-23 | Q1 |
| 1 | ADR421 | Package_SO:SOIC-8_3.9x4.9mm_P1.27mm | U33 |
| 1 | AUDIO IN | Connector_PinHeader_2.54mm:PinHeader_1x10_P2.54mm_Vertical | J2 |
| 1 | AUDIO UIT | Connector_PinHeader_2.54mm:PinHeader_1x10_P2.54mm_Vertical | J3 |
| 1 | DAC128S085CIMTX | Package_SO:TSSOP-16_4.4x5mm_P0.65mm | U34 |
| 1 | KERNSLOT | Connector_PinHeader_2.54mm:PinHeader_2x12_P2.54mm_Horizontal | J1 |
| 1 | LM311 | Package_SO:SOIC-8_3.9x4.9mm_P1.27mm | U36 |

MarkWestbroek/MusicBrain
A central brain running on teensy or a lighter MCU to process any control signals (MIDI, CV, our own) into the same but adding logic, ADSRs, DCOs, CV matrices etc. to it

MarkWestbroek/MusicBrain
A central brain running on teensy or a lighter MCU to process any control signals (MIDI, CV, our own) into the same but adding logic, ADSRs, DCOs, CV matrices etc. to it

MarkWestbroek/MusicBrain
A central brain running on teensy or a lighter MCU to process any control signals (MIDI, CV, our own) into the same but adding logic, ADSRs, DCOs, CV matrices etc. to it

MarkWestbroek/MusicBrain
A central brain running on teensy or a lighter MCU to process any control signals (MIDI, CV, our own) into the same but adding logic, ADSRs, DCOs, CV matrices etc. to it

MarkWestbroek/MusicBrain
A central brain running on teensy or a lighter MCU to process any control signals (MIDI, CV, our own) into the same but adding logic, ADSRs, DCOs, CV matrices etc. to it

MarkWestbroek/MusicBrain
A central brain running on teensy or a lighter MCU to process any control signals (MIDI, CV, our own) into the same but adding logic, ADSRs, DCOs, CV matrices etc. to it

MarkWestbroek/MusicBrain
A central brain running on teensy or a lighter MCU to process any control signals (MIDI, CV, our own) into the same but adding logic, ADSRs, DCOs, CV matrices etc. to it

MarkWestbroek/MusicBrain
A central brain running on teensy or a lighter MCU to process any control signals (MIDI, CV, our own) into the same but adding logic, ADSRs, DCOs, CV matrices etc. to it

MarkWestbroek/MusicBrain
A central brain running on teensy or a lighter MCU to process any control signals (MIDI, CV, our own) into the same but adding logic, ADSRs, DCOs, CV matrices etc. to it

MarkWestbroek/MusicBrain
A central brain running on teensy or a lighter MCU to process any control signals (MIDI, CV, our own) into the same but adding logic, ADSRs, DCOs, CV matrices etc. to it

MarkWestbroek/MusicBrain
A central brain running on teensy or a lighter MCU to process any control signals (MIDI, CV, our own) into the same but adding logic, ADSRs, DCOs, CV matrices etc. to it

MarkWestbroek/MusicBrain
A central brain running on teensy or a lighter MCU to process any control signals (MIDI, CV, our own) into the same but adding logic, ADSRs, DCOs, CV matrices etc. to it

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It measures 110 × 92 mm and has 4 copper layers, 1.6 mm thick.
412 parts, built around the AD5754BREZ, DAC128S085CIMTX, 74HC4051 and ADR421AR. The full list of its parts is on this page, with links to each part's symbol and footprint where PCBKit's library has them.
From the MarkWestbroek/MusicBrain repository on GitHub, at the commit this page was made from: the board is hardware/schematics/musicbrain-vcf8kern/musicbrain-vcf8kern.kicad_pcb. PCBKit opens the board in the browser, with nothing to install.
Its repository publishes it under the MIT licence: you may reuse it on that licence's terms (keep the author's notice, and for a copyleft licence share your changes alike).