
FujiNet-7800-Rev0
FujiNetWIFI/fujinet-hardware
Schematics and design files for FujiNet hardware

Schematics and design files for FujiNet hardware
FujiNet-5200-Rev0 is an open-source printed circuit board by FujiNetWIFI, from the FujiNetWIFI/fujinet-hardware repository on GitHub. It is a 6-layer board of 84 × 98 mm with 145 parts on 178 nets, routed with 1,192 tracks and 594 vias.
It is built around the RP2354B, SN74HCT541PWRE4 and 74LVC1G17GW,125-JSM, with the ESP32-S3-WROOM-1-N16R8, AP63203WU and AP63205WU among its other parts. Its parts include 52 capacitors, 30 resistors, 11 ICs, 9 diodes and 4 connectors. It belongs with the ESP32 and RP2350 boards of this library.
All-in-one Atari 2600 FujiNet cartridge, the RP2354A successor to the
RP2040 Rev0 (branch atari2600-rev0). It is the hardware for the 2600
bring-up in fujinet-firmware (branch 2600-experiment, worktree
~/Workspace/fn-2600).
pico/atari-2600, board fujivcs, ported to the RP2350 as listed below).
The cartridge port goes straight to the RP: A0-A12 on GP2-GP14 and D0-D7
on GP15-GP22, exactly as include/vcs_pins.h. RP2350 GPIO0-25 are
"Digital IO (FT)": 5.5 V-tolerant while IOVDD is 3.3 V, and a 3.3 V high
clears the 6507's TTL VIH (2.0 V). No '245 buffers and no direction pin:
the firmware's per-access output enable is the only direction control.fujiversal-atari2600 build of
fujinet-firmware and is the RP's USB host (S3 IO19/IO20 -> 27R -> RP USB;
the RP enumerates as CDC, VID 0xCafe). There is no UART between the chips.4 layers, fully routed, DRC clean with schematic parity, JLCPCB fab +
assembly files in exports/jlcpcb/. Everything is generated from
tools/design.py (circuit), tools/sch_layout.py (schematic drawing) and
tools/placement.py (layout): edit those, never the KiCad files.
| RP2354A | QFN-60 pin | Net | Firmware |
|---|---|---|---|
| GP2-GP14 | 4,5,7-10,12-18 | A0-A12 (CA0-CA12) | ADDR_PIN 2, ADDR_BITS 13 |
| GP15-GP22 | 19, 27-29, 31-34 | D0-D7 (CD0-CD7) | D0_PIN 15 |
| GP25 | 37 | RP_LED (680R, red LED) | PICO_DEFAULT_LED_PIN |
| GP27 | 41 | VSENSE (console 5 V x 0.6) | new: power sense |
| GP0 / GP1 | 2 / 3 | RP_TX / RP_RX (TP4 / TP5) | debug UART |
| GP26 | 40 | not connected | the RP2040 board's DIR_PIN (harmless if written) |
| GP23, 24, 28, 29 | not connected | ||
| USB DP/DM | 52 / 51 | 27R -> S3 IO20 / IO19 | CDC device |
| RUN / QSPI_SS | 26 / 60 | 10k pull-ups; 1k from S3 IO4 / IO5; RESET / BOOTSEL buttons | PIN_RP2040_RUN 4, PIN_RP2040_BOOTSEL 5 |
| SWCLK / SWDIO | 24 / 25 | TP1 / TP2 (TP3 GND) | first flash |
ESP32-S3 pins are exactly include/pinmap/fujiversal-atari2600.h: SD CS 41,
SCK 39, MISO 40, MOSI 38, CD 42 (10k pull-up), LED strip 48, UART0 43/44,
RUN 4, BOOTSEL 5, USB host 19/20. tools/check_nets.py checks all of this
against the firmware headers (290 checks).
2x12 gold fingers at 2.54 mm pitch, 1.5 x 7.0 mm, starting 0.5 mm from the
edge; tab 32.4 mm with 45-degree shoulders (geometry and orientation from the
FujiPlusCart prototype gerbers, ../FujiPlusCart-Prototype).
| Face | Fingers, left -> right (component face toward you) |
|---|---|
| F.Cu (components, console rear) | 13 D3, 14 D4, 15 D5, 16 D6, 17 D7, 18 A12, 19 A10, 20 A11, 21 A9, 22 A8, 23 +5V, 24 GND |
| B.Cu (label side, console front) | 12 GND, 11 D2, 10 D1, 9 D0, 8 A0, 7 A1, 6 A2, 5 A3, 4 A4, 3 A5, 2 A6, 1 A7 (pin 1 behind pin 24) |
The port carries no R/W, clock, chip select or reset: A12 is the only decode.
Root + four wired sheets, drawn left to right in signal-flow order
(docs/Fujiversal-Atari2600-Rev1-schematic.pdf):
Nets cross sheets only on global labels at the page edges; every pin is wired
or flagged no-connect. gen_sch.py lints each sheet (connectivity, overlaps)
and checks the written schematic's netlist (kicad-cli) against design.py
net by net.
case/ (see case/case-spec.md), two options, both driven by
case/board-anchors.scad (generated from the placement): a clamshell over
the board's top with the tab bare (Fujiversal-Atari2600-Shell.scad), or a
full-size cartridge re-modelled from norm8332's "Easy Print" 2600 shell
(Fujiversal-Atari2600-CartShell.scad).pio run -e fujiversal-atari2600 -t upload.openocd -f interface/cmsis-dap.cfg -f target/rp2350.cfg -c "adapter speed 5000; program fujivcs.elf verify reset exit".On fujinet-firmware 2600-experiment:
boards/fujivcs2354.cmake/.h):
PICO_PLATFORM rp2350, boards/pico2.h-style header, 2 MB flash (stacked).vcs_pins.h / main.c: drop DIR_PIN (GP26 is unconnected here); keep the
output-enable drive/release; give D0-D7 more than the 2 mA drive they had
when they only faced a '245 (they now drive the console bus).pico_usb_reset +
PICO_ENABLE_USB_RESET_VIA_BAUD_RATE=1) for the S3's PICOBOOT path.pico_* keys + CONFIG_USB_PICOBOOT_HOST_ENABLED in
platformio-fujiversal-atari2600.ini, and the missing
data/webui/config/fujiversal-atari2600.yaml.tools/check_nets.py prints NOTE lines for 1 and 2 until they are done.
exports/jlcpcb/Fujiversal-Atari2600-Rev1-gerbers.zip.BOM-JLCPCB.csv + CPL-JLCPCB.csv (82 parts). The board is narrower than
JLC's 70 mm single-board minimum, so let JLC add the edge rails (not on the
finger edge). Three fiducials are on the board.tools/audit/jlc/jlc_rotations.json;
ESP32-S3 origin +3.62 mm, USB-C -1.41 mm). Check pin-1 marks in JLC's
placement preview anyway.KiCad 10.0.6, Python 3 (numpy), Java + Freerouting 2.4.1
(~/.local/share/freerouting/freerouting-2.4.1.jar), the firmware tree at
~/Workspace/fn-2600 (or $FUJINET_FIRMWARE). tools/build_all.sh runs the
schematic stage; LAYOUT=1 tools/build_all.sh adds the board (about 12 minutes):
python3 tools/harvest_symbols.py # stock KiCad symbols -> tools/symcache.sexpr
python3 tools/make_edge_fp.py # 2x12 finger footprint
python3 tools/make_fp_extra.py # SOT-23-5, fiducial
python3 tools/gen_sch.py # design.py + sch_layout.py -> root + 4 wired sheets; netlist parity
kicad-cli sch erc --severity-all --exit-code-violations Fujiversal-Atari2600-Rev1.kicad_sch -o /dev/null
python3 tools/check_nets.py # netlist vs the fn-2600 firmware headers
python3 tools/gen_pcb.py # outline, placement, RP regulator graft, plane islands, fan-out, rules
bash tools/route_board.sh # Freerouting, A* finisher, tidy, GND stitching, 3D models, silk, DRC gate
python3 tools/export.py # BOM, JLC BOM + CPL, gerbers, schematic PDF, SVGs, rendersdocs/design-review-rev1.md is the datasheet-backed review (schematic + PCB).
analysis/ (gitignored) holds the analyzer runs and analysis/deep_review.json;
tools/audit/ holds the computations it cites (margins.py), the deep-review
generator, the PCB audit runner and the JLC rotation table.
.kicad-happy.json records the intentional findings and why.
python3 <kicad-happy>/skills/lcsc/scripts/sync_datasheets_lcsc.py Fujiversal-Atari2600-Rev1.kicad_sch
python3 <kicad-happy>/skills/kicad/scripts/analyze_schematic.py Fujiversal-Atari2600-Rev1.kicad_sch --analysis-dir analysis/
bash tools/audit/run_pcb_audit.sh # PCB, cross, EMC, thermal, SPICE, gerbers, summary
python3 tools/audit/make_deep_review.py && python3 <kicad-happy>/skills/kicad/review/scripts/deep_review_gate.py analysis/deep_review.json --analysis-dir analysis/Rev1, generated 2026-10-06. Not built or tested on hardware.
| Check | Result |
|---|---|
| Schematic lint + netlist parity | 73 nets match design.py |
ERC (--severity-all) | 0 violations |
tools/check_nets.py | 290 / 290 (NOTE: firmware not yet ported to the RP2350) |
DRC (--refill-zones --schematic-parity) | 0 errors, 0 unconnected, 0 parity; 4 warnings (the ESP32 module's silkscreen meets the top edge it sits flush with) |
| Routing | 100 %, 339 vias (117 GND stitching) |
| Connector alignment (2026-10-13) | The USB-C (J3) moved 1.0 mm to HRO's recommended PCB-edge position (its face had sat 0.55 mm inside the board, where a plug's overmold meets the PCB edge), and the microSD / USB-C 3D models were re-seated on their footprints. DRC: no new findings (review, "Post-layout change") |
| kicad-happy | schematic 0 errors; SPICE 16/16 pass; DFM (JLC standard tier) 0 violations; Deep Review 19/19 verified; dispositions in the review |
| Shell | clamshell: both halves render 2-manifold in OpenSCAD; cart shell: front, rear and holder render 2-manifold, the board/part interference check is empty, outside faces match norm8332's STLs within 0.3 mm |
| LCSC / JLC | every part in stock |
edge_recess, see case/case-spec.md).PIN_CARD_DETECT.CERN-OHL-W-2.0.
RPI-RP2350A-MINIMAL_R4-S1, MIT, tools/RPI-MINIMAL-LICENSE.txt),
the layout the RP2350 datasheet (6.3.8) says to follow.make_edge_fp.py).NES/FujiNet-NES-Rev0/tools (schematic drawing, routing
tools), with Rev0's 2600 outline and checks.case/Fujiversal-Atari2600-CartShell.scad): re-modelled
from "Atari 2600 Cartridge Shell - Easy Print" by norm8332
(https://www.thingiverse.com/thing:1790785, Creative Commons Attribution);
changes listed in the file header and case/case-spec.md.3d/README.md.| Path | Contents |
|---|---|
Fujiversal-Atari2600-Rev1.kicad_pro/.kicad_sch/.kicad_pcb/.kicad_dru | KiCad 10 project: root + edge-rp2354a, esp32s3-sd, usb-uart, power |
Fujiversal-Atari2600.kicad_sym, Fujiversal-Atari2600.pretty/, 3d/ | project libraries and models |
Fujiversal-Atari2600-Rev1-BOM.csv | grouped BOM, MPN + LCSC on every line |
exports/jlcpcb/ | gerbers zip, BOM-JLCPCB.csv, CPL-JLCPCB.csv |
docs/ | schematic PDF, layout SVGs, 3D renders, design-review-rev1.md |
case/ | OpenSCAD shells (clamshell + full-size cart), generated anchors, case-spec.md |
datasheets/manifest.json | datasheet sources (PDFs gitignored) |
tools/ | the generator pipeline; tools/audit/ the review tooling |
| Qty | Value | Footprint | References |
|---|---|---|---|
| 28 | 100nF | FujiNet-5200:C_0603_1608Metric | C2, C10, C13, C14, C15, C17, C18, C19, C20, C26, C28, C29, C32, C34, C36, C37 +12 |
| 10 | 22uF | FujiNet-5200:C_0805_2012Metric | C3, C11, C12, C21, C22, C23, C44, C45, C47, C48 |
| 6 | 10k | FujiNet-5200:R_0603_1608Metric | R4, R5, R6, R13, R21, R26 |
| 5 | 1k | FujiNet-5200:R_0603_1608Metric | R9, R14, R15, R18, R20 |
| 5 | 4.7k | FujiNet-5200:R_0603_1608Metric | R3, R22, R24, R25, R29 |
| 4 | 100k | FujiNet-5200:R_0603_1608Metric | R7, R8, R23, R28 |
| 4 | 10uF | FujiNet-5200:C_0603_1608Metric | C5, C24, C42, C51 |
| 4 | 1uF | FujiNet-5200:C_0603_1608Metric | C1, C8, C33, C35 |
| 4 | 4.7uF | FujiNet-5200:C_0603_1608Metric | C7, C16, C25, C27 |
| 3 | ESD5Z5.0T1G | FujiNet-5200:D_SOD-523 | D1, D2, D3 |
| 3 | Fiducial_1mm_Mask2mm | FujiNet-5200:Fiducial_1mm_Mask2mm | FID1, FID2, FID3 |
| 3 | MountingHole_3.2mm_NPTH | FujiNet-5200:MountingHole_3.2mm_NPTH | H1, H2, H3 |
| 2 | 15pF | FujiNet-5200:C_0603_1608Metric | C30, C31 |
| 2 | 22k | FujiNet-5200:R_0603_1608Metric | R10, R27 |
| 2 | 27R | FujiNet-5200:R_0603_1608Metric | R16, R17 |
| 2 | 2N7002 | FujiNet-5200:SOT-23 | Q1, Q2 |
| 2 | 5.1k | FujiNet-5200:R_0603_1608Metric | R1, R2 |
| 2 | BAT54C | FujiNet-5200:SOT-23 | D5, D9 |
| 2 | GND | FujiNet-5200:TestPoint_Pad_D1.5mm | TP6, TP12 |
| 2 | SS34 | FujiNet-5200:D_SMA | D4, D8 |
| 1 | +3V3 | FujiNet-5200:TestPoint_Pad_D1.5mm | TP1 |
| 1 | +3V3_RP | FujiNet-5200:TestPoint_Pad_D1.5mm | TP11 |
| 1 | +5V | FujiNet-5200:TestPoint_Pad_D1.5mm | TP2 |
| 1 | /EN40 | FujiNet-5200:TestPoint_Pad_D1.5mm | TP8 |
| 1 | /EN80 | FujiNet-5200:TestPoint_Pad_D1.5mm | TP9 |
| 1 | /OE1 | FujiNet-5200:TestPoint_Pad_D1.5mm | TP10 |
| 1 | /OE2 | FujiNet-5200:TestPoint_Pad_D1.5mm | TP13 |
| 1 | 0.35A | FujiNet-5200:Fuse_1206_3216Metric | F1 |
| 1 | 12MHz | FujiNet-5200:Crystal_SMD_3225-4Pin_3.2x2.5mm | Y1 |
| 1 | 2.2R | FujiNet-5200:R_0603_1608Metric | R30 |
| 1 | 3.3uH | FujiNet-5200:RPI_L_AOTA-B201610S3R3 | L2 |
| 1 | 330R | FujiNet-5200:R_0603_1608Metric | R19 |
| 1 | 33R | FujiNet-5200:R_0603_1608Metric | R12 |
| 1 | 4.7uH | FujiNet-5200:L_Sunlord_SWPA4030S | L3 |
| 1 | 47k | FujiNet-5200:R_0603_1608Metric | R11 |
| 1 | 4x10k | FujiNet-5200:R_Array_Convex_4x0603 | RN1 |
| 1 | 6.8uH | FujiNet-5200:L_Sunlord_SWPA4030S | L1 |
| 1 | 74HCT08 | FujiNet-5200:SOIC-14_3.9x8.7mm_P1.27mm | U8 |
| 1 | 74HCT14 | FujiNet-5200:SOIC-14_3.9x8.7mm_P1.27mm | U9 |
| 1 | 74HCT541 | FujiNet-5200:TSSOP-20_4.4x6.5mm_P0.65mm | U7 |
| 1 | 74LVC1G17 | FujiNet-5200:SOT-353_SC-70-5 | U11 |
| 1 | AO3401A | FujiNet-5200:SOT-23 | Q3 |
| 1 | AP2112K-3.3 | FujiNet-5200:SOT-23-5 | U6 |
| 1 | AP63203WU | FujiNet-5200:TSOT-23-6 | U4 |
| 1 | AP63205WU | FujiNet-5200:TSOT-23-6 | U10 |
| 1 | Atari5200_Cart_Edge_36 | FujiNet-5200:Atari5200_Cart_Edge_36 | J1 |
| 1 | BOOTSEL | FujiNet-5200:SW_SPST_TS-1187A | SW2 |
| 1 | CONS_5V | FujiNet-5200:TestPoint_Pad_D1.5mm | TP17 |
| 1 | CP2102N-A02-GQFN28 | FujiNet-5200:QFN-28-1EP_5x5mm_P0.5mm_EP3.35x3.35mm | U2 |
| 1 | DBG UART | FujiNet-5200:PinHeader_1x03_P2.54mm_Vertical | J4 |
| 1 | DVDD | FujiNet-5200:TestPoint_Pad_D1.5mm | TP3 |
| 1 | ESP32-S3-WROOM-1-N16R8 | FujiNet-5200:ESP32-S3-WROOM-1 | U1 |
| 1 | ILK | FujiNet-5200:SolderJumper-2_P1.3mm_Bridged_RoundedPad1.0x1.5mm | JP1 |
| 1 | PHI2 | FujiNet-5200:TestPoint_Pad_D1.5mm | TP15 |
| 1 | PRE5V | FujiNet-5200:TestPoint_Pad_D1.5mm | TP16 |
| 1 | PWR_OK | FujiNet-5200:TestPoint_Pad_D1.5mm | TP14 |
| 1 | RAWDC | FujiNet-5200:SolderJumper-2_P1.3mm_Bridged_RoundedPad1.0x1.5mm | JP2 |
| 1 | RAWDC | FujiNet-5200:TestPoint_Pad_D1.5mm | TP18 |
| 1 | RESET | FujiNet-5200:SW_SPST_TS-1187A | SW1 |
| 1 | RP2354B | FujiNet-5200:QFN-80-1EP_10x10mm_P0.4mm_EP3.4x3.4mm | U5 |
| 1 | RUN | FujiNet-5200:TestPoint_Pad_D1.5mm | TP7 |
| 1 | S3_BOOT | FujiNet-5200:SW_SPST_TS-1187A | SW4 |
| 1 | S3_RST | FujiNet-5200:SW_SPST_TS-1187A | SW3 |
| 1 | SWCLK | FujiNet-5200:TestPoint_Pad_D1.5mm | TP4 |
| 1 | SWDIO | FujiNet-5200:TestPoint_Pad_D1.5mm | TP5 |
| 1 | UMH3N | FujiNet-5200:SOT-363_SC-70-6 | U3 |
| 1 | USB-C | FujiNet-5200:USB_C_Receptacle_HRO_TYPE-C-31-M-12 | J2 |
| 1 | WS2812B-2020-V6 | FujiNet-5200:LED_WS2812B-2020_PLCC4_2.0x2.0mm | D6 |
| 1 | microSD | FujiNet-5200:TF-SMD_TF-015 | J3 |
| 1 | red | FujiNet-5200:LED_0603_1608Metric | D7 |

FujiNetWIFI/fujinet-hardware
Schematics and design files for FujiNet hardware

FujiNetWIFI/fujinet-hardware
Schematics and design files for FujiNet hardware

FujiNetWIFI/fujinet-hardware
Schematics and design files for FujiNet hardware

FujiNetWIFI/fujinet-hardware
Schematics and design files for FujiNet hardware

FujiNetWIFI/fujinet-hardware
Schematics and design files for FujiNet hardware

FujiNetWIFI/fujinet-hardware
Schematics and design files for FujiNet hardware

FujiNetWIFI/fujinet-hardware
Schematics and design files for FujiNet hardware

FujiNetWIFI/fujinet-hardware
Schematics and design files for FujiNet hardware

FujiNetWIFI/fujinet-hardware
Schematics and design files for FujiNet hardware

FujiNetWIFI/fujinet-hardware
Schematics and design files for FujiNet hardware

FujiNetWIFI/fujinet-hardware
Schematics and design files for FujiNet hardware

FujiNetWIFI/fujinet-hardware
Schematics and design files for FujiNet hardware


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Kami is a modernized re-imagining of the SHA2017 epaper badge by Badge.Team.
It measures 84 × 98 mm and has 6 copper layers, 1.6 mm thick.
145 parts, built around the RP2354B, SN74HCT541PWRE4, 74LVC1G17GW,125-JSM and ESP32-S3-WROOM-1-N16R8. The full list of its parts is on this page, with links to each part's symbol and footprint where PCBKit's library has them.
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