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4 layers80 × 60 mmMR1, the printed circuit board in 3D

MR1 specs

Size
80 × 60 mm
Copper layers
4
Thickness
1.6 mm
Parts
113
Nets
107
Pads
458
Tracks, vias
501, 79
Pours
7
Routed
Yes
KiCad
KiCad 10.0 (file 20260206)
Created
15 Nov 2025
Updated
4 Nov 2026

Overview

MR1 is an open-source printed circuit board by EpicQuestBio, from the EpicQuestBio/MR1 repository on GitHub, published under the CC0-1.0 licence. It is a 4-layer board of 80 × 60 mm with 113 parts on 107 nets, routed with 501 tracks and 79 vias.

It is built around the ESP32-S3-MINI-1U-N8, MCP4822-E/P and SN65220DBV, with the ADR4520ARZ-R7, LM27762DSS and LT3045EDD-1#TRPBF among its other parts. Its parts include 48 resistors, 34 capacitors, 10 ICs, 5 connectors and 3 diodes. It belongs with the ESP32 boards of this library.

Main components

12

README

README.md

MR1 Nanopore Reader (MR1)

Python 3.10+ build123d KiCad 10.0 PlatformIO Tests

The MR1 Nanopore Reader is an open-source, ultra-low-noise solid-state and biological nanopore sequencer flow cell, low-current transimpedance amplifier, and automated fluidic control system. It integrates high-precision parametric CAD models (build123d), ultra-low-leakage analog front-end electronics (KiCad), an automated dual-pump fluidic handler, and an ESP32-S3 high-speed continuous streaming firmware stack.

Architecture & Overview

The system uses a complete 4-electrode topology (Working Electrode WE_POS / >PORE_AMP, Working Sense WS_CIS & WS_CIS_WIDE, Reference Electrode RE_TRANS, Counter Electrode CE_GNDA) combined with explicitly driven guards (GUARD, GUARD_WIDE, GUARD_CIS_A, GUARD_CIS_B) across a distributed 12-pin interface ($36\text{ mm}$ span) to achieve sub-picoampere sensitivity, neutralize stray capacitance, and distribute mechanical spring forces across the PTFE substrate.

The architecture consists of:

  • Headstage Hardware: A custom, low-parasitic PTFE/Rogers interposer cartridge that seats a 4x4mm nanopore wafer clamped within silicone PDMS gaskets. It interfaces via gold-plated pogo pins to a low-bias-current transimpedance amplifier (LMP7721) mounted beneath the flowcell.
  • Reader Hardware (MR1): An ESP32-S3-driven core processing node operating a continuous 100 kHz SPI DMA data acquisition sequence, dual DACs for precision transmembrane voltage bias, and USB CDC-ACM streaming logic.
  • Pump / Power Subsystem: A dedicated USB-PD powered board managing automated fluidic dispensing (peristaltic motors), pressure sensing, and SBU-based I2C communication back to the main MR1 host.
  • Data Ingestion Pipeline: High-throughput IPC software utilizing python scripts (daq_client.py) and zeroMQ / WebSocket endpoints to reliably process, structure, decode, and log the real-time electrical data for machine learning basecalling or browser visualization.

Setup & Prerequisites

To build, modify, or interact with this repository, ensure your environment meets these requirements.

Toolchain Prerequisites

  • Python: 3.10+
  • KiCad: Version 7.0+ (For PCB design modifications and scripting exports)
  • PlatformIO Core (CLI): For firmware compilation (pio run)
  • OpenSCAD / build123d: For generating solid body parts.
  • Node.js: v18+ (For UI and test automation dependencies)

Environment Setup

Run the bootstrap setup scripts depending on your OS to establish a clean python virtual environment and node module cache.

bash
# On Linux/macOS
./setup_env.sh

# On Windows (PowerShell)
.\setup_env.ps1

Activate the python virtual environment:

bash
source .venv/bin/activate

Build & Test

You can trigger the comprehensive unit, integration, and dimension-parity tests using the included test suite.

bash
# Ensure you have activated the virtual environment and built assets
python run_tests.py
# Or directly via pytest
pytest tests/

To build and upload firmware to the MR1 reader or the Pump board:

bash
# Navigate to the target directory
cd MR1_firmware  # or cd Pump_firmware
pio run --target upload

License

This project is dedicated to the public domain under the CC0 1.0 Universal (CC0 1.0) Public Domain Dedication.

Created by Lawrence R. Kincheloe III / Molecular Reality Corp (2026). See the LICENSE file for the full text.


Table of Contents

System Architecture

text
                       +---------------------------------------+
                       |           Host PC / Laptop            |
                       |  (High-Throughput Binary Telemetry)   |
                       +-------------------+-------------------+
                                           | J1_HOST (USB-C Cable: USB-PD Sink + High-Speed Data)
                                           v
                       +---------------------------------------+
                       |      Pump Module Board (Pump/)        |
                       |  - STUSB4500 Autonomous USB-PD Sink   |
                       |  - TS3USB221 USB 2.0 Streaming Pass   |
                       |  - STM32G431 Control MCU @ 170 MHz    |
                       |  - Dual Honeywell ABP2 Pressure Sens  |
                       |  - Dual DRV8837C Peristaltic Drivers  |
                       |  - Clean Regulated 5V Output Filter   |
                       +-------------------+-------------------+
                                           | J2_MR1 (USB-C Link: +5V_MR1_CLEAN + SBU I2C + USB)
                                           v
                       +---------------------------------------+
                       |         ESP32-S3 MCU (MR1)            |
                       |  Core 1: ADC SPI DMA & USB CDC Stream |
                       |  Core 0: Web Server, Leak & Pump Ctrl |
                       +---------+-------------------+---------+
                                 |                   |
            SPI Bus (100 kHz)    |                   | UART (J22) / SBU I2C

Project Structure

text
mr1/
├── src/                          # Parametric CAD models (build123d / Python)
│   ├── cartridge.py              # Flow cell cartridge stack & PCB models
│   ├── housing.py                # Reader and Pump housings, lids, mounting
│   ├── nanopore_wafer_mold.py    # Interlocking two-part resin casting mold
│   ├── torque_cap.py             # M75/M76 ratcheting torque limiter cap
│   ├── adapters.py               # Luer-lock and threaded NPT fluidic adapters
│   ├── connectors.py             # USB-C, JST XH, and bulkhead panel mounts
│   ├── assembly.py               # Full 3D assembly & 3D spline routing sweeps
│   ├── collision_check.py        # Automated 3D BREP collision & clearance checker
│   └── constants.py              # Central engineering & physical parameters
├── MR1/                          # KiCad 10.0 project for Main Reader Board (4-Layer)
├── Amplifier/                    # KiCad 10.0 project for Cartridge Transimpedance Amp (2-Layer)
├── Pump/                         # KiCad 10.0 project for Pump Controller & USB-PD Hub (4-Layer)
├── MR1_firmware/                 # ESP32-S3 C++ firmware (PlatformIO)
│   ├── include/                  # Pinout mapping, binary protocol framing, web portal
│   ├── src/hal/                  # AD40xx SPI DMA ADC, MCP4822 DAC, Leak Detector
│   ├── src/comm/                 # High-speed USB CDC streaming & UART Pump protocol
│   └── src/web/                  # Embedded Web Portal with WebSocket Oscilloscope
├── wiring/                       # WireViz electrical and fluidic harness specs
│   ├── reader_wiring.yaml        # USB-C, motor, and analog pogo wiring harnesses
│   └── reader_tubing.yaml        # FEP, PharMed BPT, and silicone fluidic tubing specs
├── tests/                        # Automated unit, CAD bounds, firmware, and E2E tests
│   ├── test_geometry.py          # Geometric validity and collision regression

Quick Start & Environment Setup

1. Initialize Python Virtual Environment

The project uses a local virtual environment (.venv) for all Python CAD generation, export pipelines, and test suites.

On Windows (PowerShell):

powershell
.\setup_env.ps1

On Linux / macOS / Git Bash:

bash
chmod +x setup_env.sh install.sh
./setup_env.sh

To verify environment health at any time:

bash
./setup_env.sh --check        # or powershell -File .\setup_env.ps1 -Check

2. Required External Tools (Optional for specific export domains)

  • KiCad 10.0 CLI (kicad-cli): Required to generate Gerbers, Drill files, Pick & Place CSVs, BOMs, and PDF schematics.
  • Graphviz (dot): Required by WireViz for rendering graphical wiring and tubing diagrams.
  • PlatformIO Core (pio): Required to compile ESP32-S3 firmware binaries.

Deliverables & Export System

The repository features an automated multi-domain export orchestrator (scripts/export_manager.py) managed via GNU Make, shell scripts, or npm:

Common Commands

bash
# Export all project deliverables (CAD, KiCad, Wiring, Firmware, and Manifest)
make export

# Or export specific domains
make export-cad        # 3D Solids (STEP/STL) & 2D CNC Profiles (DXF)
make export-kicad      # Gerbers, Drill, POS, BOM, and PDF schematics
make export-wiring     # WireViz wiring harness and fluidic diagrams
make export-firmware   # Compile and stage ESP32-S3 firmware binaries

# Verify manifest and deliverables
make check             # Verify all 141 indexed deliverables exist on disk
make test              # Run unit tests and CAD collision clearance checks
make test-e2e          # Run end-to-end deliverables validation test

Generated Deliverables Inventory (exports/)

  • 30 STL Meshes: Ready for 3D printing (SLA resin molds, TPU pusher plates, PETG housings, and PTFE interposer models).
  • 22 STEP Models: Parametric BREP solids for mechanical assembly and CAD exchange.
  • 13 DXF Profiles: 2D profiles for CNC milling polypropylene sheet stock and synchronizing KiCad PCB Edge.Cuts (including Interposer_DXF.dxf and Plate_2_Channel_DXF.dxf).
  • Fab-Ready PCB Archives: MR1_Gerbers.zip (4-layer main board) and Amplifier_Gerbers.zip (2-layer amplifier).
  • Manufacturing Documentation: Pick-and-Place (POS) coordinates, BOM CSVs, and multi-sheet schematic PDFs.
  • Harness Documentation: WireViz diagrams for internal wiring and 1/8" barb fluidic tubing.
  • ESP32-S3 Firmware: Staged firmware.bin, bootloader.bin, and partitions.bin.
  • SHA-256 Manifest: exports/manifest.json tracks file sizes and cryptographic hashes for all 159 files for drift detection.

See EXPORTS.md for full details and PCB fabrication recommendations.


Hardware Build Pipeline & Board Status

Automated code scanners and reviewers sometimes mistake the repository's PCB source files for static production-ready layouts. The MR1 hardware design pipeline relies on two fundamental principles:

  1. Dynamic Artifact Generation: The .kicad_pcb layout files and downstream fabrication deliverables (Gerber layers, NC drill files, BOMs, Pick and Place POS files, multi-sheet PDF schematics) are dynamically generated and reconciled via the repository's automation pipeline (scripts/export_manager.py, Python footprint/layout generators, and kicad-cli), rather than being maintained as static hand-edited binaries in the working tree.

  2. Current Board Layout & Routing Status:

    • MR1 Main Reader Board (MR1/): 111 footprints placed, placement complete, 0 routed copper tracks.
    • Amplifier Cartridge Board (Amplifier/): 48 footprints placed, placement complete, 0 routed copper tracks.
    • Interposer Microfluidic Board (Interposer/): 33 footprints placed, 9 routed segments.
    • Pump Controller Board (Pump/): 18 footprints placed, procedurally generated stubs — STM32 QFN-48 currently a 1-pad stub with passives and 3D models pending per TODO.md §22.

For details on Gerber archiving, dynamic export workflows, and hardware version tags, see the Artifact & Gerber Release Policy in EXPORTS.md.


OpenAuto-CFD & Co-Design

The MR1 Nanopore Reader incorporates the OpenAuto-CFD co-design framework (openauto.project.json / atlas.project.json) to bridge Electrical CAD (KiCad), Mechanical CAD (Build123d / OpenSCAD), and Microfluidic Multiphysics into a single automated pipeline.

Why OpenAuto-CFD?

Nanopore sensing demands precise hydrodynamic and electro-chemical alignment:

  1. Laminar Stokes Flow ($\text{Re} \ll 1$): With $50,\mu\text{m} \times 25,\mu\text{m}$ channels and $10,\mu\text{L/min}$ delivery, OpenAuto-CFD calculates viscous pressure drops ($\Delta P \approx 6.2\text{ kPa}$) and eliminates turbulent vortex formation.
  2. SiN Membrane Burst Safety: Free-standing $20\text{ nm}$ silicon nitride membranes rupture at differential pressures $\Delta P_{\text{burst}} \sim 10\text{ mbar}$. OpenAuto-CFD co-simulation balances hydrodynamic resistance across Cis and Trans chambers to prevent wafer fracture.
  3. Dead-Volume & Bubble Prevention: Eliminates stagnation recirculation zones ($\vec{v} < 0.01 \cdot v_{\text{bulk}}$) that trap air microbubbles or cause analyte sample carryover.
  4. Concentric Kelvin Cell Coupling: Aligns the 4-electrode Kelvin sensing array on the PTFE interposer directly with the microfluidic chamber aperture.

See the comprehensive OpenAuto-CFD Guide for full physical derivations and co-simulation specs.


3D Visualizer & Interactive Inspection

The repository provides a rich multi-layer 3D visualizer powered by build123d and ocp_viewer:

bash
# Launch interactive 3D assembly visualizer
npm run visualize
# Or via Python directly:
python src/assembly.py

# Or launch via install script diagnostic flag:
./install.sh --viewer

Visualizer Features

  • Full System Assembly: Displays the Peristaltic Pump base module, Reader Housing & Tower, 4× Luer Bulkhead Panel Mounts, 7-layer Cartridge Stack (Bottom Pusher Plate, Base Hex Plate, Fitted Gasket, Active PCB, Wafer Gasket, Top Hex Plate, Pressure Puck), and Torque-Lock Cap.
  • 3D Swept Tubing Routes: Renders actual 3D splines for all 5 fluidic paths (TUBE_PUMP, TUBE_FEED, TUBE_TRANS_LINE, TUBE_WASTE_1, TUBE_WASTE_2) with verified bend radii.
  • X-Ray & Clipping Plane Inspection: Enables cross-sectional slicing to verify internal gasket compression and pogo pin deflection.
  • WireViz Electrical & Tubing Harnesses: Generates SVG and HTML diagrams for internal wiring (wiring/reader_wiring.yaml) and fluid lines (wiring/reader_tubing.yaml) via npm run export:wiring.
  • Automated 360° Flythrough Video: Renders photorealistic rotating orbits using PyVista VTK via npm run render:flythrough.

KiCad Action Plugin & CLI

The repository includes a dedicated KiCad Action Plugin and CLI verification engine (plugins/openauto_cfd_plugin.py) ensuring PCB layouts strictly comply with mechanical, fluidic, and manifest constraints.

How to Install the Plugin into KiCad

bash
# Install plugin into active KiCad installation (~/.local/share/kicad/ or %APPDATA%/kicad/)
npm run openauto:install-plugin
# Or via Python:
python plugins/openauto_cfd_plugin.py --install

Using Inside KiCad PCB Editor (GUI)

  1. Open any board (Amplifier.kicad_pcb, MR1.kicad_pcb, Pump.kicad_pcb, or Interposer.kicad_pcb).
  2. Navigate to Tools $\to$ External Plugins $\to$ OpenAuto-CFD: Co-Design & Clearance Verifier.
  3. The plugin parses the board, checks Edge.Cuts continuity, verifies bounding dimensions against openauto.project.json, and displays a comprehensive verification report.

Standalone CLI & CI/CD Verification

bash
# Validate all 4 boards in headless mode (Edge.Cuts continuity, dimensions, and net mapping)
npm run openauto:validate

# Synchronize Edge.Cuts dimensions back into the openauto.project.json manifest
npm run openauto:sync

Testing & Verification

The project enforces zero physical interference and strict dimensional fidelity across all hardware interfaces:

bash
# Run the complete test suite (Unit Tests, Collision Checks, Firmware Protocol, Parity, and E2E)
python run_tests.py

Automated Validation Includes:

  1. Golden STL & PCB Bounds: Asserts dimensions of all generated CAD models against benchmark constraints.
  2. BREP Collision Clearance (6 Independent Suites):
    • Cartridge stack component alignment.
    • Housing and lid clearances.
    • M75×8mm external / M76×8mm internal helical thread engagement (0 interference volume).
    • PCB standoff clearances against fluidic lines.
    • Internal component clearance (wiring vs. cartridge solids).
    • Flexible routing collision sweeps against module envelopes.
  3. Spline Bend Radius Validation: Computes instantaneous curvature along swept routes and verifies compliance with minimum bend radii (Silicone/FEP tubing $\ge 10\text{ mm}$, Wiring $\ge 10\text{ mm}$).
  4. CAD Feature Validation Suite: Validates 80x60mm rectangular motherboard, hexagonal carrier frame, circular nanopore carrier, mold modes, lid cutouts, and pump case bosses.
  5. Firmware Protocol Tests: CRC-16 integrity, binary packet serialization (StreamFrame), pump packet XOR checksums, and DAC voltage-to-code mapping.
  6. E2E Deliverables Tests: Validates headers, non-zero file sizes, and SHA-256 hashes of all 159 export deliverables.

Hardware & Electronics

  • MR1 Main Controller Board (MR1/):
    • 4-Layer stackup:
      • Layer 1 (Top Signal): Component placement, USB D+/D-, SPI traces to FPC, DAC outputs
      • Layer 2 (Ground Plane): Split into GNDA (Quiet Analog Ground) and GND (Digital Ground)
      • Layer 3 (Power Plane): Split into Analog Power (VDDA, VSSA) and Digital Power (+3V3, VBUS)
      • Layer 4 (Bottom Signal): Secondary routing, low-speed housekeeping, and auxiliary pours
    • ESP32-S3-MINI-1U MCU with native high-speed USB CDC.
    • Dedicated SPI bus for high-speed ADC sampling.
    • Dual MCP4822 12-bit DACs providing bipolar pore bias voltages (-1.587V to +1.587V) and unblocking pulses.
    • Conductive weep-hole leak detection sensing on GPIO1.
  • PTFE Interposer Circuit Board (Interposer/ & src/cartridge.py):
    • 55.0 × 51.962 × 0.8 mm hexagonal substrate fabricated on ultra-low-loss PTFE / Rogers RO4350B.
    • Physical and electrical barrier dividing Cis (top) and Trans (bottom) microfluidic chambers.
    • Dual-sided silver chloride (Ag/AgCl) ribbon electrode pads positioned inside the Cis ($30^\circ$) and Trans ($210^\circ$) flow channels.
    • Central 6.20 × 6.20 mm diamond cutout ($45^\circ$) allowing the silicone gasket protrusion to seal directly around the silicon nanopore wafer.
    • 12-pin guarded ENIG landing array (PogoPin_Target_12Pin_Distributed) flanking high-impedance sense lines (WS_CIS, RE_TRANS) with driven low-impedance GUARD pins.
    • Hermetically clamped between Cast_Nanopore_Wafer_Gasket (top) and Fitted_Amplifier_Gasket (bottom).
  • Cartridge Transimpedance Amplifier (Amplifier/):
    • 2-Layer 0.8 mm ultra-thin board designed for direct insertion into the flow cell stack.
    • LMP7721 ultra-low input bias current amplifier (sub-femtoampere leakage).
    • Low-leakage guard rings and driven shields guarding the high-impedance nanopore input node.
    • Direct connection to flow cell via gold-plated Mill-Max pogo pins.
  • Pump Controller & USB-PD Hub Board (Pump/ & src/cartridge.py):
    • 4-Layer 1.6 mm board (88.0 × 88.0 mm) fitting within the Housing_Pump_Case internal pocket.
    • Dual USB-C Receptacles:
      • J1_HOST at $X = -15.0\text{ mm}$ (top edge): USB-PD Sink + Host laptop data interface.
      • J2_MR1 at $X = +15.0\text{ mm}$ (top edge): Regulated clean 5V power output to MR1 Reader + SBU I2C control link.
      • Perfectly aligned to the $12 \times 6\text{ mm}$ cutouts on Housing_Pump_Case rear wall ($Y = 55.0\text{ mm}$).
    • High-Speed USB 2.0 Pass-Through: TI TS3USB221 multiplexer (>1.1 GHz bandwidth, insertion loss < 0.5 dB) passes 100 kHz continuous ADC telemetry straight through to the laptop without MCU latency.
    • STUSB4500 Autonomous USB-PD Sink: Automatically negotiates 9V/12V/15V/20V profiles from USB-PD power sources.
    • Clean +5V Output Subsystem: Synchronous step-down buck converter (36V/3A) + TPS22916 soft-start load switch + LC $\pi$-filter ensuring ultra-low ripple 5V power for MR1's analog frontend.
    • STM32G431CBU6 Control MCU: ARM Cortex-M4 @ 170 MHz orchestrating precision TIM1 PWM peristaltic velocity control, I2C telemetry, and hardware emergency stop gating.
    • Dual Honeywell TruStability / ABP2 Pressure Transducers:
      • Transducer 1 (0-15 psi gauge): Real-time pressure monitoring on Cis chamber feed line.
      • Transducer 2 (0-5 psi gauge): Real-time pressure monitoring on Trans chamber recirculation line.
    • Dual TI DRV8837C Motor Drivers: 1.8A peak H-bridge drivers with hardware shutdown interlock directly connected to the weep moat leak detector.

ESP32-S3 Firmware

Located in MR1_firmware/ (ESP32-S3 Main Reader) and Pump_firmware/ (STM32G431 Peristaltic Pump & USB-PD Hub):

  • Dual-Core Architecture:
    • Core 1: Dedicated to continuous 100 kHz SPI DMA ADC sampling and high-throughput USB CDC streaming.
    • Core 0: Handles Wi-Fi AP/station management, AsyncWebServer, WebSocket oscilloscope telemetry, and pump control.
  • High-Throughput Binary Protocol: Frames of 64 decimated/raw samples packed with sequence IDs, 64-bit microsecond timestamps, and CRC-16 checksums.
  • USB-C SBU Auto-Polarity Detection: Dynamic GPIO-matrix sensing on SBU1/SBU2 pins automatically determines clock (SCL) and data (SDA) orientation for I2C communication to external pump modules, working seamlessly regardless of cable flip.
  • Embedded Web Oscilloscope: Live HTML5 Canvas visualization accessible via browser over Wi-Fi without needing host drivers.

Host 100 kHz Streaming DAQ Client (scripts/daq_client.py)

A high-performance Python client for acquiring continuous 100 kHz binary telemetry from the MR1 Reader:

bash
# Live acquisition with terminal dashboard and CSV logging
python scripts/daq_client.py --port COM3 --bias 180.0 --output data.csv

# Run mock simulation mode (generates baseline ionic current & DNA translocation events)
python scripts/daq_client.py --mock --duration 5.0 --output simulation.csv

# Execute SBU I2C polarity auto-detection and start pump
python scripts/daq_client.py --port COM3 --sbu-detect --pump 60
  • Binary Frame Synchronization: Synchronizes on "SENT" magic word (0x53454E54 / little-endian b"TNES").
  • CRC-16-CCITT Verification: 100% integrity validation on every 146-byte packet.
  • Pore Current Conversion: Converts differential 16-bit counts to Amperes ($I_{\text{pore}} = V_{\text{adc}} / R_f$, default $R_f = 1\text{ G}\Omega \implies 1\text{ V}/1\text{ nA}$).
  • Real-Time Telemetry Dashboard: Live sample rate (kS/s), data throughput (KB/s), dropped frame count, RMS current noise, pump status, and leak monitoring.

Fluidic Routing & Mold Casting

  • Standardized Tubing: All microfluidic connections standardize on 1/8" ID $\times$ 1/4" OD tubing and 1/8" hose barb panel-mount fittings.
  • Fluid Lines:
    • TUBE_PUMP: PharMed BPT (0.12 m) — Buffer reservoir $\to$ Peristaltic pump.
    • TUBE_FEED: FEP (0.22 m) — Pump $\to$ Cis chamber inlet ($210^\circ$).
    • TUBE_TRANS_LINE: PEEK (0.18 m) — Trans chamber outlet ($150^\circ$) $\to$ Waste.
    • TUBE_WASTE_LINES ($\times 2$): Silicone (0.25 m) — Cis outlet ($30^\circ$) and Trans inlet ($330^\circ$).
  • Gasket Fabrication: Two-part resin casting mold (Nanopore_Wafer_Mold_Left and Right) designed for casting degassed PDMS (Sylgard 184) or high-compliance silicone around the silicon nanopore wafer. See CASTING.md for detailed surface preparation, degassing, and curing procedures.

Documentation Index

Open Source Governance & Policies

  • CONTRIBUTING.md: Engineering guidelines, code style, and pull request workflow.
  • CODE_OF_CONDUCT.md: Contributor Covenant v2.1 standards and pledge.
  • SECURITY.md: Security vulnerability reporting policy and electrical safety bounds.
  • CITATION.cff: Academic citation metadata for research and publications.
  • LICENSE: CC0 1.0 Universal (CC0-1.0) Public Domain Dedication.

Hardware & Manufacturing Specifications

  • BOM.md: Complete mechanical, fluidic, PCB, and active electronic bill of materials with sourcing links.
  • EXPORTS.md: Complete export deliverables catalog, fab ordering specifications, and drift tracking.
  • CASTING.md: Engineering guide for casting ultra-low-noise PDMS gaskets.
  • PROJECT.md: Project architecture, interface contracts, and milestone tracking.
  • TODO.md: Development roadmap and completed porting phases.

Firmware & Protocols

Co-Design, Simulation & Tools

Parts

113
QtyValueFootprintReferences
1727Resistor_SMD:R_0402_1005MetricR10, R15, R16, R27, R28, R33, R36, R37, R39, R40, R41, R42, R43, R53, R54, R96 +1
1110k 1%Resistor_SMD:R_0402_1005MetricR9, R13, R18, R22, R23, R24, R25, R26, R34, R55, R56
104.7uCapacitor_SMD:C_0402_1005MetricC8, C9, C10, C13, C14, C15, C18, C23, C24, C26
7100nFCapacitor_SMD:C_0402_1005MetricC25, C27, C29, C31, C32, C33, C39
610uCapacitor_SMD:C_0402_1005MetricC7, C16, C17, C118, C119, C121
415KResistor_SMD:R_0402_1005MetricR11, R12, R48, R52
41MResistor_SMD:R_0402_1005MetricR21, R30, R38, R47
4MountingHole_PadMountingHole:MountingHole_3.2mm_M3_Pad_ViaH6, H7, H8, H9
3NetTie_2NetTie:NetTie-2_SMD_Pad0.5mmNT1, NT2, NT4
20Resistor_SMD:R_0402_1005MetricR32, R51
2100uCapacitor_SMD:C_1206_3216MetricC40, C42
210kResistor_SMD:R_0402_1005MetricR31, R145
210nFCapacitor_SMD:C_0402_1005MetricC11, C12
212pCapacitor_SMD:C_0402_1005MetricC51, C52
21N4148WT-7Diode_SMD:D_SOD-523D1, D2
222uCapacitor_SMD:C_0402_1005MetricC21, C22
224.9k 0.1%Resistor_SMD:R_0402_1005MetricR2, R7
22pFCapacitor_SMD:C_0402_1005MetricC28, C36
25.1kResistor_SMD:R_0402_1005MetricR14, R17
2SN65220Package_TO_SOT_SMD:SOT-23-6U7, U12
2SparkGapJumper:SolderJumper-2_P1.3mm_Open_TrianglePad1.0x1.5mmE1, E2
11nFCapacitor_SMD:C_0402_1005MetricC43
120kResistor_SMD:R_0402_1005MetricR35
124kResistor_SMD:R_0402_1005MetricR29
12SA1037Package_TO_SOT_SMD:SOT-23Q1
132.768 kHzCrystal:Crystal_SMD_3215-2Pin_3.2x1.5mmY2
19.09kResistor_SMD:R_0402_1005MetricR20
19.16kResistor_SMD:R_0402_1005MetricR19
1ADR4520Package_SO:SOIC-8_3.9x4.9mm_P1.27mmU13
1B4B_PHConnector_JST:JST_PH_B4B-PH-K_1x04_P2.00mm_VerticalJ22
1CMBT2222APackage_TO_SOT_SMD:SOT-23Q2
1Conn_01x14_MountingPinConnector_FFC-FPC:Amphenol_F32R-1A7x1-11014_1x14-1MP_P0.5mm_HorizontalJ7
1Conn_ARM_JTAG_SWD_10Connector_PinHeader_1.27mm:PinHeader_2x05_P1.27mm_Vertical_SMDJ36
1ESP32-S3-MINI-1URF_Module:ESP32-S2-MINI-1UU8
1Jumper_1Connector_PinHeader_2.54mm:PinHeader_1x02_P2.54mm_VerticalJ23
1LM27762Package_SON:WSON-12-1EP_3x2mm_P0.5mm_EP1x2.65_ThermalViasU1
1LT3045xDDPackage_DFN_QFN:DFN-12-1EP_3x3mm_P0.5mm_EP1.6x2.5mmU4
1LT3094xDDPackage_DFN_QFN:DFN-12-1EP_3x3mm_P0.45mm_EP1.65x2.38mm_ThermalViasU2
1MBR0540Diode_SMD:D_SOD-123D82
1MCP4822Package_SO:SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.29x3mmU9
1NCP163ASN330T1GPackage_TO_SOT_SMD:SOT-23-5U33
1OPA197xDPackage_SO:VSSOP-8_3x3mm_P0.65mmU3
1TestPointTestPoint:TestPoint_Pad_D1.0mmTP11
1USB_C_Receptacle_USB2.0Connector_USB:USB_C_Receptacle_HRO_TYPE-C-31-M-12J3

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Questions

How big is the MR1 PCB?

It measures 80 × 60 mm and has 4 copper layers, 1.6 mm thick.

What parts does the MR1 use?

113 parts, built around the ESP32-S3-MINI-1U-N8, MCP4822-E/P, SN65220DBV and ADR4520ARZ-R7. The full list of its parts is on this page, with links to each part's symbol and footprint where PCBKit's library has them.

Where can I download the MR1 KiCad files?

From the EpicQuestBio/MR1 repository on GitHub, at the commit this page was made from: the board is MR1/MR1.kicad_pcb and its schematic Amplifier/Amplifier.kicad_sch. PCBKit opens the board in the browser, with nothing to install.

Can I use the MR1 design in my own project?

Its repository publishes it under the CC0-1.0 licence: you may reuse it on that licence's terms (keep the author's notice, and for a copyleft licence share your changes alike).