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PCB footprint certificates: 905 parts against the maker's drawing

Sergey Alekseev

A PCB footprint certificate is a small file that says why a part’s land pattern and pin table are right for the exact part the board orders, citing the maker’s datasheet page by page. A separate checker that shares no code with PCBKit re-reads every citation in the PDF and decides. On the 44 boards of our open board library, 905 of the 1,230 ordered parts are certified this way. We planted defects in those certificates on purpose to see if the checker could be fooled. In the latest run it refuted 866 of them and certified none.

Why footprints and pin tables

When we collected 462 real respin faults from public KiCad projects, the largest class was the footprint: the land is not the part’s (another package, size, pitch or pad numbering). Pinouts came second. Together they are most of what people fix between revision A and B. Neither KiCad’s DRC nor any checker we ran reads the one document that decides them: the maker’s drawing of the part that arrives.

A design rule check compares copper with copper. It can tell you two pads are too close. It cannot tell you that an MSOP land was drawn for a part that ships as a 4.4 mm TSSOP, because nothing on the board says what the part really is.

What a certificate checks

Each certificate has two sides. The board side is copied from the board: the footprint’s pads in its own frame, the symbol’s pin names, the nets, the order code. The datasheet side cites the maker’s PDF: the ordering row, the pin table, the package drawing’s dimensions, each with its page and its box on the page.

The checker, certcheck, is a Python program using only the standard library and poppler’s pdftotext. It runs one check per question:

Check What it asks
doc@1 is it the same PDF (SHA-256, page count)
text@1 is every cited string printed on its page, inside its box; is each pin row’s number and name on one row of the table
variant@1 is the ordered part number the first word of the cited ordering row, with its package on that row
pins@1 does every pad have one row, every row one pad; do the names agree with the symbol
connect@1 is a supply pin on a supply, a ground pin on ground, a pin that must be driven driven
land@1 do the leads, at the drawing’s nominal dimensions, land on their pads
polarity@1 is a polarised part the right way round

Every check gives one of three verdicts. Certified: the board matches facts the checker found in the document itself. Conditional: something is missing; the verdict says what (no pin table cited, the drawing is a raster image, the drawing does not name the ordered package). Refuted: the board contradicts the document. The verdict names the fact.

The land check is lead fit. Each lead’s foot at the drawing’s nominal dimensions must sit at least 60 % on its own pad and at least 0.05 mm from every other lead’s foot. The footprint may be turned by 0, 90, 180 or 270 degrees, never mirrored. Our first design used overlap with the IPC-7351B nominal land (refute below 0.80). That would have refuted KiCad’s SOD-123 land for a 1N5819HW at 0.50. That land solders fine. A choice of land density is not a defect. A lead off its pad is.

A model proposes, the checker decides

Citing a datasheet by hand takes minutes per part. Most of the citations now come from a model (Claude Sonnet 5.5 at medium effort) that reads the PDF through tools: search the text layer, read a page as the checker reads it, read a box by OCR. It never sees the board. It gets the part number, the maker, the category, the footprint’s name and its pad numbers. It can run the checker on the document side only. No verdict that compares with the board’s pads or nets reaches it, so it cannot fit its citations to the board it is certifying.

A model that searches until the checker accepts is a stronger adversary than a person citing by hand. Three holes had to close before we counted anything:

Certification needs no such confirmation, because the checker matched the board to facts it found in the document itself. That is the claim the planted defects test.

Planted defects and decoys

The checker’s tests write their own datasheet PDF and plant 25 kinds of defect: swapped symbol pins, a pad left out, an extra pad, a pad moved 1 mm, a TSSOP land for an SOIC order, a wide-body land, a mirrored land, a supply pin floating, ground on +12 V, the wrong page, a dimension not on its page, a digest mismatch, a diode reverse-biased. All 25 are refuted, each by its own check.

Then the same on real parts. For every certified code in the library we plant defects into one of its certificates, including another value and the next size up in both footprint name and land. The latest registry run refuted 866 plants and certified none. A decoy run told the model the next size’s footprint name and judged its citations on a board that really has the next size: 0 of 8 certified.

From 320 to 905 certified parts

The share is counted one way: certified ordered parts over all ordered parts with an order code on the library’s 44 boards (1,230). The first full run certified 320. Most of the rest were capacitors from one maker’s 84-page catalogue, where every page looks alike and a word search picked the wrong ones. Choosing the pages that print the ordered part number and its size code brought it to 651. The model proposer brought it to 733 at $0.42 per newly certified code ($0.037 per part). Later rounds on pin tables and drawing dimensions reached 911.

It then went down to 905 on purpose. A maker’s land drawing labels its numbers with letters. On one diode the model had cited the dimension drawn along the lead as the pad’s width. The checker now finds the dimension line drawn at each label and checks which axis it measures. Where it cannot read the axes, it judges the land both ways and certifies only if both readings agree. Six parts lost their certificates under that rule.

A spot check of 12 random certified parts, values decoded by hand from the part number and sizes measured on the land: 12 of 12 right.

What the certificates caught

On the library, one real defect: a board ordered an 0402 resistor’s code on an 0603 land. The land check gave a lead fit of 30 % and the variant check read the size 0402 in the part number. The order record now stops the hand-over to the fab on a refuted certificate (a disputed one is recorded and does not stop it).

On the respin set, where the land drawings could be read: an EEPROM with a 3 × 3 mm MSOP land for the 4.4 mm TSSOP it is (every foot 17 % on its pad), an IMU on a 4 × 4 mm, 0.5 mm QFN land for the 3 × 3 mm, 0.4 mm part, a gesture controller whose land missed its leads. Each fixed revision was certified. A CAN controller with VDD on ground and VSS on the supply was refuted by the connect check. One false alarm: an audio codec whose symbol names pin 27 AMID where the maker’s table says VMID.

The checker also found our own bugs. A false refutation on an HSOIC with an exposed pad came from laying the pad’s two dimensions across the wrong axes. One maker prints a resistor’s value as three digits and a multiplier explained elsewhere on the page; the first numbering run refuted two good 20 kΩ resistors until the checker read the multiplier.

Where certificates fall short

Most of the 905 are passives. On one run of agent-built boards (442 ordered parts) about half were certified and nearly all of those were resistors, capacitors and inductors. Of the 68 ICs, the first pass certified one. Machine readers for TI’s package outlines, pin tables and lettered pinout drawings have brought that to 25. Connectors are mostly conditional: their drawings rarely carry a text layer.

The land’s size is the hardest part. On a fresh set nobody had tuned on, 34 parts could be decided by a size reference (the maker’s land or IPC’s envelope). None of the 34 lands one size down (0.8×) was certified (33 refuted, one conditional). All 18 of KiCad’s next SOD size were refuted. Six of 34 lands one size up (1.25×) were still certified. Each of those sits inside the maker’s land and inside IPC’s envelope. A 1.25× step is less than one SOD package step, so we do not count them as escapes. They show the limit: makers’ own lands spread about one resize step around KiCad’s. A bound relative to one maker land cannot accept KiCad’s land and reject every 1.25× land at once. For three-lead and larger gull-wing parts a land is now certified only inside both the maker’s land and IPC’s envelope.

A certificate also needs a datasheet. Some makers’ sites refuse automated downloads. The copies distributors host are often old revisions with raster drawings.

How certificates are used

A certificate is part of the board’s files (.pcbkit/certificates/). The order record lists every certificate by file and SHA-256 with the checker’s verdict and names the ordered codes that have none. The CI gate does not judge footprints against the makers’ drawings yet. Its documentation says so: a pass there is no statement about lands.

The checker is a script anyone can run on a certificate and the maker’s PDF:

python3 tools/certcheck/certcheck.py check CERT.json --pdfs DIR

What the certificates cover is on the verification page; the parts themselves are in the parts catalogue.