
TLV75801PDBV
Texas InstrumentsExtended
-40℃~+125℃@(Tj) 1 130mV@(500mA) 25uA 30uVrms 500mA 50dB@(1kHz) 550mV~5.5V 6V Adjustable Positive Under Voltage Lockout、Soft Start、Short Circuit Protection、Thermal Shutdown SOT-23-5 Voltage Regulators - Linear, Low Drop Out (LDO) Regulators ROHS
- Part id
- ti/TLV75801PDBV
- Category
- Voltage Regulators, Linear, Low Drop Out (LDO) Regulators
- Package
- SOT-23-5
- Pins
- 5
- In stock
- 36 at JLCPCB (C2868412)
- Used on
- 20 open-source boards
Overview
The TLV75801PDBV is a voltage Regulators, Linear, Low Drop Out (LDO) Regulator made by Texas Instruments in a SOT-23-5 package with 5 pins. -40℃~+125℃@(Tj) 1 130mV@(500mA) 25uA 30uVrms 500mA 50dB@(1kHz) 550mV~5.5V 6V Adjustable Positive Under Voltage Lockout、Soft Start、Short Circuit Protection、Thermal Shutdown SOT-23-5 Voltage Regulators - Linear, Low Drop Out (LDO) Regulators ROHS.
PCBKit's library has its KiCad symbol (Regulator_Linear:TLV75801PDBV, from KiCad's library) and its footprint (Package_TO_SOT_SMD:SOT-23-5, from KiCad's library), ready for a KiCad board. 36 are in stock at JLCPCB (part C2868412). 20 open-source boards in 15 repositories on GitHub use it.
Symbol
Footprint
From the datasheet
20- Supply, least
- 1.5 V · VIN, recommended operating min · p. 5
- Supply, most
- 6 V · VIN, recommended operating max · p. 5
- Supply, absolute maximum
- 6.5 V · VIN, absolute maximum · p. 4
- Junction, hottest
- 150 °C · Operating junction, absolute maximum · p. 4
- Takes working
- 25 µA · Ground current typical, IOUT = 0 mA, TJ = 25°C · p. 6
- Takes asleep
- 100 nA · Shutdown current typical, VEN ≤ 0.3 V · p. 6
- Gives
- 500 mA · Output current max, recommended operating · p. 5
- Current limit
- 720 mA · Output current limit typical, VIN = VOUT(NOM) + 1.0 V · p. 6
- Feedback reference
- 550 mV · Feedback voltage typical, TJ = 25°C · p. 6
- Dropout
- 720 mV · Typical at 500 mA, 0.65 V ≤ VOUT < 0.8 V · p. 6
- Dropout
- 585 mV · Typical at 500 mA, 0.8 V ≤ VOUT < 1.0 V · p. 6
- Dropout
- 420 mV · Typical at 500 mA, 1.0 V ≤ VOUT < 1.2 V · p. 6
- Dropout
- 285 mV · Typical at 500 mA, 1.2 V ≤ VOUT < 1.5 V · p. 6
- Dropout
- 180 mV · Typical at 500 mA, 1.5 V ≤ VOUT < 1.8 V · p. 6
- Dropout
- 140 mV · Typical at 500 mA, 1.8 V ≤ VOUT < 2.5 V · p. 6
- Dropout
- 102 mV · Typical at 500 mA, 2.5 V ≤ VOUT < 3.3 V · p. 6
- Dropout
- 95 mV · Typical at 500 mA, 3.3 V ≤ VOUT ≤ 5.5 V · p. 6
- Junction to air (DBV (SOT-23))
- 176.9 K/W · Junction-to-ambient thermal resistance · p. 5
- Junction to case (DBV (SOT-23))
- 95.3 K/W · Junction-to-case top thermal resistance · p. 5
- Junction to board (DBV (SOT-23))
- 45 K/W · Junction-to-board thermal resistance · p. 5
What it is and has
4- Output voltage
- Adjustable, 0.55 V to 5.5 V · p. 1
- Soft-start
- Built-in, monotonic VOUT rise · p. 1
- Active output discharge
- Integrated · p. 1
- Package option
- SOT23-5 (DBV) · p. 1
Around it
2- cap 1 µF
- between IN and GND; Minimum recommended input capacitance; use a ceramic capacitor. · p. 5
- cap 1 µF to 220 µF
- between OUT and GND; Recommended output capacitance; required for stability, ceramic, placed close to OUT. · p. 5
Specifications
56| Parameter | Conditions | As printed | Page |
|---|---|---|---|
| Voltage VIN | Supply; over operating free-air temperature range | min -0.3 · max 6.5 V | 4 |
| Voltage VEN | Enable; over operating free-air temperature range | min -0.3 · max 6.5 V | 4 |
| Voltage VFB | Feedback; over operating free-air temperature range | min -0.3 · max 2 V | 4 |
| Voltage VOUT | Output; maximum is VIN + 0.3 V or 6.5 V, whichever is smaller | min -0.3 V | 4 |
| Temperature TJ | Operating junction | min -40 · max 150 °C | 4 |
| Temperature Tstg | Storage | min -65 · max 150 °C | 4 |
| Electrostatic discharge V(ESD) | Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001; ±2000 V rating | max 2000 V | 4 |
| Electrostatic discharge V(ESD) | Charged-device model (CDM), per JEDEC specification JESD22-C101; ±500 V rating | max 500 V | 4 |
| Input voltage VIN | Over operating free-air temperature range | min 1.5 · max 6 V | 5 |
| Output voltage VOUT | Over operating free-air temperature range | min 0.55 · max 5.5 V | 5 |
| Output current IOUT | Over operating free-air temperature range | min 0 · max 500 mA | 5 |
| Input capacitor CIN | min 1 uF | 5 | |
| Output capacitor(1) COUT | Minimum derated capacitance of 0.47 uF is required for stability | min 1 · max 220 uF | 5 |
| Enable voltage(2) VEN | min 0 · max 6 V | 5 | |
| Enable toggle frequency fEN | max 10 kHz | 5 | |
| Junction temperature TJ | min -40 · max 125 °C | 5 | |
| Junction-to-ambient thermal resistance RθJA | DBV (SOT-23), 5 PINS | typ 176.9 °C/W | 5 |
| Junction-to-case (top) thermal resistance RθJC(top) | DBV (SOT-23), 5 PINS | typ 95.3 °C/W | 5 |
| Junction-to-board thermal resistance RθJB | DBV (SOT-23), 5 PINS | typ 45 °C/W | 5 |
| Junction-to-top characterization parameter ψJT | DBV (SOT-23), 5 PINS | typ 21 °C/W | 5 |
| Junction-to-board characterization parameter ψJB | DBV (SOT-23), 5 PINS | typ 44.8 °C/W | 5 |
| Feedback voltage VFB | TJ = 25°C | typ 0.55 V | 6 |
| Output accuracy(1) | TJ = 25°C | min -0.7 · max 0.7 % | 6 |
| Output accuracy(1) | –40°C ≤ TJ ≤ +85°C | min -1 · max 1 % | 6 |
| Output accuracy(1) | –40°C ≤ TJ ≤ +125°C | min -1.5 · max 1.5 % | 6 |
| Line regulation | VOUT(NOM) + 0.5 V ≤ VIN ≤ 6.0 V; VIN = 1.5 V for VOUT < 1.0 V | typ 2 · max 7.5 mV | 6 |
| Load regulation | 0.1 mA ≤ IOUT ≤ 500 mA, VIN ≥ 2.0 V | typ 0.03 V/A | 6 |
| Ground current IGND | IOUT = 0 mA, TJ = 25°C | min 10 · typ 25 · max 31 uA | 6 |
| Ground current IGND | IOUT = 0 mA, –40°C ≤ TJ ≤ +125°C | max 35 uA | 6 |
| Shutdown current ISHDN | VEN ≤ 0.3 V, 1.5 V ≤ VIN ≤ 6.0 V | typ 0.1 · max 1 uA | 6 |
| Feedback pin current IFB | typ 0.01 · max 0.1 uA | 6 | |
| Output current limit ICL | VIN = VOUT(NOM) + 1.0 V; VOUT = VOUT(NOM) – 0.2 V, VOUT < 1.5 V | min 530 · typ 720 · max 865 mA | 6 |
| Output current limit ICL | VIN = VOUT(NOM) + 1.0 V; VOUT = 0.9 V × VOUT(NOM), VOUT ≥ 1.5 V | min 530 · typ 720 · max 865 mA | 6 |
| Short-circuit current limit ISC | VIN = VOUT(NOM) + 1.0 V; VOUT = 0 V | typ 350 mA | 6 |
| Dropout voltage VDO | IOUT = 500 mA, –40°C ≤ TJ ≤ +125°C, VOUT = 0.95 × VOUT(NOM); 0.65 V ≤ VOUT < 0.8 V | typ 720 · max 880 mV | 6 |
| Dropout voltage VDO | IOUT = 500 mA, –40°C ≤ TJ ≤ +125°C, VOUT = 0.95 × VOUT(NOM); 0.8 V ≤ VOUT < 1.0 V | typ 585 · max 750 mV | 6 |
| Dropout voltage VDO | IOUT = 500 mA, –40°C ≤ TJ ≤ +125°C, VOUT = 0.95 × VOUT(NOM); 1.0 V ≤ VOUT < 1.2 V | typ 420 · max 570 mV | 6 |
| Dropout voltage VDO | IOUT = 500 mA, –40°C ≤ TJ ≤ +125°C, VOUT = 0.95 × VOUT(NOM); 1.2 V ≤ VOUT < 1.5 V | typ 285 · max 400 mV | 6 |
| Dropout voltage VDO | IOUT = 500 mA, –40°C ≤ TJ ≤ +125°C, VOUT = 0.95 × VOUT(NOM); 1.5 V ≤ VOUT < 1.8 V | typ 180 · max 235 mV | 6 |
| Dropout voltage VDO | IOUT = 500 mA, –40°C ≤ TJ ≤ +125°C, VOUT = 0.95 × VOUT(NOM); 1.8 V ≤ VOUT < 2.5 V | typ 140 · max 185 mV | 6 |
| Dropout voltage VDO | IOUT = 500 mA, –40°C ≤ TJ ≤ +125°C, VOUT = 0.95 × VOUT(NOM); 2.5 V ≤ VOUT < 3.3 V | typ 102 · max 140 mV | 6 |
| Dropout voltage VDO | IOUT = 500 mA, –40°C ≤ TJ ≤ +125°C, VOUT = 0.95 × VOUT(NOM); 3.3 V ≤ VOUT ≤ 5.5 V | typ 95 · max 130 mV | 6 |
| Power-supply rejection ratio PSRR | VIN = VOUT(NOM) + 1.0 V, IOUT = 50 mA; f = 1 kHz | typ 50 dB | 6 |
| Power-supply rejection ratio PSRR | VIN = VOUT(NOM) + 1.0 V, IOUT = 50 mA; f = 100 kHz | typ 45 dB | 6 |
| Power-supply rejection ratio PSRR | VIN = VOUT(NOM) + 1.0 V, IOUT = 50 mA; f = 1 MHz | typ 30 dB | 6 |
| Output noise voltage Vn | BW = 10 Hz to 100 kHz, VOUT = 0.9 V | typ 53 uVRMS | 6 |
| Undervoltage lockout VUVLO | VIN rising | min 1.21 · typ 1.33 · max 1.47 V | 6 |
| Undervoltage lockout VUVLO | VIN falling | min 1.17 · typ 1.29 · max 1.42 V | 6 |
| Undervoltage lockout hysteresis VUVLO, HYST | VIN Hysteresis | typ 40 mV | 6 |
| Start-up time tSTR | From EN low-to-high transition to VOUT = VOUT(NOM) × 95% | typ 500 us | 6 |
| EN pin high voltage VEN(HI) | min 1 V | 6 | |
| EN pin low voltage VEN(LO) | max 0.3 V | 6 | |
| Enable pin current IEN | VIN = EN = 6.0 V | typ 10 nA | 6 |
| Pulldown resistance RPULL DOWN | VIN = 6.0 V | typ 95 Ω | 6 |
| Thermal shutdown TSD | Shutdown, temperature increasing | typ 170 °C | 6 |
| Thermal shutdown TSD | Reset, temperature decreasing | typ 155 °C | 6 |
Pins, by the datasheet
5- 1 IN
- Input supply; connect the recommended or larger ceramic capacitor from IN to ground. · p. 3
- 2 GND
- Ground pin. · p. 3
- 3 EN
- Drive above VEN(HI) to enable the regulator or below VEN(LO) for shutdown. · p. 3
- 4 FB
- Control loop error amplifier input used to set the output voltage. · p. 3
- 5 OUT
- Regulated output; requires a capacitor to ground for stability, placed close to the output. · p. 3
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Questions
Is there a KiCad symbol and footprint for the TLV75801PDBV?
Yes. The symbol is Regulator_Linear:TLV75801PDBV and the footprint Package_TO_SOT_SMD:SOT-23-5, both drawn on this page. PCBKit places them on a board for you when you design with it.
What package is the TLV75801PDBV?
SOT-23-5, with 5 pins. Its footprint is drawn on this page.
Where is the TLV75801PDBV datasheet?
Texas Instruments publishes it: the Datasheet link on this page opens it.
Where can I order the TLV75801PDBV?
JLCPCB lists it as part C2868412, with 36 in stock; the sellers' links on this page open their listings.
What can replace the TLV75801PDBV?
Parts like it in the library: the ME6211C33M5G-N by MICRONE, the SPX3819M5-L-3-3/TR by MaxLinear, the RT9013-33GB by RICHTEK and the AP2112K-1.8TRG1 by Diodes Incorporated. Check their datasheets: a part that fits the footprint may still differ in its ratings.
Which open-source boards use the TLV75801PDBV?
20 boards in 15 repositories on GitHub; the most starred are listed on this page, with their KiCad files.