TCAN332D

Q: Is there a KiCad symbol and footprint for the TCAN332D?

Yes. The symbol is Interface_CAN_LIN:TCAN332 and the footprint Package_SO:SOIC-8_3.9x4.9mm_P1.27mm, both drawn on this page. PCBKit places them on a board for you when you design with it.

Q: What package is the TCAN332D?

SOIC-8, with 8 pins. Its footprint is drawn on this page.

Q: Where is the TCAN332D datasheet?

Texas Instruments publishes it: the Datasheet link on this page opens it.

Q: Where can I order the TCAN332D?

JLCPCB lists it as part C73651, with 2,017 in stock; the sellers' links on this page open their listings.

Q: What can replace the TCAN332D?

Parts like it in the library: the TJA1051T/3/1J by NXP Semiconductors, the SN65HVD230D by Texas Instruments, the TJA1042T/1J by NXP Semiconductors and the CA-IF1051S by Chipanalog. Check their datasheets: a part that fits the footprint may still differ in its ratings.

Q: Which open-source boards use the TCAN332D?

31 boards in 29 repositories on GitHub; the most starred are listed on this page, with their KiCad files.

Texas InstrumentsExtended

-40℃~+125℃ 1Mbps 3V~3.6V 60mA CAN Transceiver SOIC-8 CAN Transceivers ROHS

Datasheet JLCPCB LCSC

Part id: ti/TCAN332D
Category: CAN Transceivers
Package: SOIC-8
Pins: 8
In stock: 2,017 at JLCPCB (C73651)
Used on: 31 open-source boards

Overview

The TCAN332D is a CAN Transceiver made by Texas Instruments in a SOIC-8 package with 8 pins. -40℃~+125℃ 1Mbps 3V~3.6V 60mA CAN Transceiver SOIC-8 CAN Transceivers ROHS.

PCBKit's library has its KiCad symbol (Interface_CAN_LIN:TCAN332, from KiCad's library) and its footprint (Package_SO:SOIC-8_3.9x4.9mm_P1.27mm, from KiCad's library), ready for a KiCad board. 2,017 are in stock at JLCPCB (part C73651). 31 open-source boards in 29 repositories on GitHub use it.

Symbol

Interface_CAN_LIN:TCAN332From KiCad's library

Footprint

Package_SO:SOIC-8_3.9x4.9mm_P1.27mmFrom KiCad's library

From the datasheet

Supply, least: 3 V · VCC, recommended operating min · p. 5
Supply, most: 3.6 V · VCC, recommended operating max · p. 5
Supply, absolute maximum: 5 V · VCC, absolute max · p. 5
Works from: -40 °C · Operational free-air temperature min · p. 5
Works up to: 125 °C · Operational free-air temperature max · p. 5
Junction, hottest: 150 °C · Operating junction temperature max · p. 5
Takes working: 55 mA · VCC, normal mode dominant, 60 Ω typical bus load, max · p. 6
Takes at most: 60 mA · VCC, normal mode dominant, 50 Ω high bus load, max · p. 6
A pin gives at most: 8 mA · Logic output current absolute max · p. 5
Junction to air (D (SOIC)): 114.4 K/W · Junction-to-ambient thermal resistance · p. 6
Junction to case (D (SOIC)): 58.7 K/W · Junction-to-case top thermal resistance · p. 6
Junction to board (D (SOIC)): 55.2 K/W · Junction-to-board thermal resistance · p. 6
Data rate, most: 1 Mbit/s · TCAN332 normal mode max · p. 3
Edge: 6 ns · RXD output fall time, 15 pF load, typical · p. 9

What it is and has

Supply: 3.3V single supply operation · p. 1
CAN compatibility: ISO 11898-2 · p. 1
Package options: SOIC-8 and SOT-23 · p. 1
Operating modes: Normal mode only · p. 3
Common mode range: ±12V · p. 1
Bus pin fault protection: ±14V · p. 1
Protection: Driver dominant time out (TXD DTO) · p. 1
Protection: Receiver dominant time out (RXD DTO) · p. 1
Protection: Undervoltage protection on VCC · p. 1
Protection: Thermal shutdown protection · p. 1
Protection: Current limiting on bus pins · p. 1

Specifications

Parameter	Conditions	As printed	Page
Supply Voltage range VCC	Over operating free-air temperature range	min -0.3 · max 5 V	5
Voltage at any bus terminal (CANH or CANL) V(BUS)	Over operating free-air temperature range	min -14 · max 14 V	5
Logic input terminal voltage range V(Logic_Input)	Over operating free-air temperature range	min -0.3 · max 5 V	5
Logic output terminal voltage range V(Logic_Output)	Over operating free-air temperature range	min -0.3 · max 5 V	5
Logic output current IO(LOGIC)	Over operating free-air temperature range	max 8 mA	5
Operating junction temperature range TJ		min -40 · max 150 °C	5
Storage temperature Tstg		max 150 °C	5
Electrostatic discharge V(ESD)	Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001; all pins except CANH and CANL; ±4000 V	max 4000 V	5
Electrostatic discharge V(ESD)	Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001; pins CANH and CANL; ±25000 V	max 25000 V	5
Electrostatic discharge V(ESD)	Charged-device model (CDM), per JEDEC specification JESD22-C101; all pins; ±1500 V	max 1500 V	5
Electrostatic discharge V(ESD)	IEC 61400-4-2 Contact Discharge; CANH and CANL terminals to GND; ±12000 V	max 12000 V	5
Supply voltage VCC	Over operating free-air temperature range	min 3 · max 3.6 V	5
Logic terminal HIGH level output current IOH(LOGIC)	Over operating free-air temperature range	min -2 mA	5
Logic terminal LOW level output current IOL(LOGIC)	Over operating free-air temperature range	max 2 mA	5
Operational free-air temperature TA		min -40 · max 125 °C	5
Junction-to-ambient thermal resistance RθJA	TCAN33x D (SOIC), 8 PINS	typ 114.4 °C/W	6
Junction-to-case (top) thermal resistance RθJC(top)	TCAN33x D (SOIC), 8 PINS	typ 58.7 °C/W	6
Junction-to-board thermal resistance RθJB	TCAN33x D (SOIC), 8 PINS	typ 55.2 °C/W	6
Junction-to-top characterization parameter ψJT	TCAN33x D (SOIC), 8 PINS	typ 11.7 °C/W	6
Junction-to-board characterization parameter ψJB	TCAN33x D (SOIC), 8 PINS	typ 54.6 °C/W	6
Average power dissipation PD	TCAN33x D (SOIC), 8 PINS; VCC = 3.3 V, TJ = 27°C, RL = 60 Ω, SHDN, S and STB at 0 V, input to TXD at 500 kHz, 50% duty cycle square wave, CL(RXD) = 15 pF	typ 65 mW	6
Thermal shutdown temperature TSD	TCAN33x D (SOIC), 8 PINS	typ 175 °C	6
Thermal shutdown hysteresis THYS	TCAN33x D (SOIC), 8 PINS	typ 5 °C	6
Supply current Normal Mode ICC	Dominant; Figure 6-1; TXD = 0V, RL = 60Ω, CL = open, S, STB and SHDN = 0V; Typical Bus Load	max 55 mA	6
Supply current Normal Mode ICC	Dominant; Figure 6-1; TXD = 0V, RL = 50Ω, CL = open, S, STB and SHDN = 0V; High Bus Load	max 60 mA	6
Supply current Normal Mode ICC	Dominant with bus fault; Figure 6-1; TXD = 0V, S, STB and SHDN = 0V, CANH = -12V, RL = open, CL = open	max 180 mA	6
Supply current Normal Mode ICC	Recessive; Figure 6-1; TXD = VCC, RL = 50Ω, CL = open, S, STB and SHDN = 0V	max 3.5 mA	6
Rising under voltage detection on VCC for protected mode UV(VCC)		typ 2.2 · max 2.6 V	6
Falling under voltage detection on VCC for protected mode UV(VCC)		min 1.65 · typ 2 · max 2.5 V	6
Hysteresis voltage on UV(VCC) VHYS(UVVCC)		typ 200 mV	6
Bus output voltage (dominant) VO(D)	CANH; Figures 6-3 and 6-2; TXD = 0V, S, STB and SHDN = 0V, RL = 60Ω, CL = open; maximum VCC	min 2.45 V	6
Bus output voltage (dominant) VO(D)	CANL; Figures 6-3 and 6-2; TXD = 0V, S, STB and SHDN = 0V, RL = 60Ω, CL = open	min 0.5 · max 1.25 V	6
Bus output voltage (recessive) VO(R)	Figures 6-3 and 6-2; TXD = VCC, STB, SHDN = 0V, S = 0V or VCC; RL = open (no load)	typ 1.85 V	6
Differential output voltage (dominant) VOD(D)	Figures 6-3 and 6-2; TXD = 0V, S, STB and SHDN = 0V, 50Ω ≤ RL ≤ 65Ω, CL = open	min 1.6 · max 3 V	7
Differential output voltage (dominant) VOD(D)	Figures 6-3 and 6-2; TXD = 0V, S, STB and SHDN = 0V, 45Ω ≤ RL < 50Ω, CL = open	min 1.5 · max 3 V	7
Differential output voltage (recessive) VOD(R)	Figures 6-3 and 6-2; TXD = VCC, S, STB and SHDN = 0V, RL = 60Ω, CL = open	min -120 · max 12 mV	7
Differential output voltage (recessive) VOD(R)	TA < 85°C; Figures 6-3 and 6-2; TXD = VCC, S, STB and SHDN = 0V, RL = open (no load), CL = open	min -50 · max 50 mV	7
Differential output voltage (recessive) VOD(R)	Figures 6-3 and 6-2; TXD = VCC, S, STB and SHDN = 0V, RL = open (no load), CL = open	min -50 · max 100 mV	7
Output symmetry (dominant and recessive) (CANHREC + CANLREC – CANHDOM – CANLDOM) V(SYM)	Figures 6-3 and 6-2; S, STB and SHDN = 0V, RL = 60Ω, CL = open	min -400 · max 400 mV	7
Short-circuit steady-state output current, Dominant IOS(DOM)	Figure 6-9; V(CANH) = –12V, CANL = open, TXD = 0V	min -200 mA	7
Short-circuit steady-state output current, Dominant IOS(DOM)	Figure 6-9; V(CANL) = 12V, CANH = open, TXD = 0V	max 200 mA	7
Short-circuit steady-state output current, Recessive IOS(REC)	Figure 6-9; –12V ≤ VBUS ≤ 12V, VBUS = CANH = CANL, TXD = VCC	min -5 · max 5 mA	7
Input threshold voltage, normal modes and selective wake modes VIT	Receiver; Figure 6-3 and Table 6-7	min 500 · max 900 mV	8
Hysteresis voltage for input threshold, normal modes and selective wake modes VHYS	Receiver; Figure 6-3 and Table 6-7	typ 120 mV	8
Common Mode Range: normal and silent modes VCM	Receiver; normal mode	min -12 · max 12 V	8
Power-off (unpowered) bus input leakage current IIOFF(LKG)	CANH = CANL = 3.3V, VCC to GND via 0Ω and 47kΩ resistor	max 12 uA	8
Input capacitance to ground (CANH or CANL) CI		max 20 pF	8
Differential input capacitance CID		max 10 pF	8
Differential input resistance RID	TXD = VCC, Normal Mode	min 30 · max 80 kΩ	8
Input resistance (CANH or CANL) RIN	TXD = VCC, Normal mode	min 15 · max 40 kΩ	8
Input resistance matching: [1 – (RIN(CANH) / RIN(CANL))] × 100 % RIN(M)	V(CANH) = V(CANL)	min -3 · max 3 %	8
HIGH level input voltage VIH	TXD Terminal (CAN Transmit Data Input)	min 2 V	8
LOW level input voltage VIL	TXD Terminal (CAN Transmit Data Input)	max 0.8 V	8
HIGH level input leakage current IIH	TXD = VCC = 3.6V	min -2.5 · typ 0 · max 3 uA	8
LOW level input leakage current IIL	TXD = 0V, VCC = 3.6V	min -4 · typ 0 · max 0 uA	8
Unpowered leakage current ILKG(OFF)	TXD = 3.6V, VCC = 0V	min -2 · typ 0 · max 2.5 uA	8
Input Capacitance I(CAP)	TXD Terminal (CAN Transmit Data Input)	typ 2.5 pF	8
LOW level output voltage VOL	RXD; Figure 6-3, IO = 2mA	typ 0.2 · max 0.4 V	8
Unpowered leakage current ILKG(OFF)	RXD = 3.6V, VCC = 0V	min -1 · typ 0 · max 1 uA	8
Total loop delay, driver input (TXD) to receiver output (RXD), recessive to dominant and dominant to recessive tPROP(LOOP)	Figure 6-6, S, STB and SHDN = 0V, RL = 60Ω, CL = 100pF, CL(RXD) = 15pF	typ 100 · max 135 ns	9
Total Loop delay in highly loaded network tPROP(LOOP)	Figure 6-6, S, STB and SHDN = 0V, RL = 120Ω, CL = 200pF, CL(RXD) = 15pF	typ 120 · max 180 ns	9
Re-enable time after UV event tUV_RE-ENABLE	Time for device to return to normal operation from UV(VCC) under voltage event	max 1000 us	9
Propagation delay time, HIGH TXD to Driver Recessive tpHR	Figure 6-2, S, STB and SHDN = 0V, RL = 60Ω, CL = 100pF	typ 25 ns	9
Propagation delay time, LOW TXD to Driver Dominant tpLD	Figure 6-2, S, STB and SHDN = 0V, RL = 60Ω, CL = 100pF	typ 20 ns	9
Pulse skew (\|tpHR - tpLD\|) tsk(p)	Figure 6-2, S, STB and SHDN = 0V, RL = 60Ω, CL = 100pF	typ 5 ns	9
Differential output signal rise time tr	Figure 6-2, S, STB and SHDN = 0V, RL = 60Ω, CL = 100pF	typ 17 ns	9
Differential output signal fall time tf	Figure 6-2, S, STB and SHDN = 0V, RL = 60Ω, CL = 100pF	typ 9 ns	9
Driver dominant time out (1) tTXD_DTO	Figure 6-8, RL = 60Ω, CL = 100pF	min 1.2 · typ 2.6 · max 3.8 ms	9
Propagation delay time, bus recessive input to high RXD output tpRH	Figure 6-3, CL(RXD) = 15pF, CANL = 1.5V, CANH = 3.5V	typ 62 ns	9
Propagation delay time, bus dominant input to RXD low output tpDL	Figure 6-3, CL(RXD) = 15pF, CANL = 1.5V, CANH = 3.5V	typ 56 ns	9
Output signal rise time (RXD) tr	Figure 6-3, CL(RXD) = 15pF, CANL = 1.5V, CANH = 3.5V	typ 7 ns	9
Output signal fall time (RXD) tf	Figure 6-3, CL(RXD) = 15pF, CANL = 1.5V, CANH = 3.5V	typ 6 ns	9
Receiver dominant time out (2) tRXD_DTO	Figure 6-10, CL(RXD) = 15pF	min 1.6 · typ 3 · max 5 ms	9

Pins, by the datasheet

1 TXD: CAN transmit data input; LOW for dominant and HIGH for recessive bus states; integrated pull up. · p. 4
2 GND: Ground connection. · p. 4
3 VCC: 3.3-V supply voltage. · p. 4
4 RXD: Tri-state CAN receive data output; LOW for dominant and HIGH for recessive bus states. · p. 4
5 NC: No Connect – Not internally connected. · p. 4
6 CANL: Low level CAN bus line. · p. 4
7 CANH: High level CAN bus line. · p. 4
8 NC: No Connect – Not internally connected. · p. 4

Parameters

Current - Supply: 55mA
Current - Supply(Max): 60mA
Data Rate: 1Mbps
Features: TXD dominant timeout
Junction Temperature(Max): 150℃
Number of Channels: 1
Operating Temperature: -40℃~+125℃
Output Current per Pin(Max): 8mA
Quiescent Supply Current: 15uA
Rise Time: 6ns
Thermal Resistance(Junction to Ambient): 114.4℃/W
Thermal Resistance(Junction to Board): 55.2℃/W
Thermal Resistance(Junction to Case): 58.7℃/W
Type: CAN Transceiver
Voltage - Supply: 3V~3.6V
Voltage - Supply(Absolute Max): 5V

Order codes

TCAN332DLCSC C1544505
TCAN332DRLCSC C73651

Pinout

The pins of the TCAN332D
Pin	Name	Type
1	TXD	Input
2	GND	Power in
3	VCC	Power in
4	RXD	Tri-state
5	NC	Not connected
6	CANL	Input/output
7	CANH	Input/output
8	NC	Not connected

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Parts like it

Questions

Is there a KiCad symbol and footprint for the TCAN332D?

Yes. The symbol is Interface_CAN_LIN:TCAN332 and the footprint Package_SO:SOIC-8_3.9x4.9mm_P1.27mm, both drawn on this page. PCBKit places them on a board for you when you design with it.

What package is the TCAN332D?

SOIC-8, with 8 pins. Its footprint is drawn on this page.

Where is the TCAN332D datasheet?

Texas Instruments publishes it: the Datasheet link on this page opens it.

Where can I order the TCAN332D?

JLCPCB lists it as part C73651, with 2,017 in stock; the sellers' links on this page open their listings.

What can replace the TCAN332D?

Parts like it in the library: the TJA1051T/3/1J by NXP Semiconductors, the SN65HVD230D by Texas Instruments, the TJA1042T/1J by NXP Semiconductors and the CA-IF1051S by Chipanalog. Check their datasheets: a part that fits the footprint may still differ in its ratings.

Which open-source boards use the TCAN332D?

31 boards in 29 repositories on GitHub; the most starred are listed on this page, with their KiCad files.

TCAN332D

Overview

Symbol

Footprint

From the datasheet

What it is and has

Specifications

Pins, by the datasheet

Open-source boards using it

DAC ADC PWM IO

Imxrt1020-board

Dragonmanh7

ETH OPAMP DCMI FSMC CAN ENCODER CS1000

BLDC002

BMS v2

Basic

BR mainBoard

Parts like it

TJA1051T/3/1J

SN65HVD230D

TJA1042T/1J

CA-IF1051S

TJA1042T/3/1J

TJA1044T/1Z

SIT1050T

SN65HVD232D