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P82B96D on a board, in 3D

P82B96D

Texas Instruments

-40℃~+85℃ 2 2-Wire Bus 2-Wire Bus 2V~15V 4pF 70ns Buffer SOIC-8 Signal Buffers, Repeaters, Splitters ROHS

Extended
Category
Signal Buffers, Repeaters, Splitters
Package
SOIC-8
Pins
8

Overview

The P82B96D is a signal Buffers, Repeaters, Splitter made by Texas Instruments in a SOIC-8 package with 8 pins. -40℃~+85℃ 2 2-Wire Bus 2-Wire Bus 2V~15V 4pF 70ns Buffer SOIC-8 Signal Buffers, Repeaters, Splitters ROHS.

PCBKit's library has its KiCad symbol (Interface_Expansion:P82B96, from KiCad's library) and its footprint (Package_SO:SOIC-8_3.9x4.9mm_P1.27mm, from KiCad's library), ready for a KiCad board. 519 are in stock at JLCPCB (part C2652363). 14 open-source boards in 7 repositories on GitHub use it.

Symbol

SDA1RXD-SDA2TXD-SDA3GND4TXD-SCL5RXD-SCL6SCL7VCC8
Interface_Expansion:P82B96From KiCad's library

Footprint

12345678
Package_SO:SOIC-8_3.9x4.9mm_P1.27mmFrom KiCad's library

From the datasheet

10
Supply, least
2 V · VCC, recommended operating minimum · p. 5
Supply, most
15 V · VCC, recommended operating maximum · p. 5
Supply, absolute maximum
18 V · VCC, absolute maximum · p. 5
Works from
-40 °C · Operating free-air temperature minimum · p. 5
Works up to
85 °C · Operating free-air temperature maximum · p. 5
Takes working
900 µA · VCC quiescent supply current typical, Sx = Sy = VCC, TA = 25°C · p. 7
A pin gives at most
250 mA · Sx or Sy continuous output current absolute maximum · p. 5
Junction to air (D (SOIC))
109.1 K/W · Junction-to-ambient thermal resistance · p. 5
Junction to case (D (SOIC))
61.6 K/W · Junction-to-case (top) thermal resistance · p. 5
Junction to board (D (SOIC))
48.6 K/W · Junction-to-board thermal resistance · p. 5

What it is and has

3
Function
I2C compatible dual bidirectional bus buffer · p. 1
I2C operation
400-kHz Fast I2C bus operation · p. 1
Bus capacitance
400 pF on Sx/Sy; up to 4000 pF on Tx/Ty · p. 14

Around it

1
cap approximately 100 nF
between VCC and GND; Decoupling capacitor; place as close to VCC as possible. · p. 21

Specifications

138
ParameterConditionsAs printedPage
Supply voltage on VCC pin VCCOver operating free-air temperature rangemin -0.3 · max 18 V5
Voltage on buffered input VISx or Sy (SDA or SCL)min -0.3 · max 18 V5
Voltage on buffered input VIRx or Rymin -0.3 · max 18 V5
Voltage on buffered output VOSx or Sy (SDA or SCL)min -0.3 · max 18 V5
Voltage on buffered output VOTx or Tymin -0.3 · max 18 V5
Continuous output current IOSx or Symax 250 mA5
Continuous output current IOTx or Tymax 250 mA5
Continuous current through VCC or GND ICCmax 250 mA5
Operating free-air temperature TAmin -40 · max 85 °C5
Storage temperature Tstgmin -55 · max 125 °C5
Electrostatic discharge V(ESD)Human Body Model (HBM), per ANSI/ESDA/JEDEC JS-001min -3500 · max 3500 V5
Electrostatic discharge V(ESD)Charged-Device Model (CDM), per JEDEC specification JESD22-C101min -1000 · max 1000 V5
Electrostatic discharge V(ESD)Machine Model (MM), per JEDEC specification JESD22-A115-Amin -200 · max 200 V5
Supply voltage VCCmin 2 · max 15 V5
Low-level output current IOLSx, Sy; VSx, VSy = 1 V, VRx, VRy ≤ 0.42 Vmax 3 mA5
Low-level output current IOLTx, Ty; VSx, VSy = 0.4 V, VTx, VTy = 0.4 Vmax 30 mA5
Maximum input/output voltage level VIOmaxSx, Sy; VTx, VTy = 0.4 Vmax 15 V5
Maximum input/output voltage level VIOmaxTx, Ty; VSx, VSy = 0.4 Vmax 15 V5
Low-level input voltage difference VILdiffSx, Symax 0.4 V5
Junction-to-ambient thermal resistance RθJAD (SOIC), 8 PINStyp 109.1 °C/W5
Junction-to-case (top) thermal resistance RθJC(top)D (SOIC), 8 PINStyp 61.6 °C/W5
Junction-to-board thermal resistance RθJBD (SOIC), 8 PINStyp 48.6 °C/W5
Junction-to-top characterization parameter ψJTD (SOIC), 8 PINStyp 19.6 °C/W5
Junction-to-board characterization parameter ψJBD (SOIC), 8 PINStyp 48.2 °C/W5
Temperature coefficient of input thresholds ΔV/ΔTINSx, Sy; TA = 25°C; typical at VCC = 2.5 Vtyp -2 mV/°C6
Low-level output voltage VOLSx, Sy; ISx, ISy = 3 mA; TA = 25°C; typical at VCC = 2.5 Vmin 0.8 · typ 0.88 · max 1 V6
Low-level output voltage VOLSx, Sy; ISx, ISy = 0.2 mA; TA = 25°C; typical at VCC = 2.5 Vmin 0.67 · typ 0.73 · max 0.79 V6
Temperature coefficient of output low levels ΔV/ΔTOUTSx, Sy; ISx, ISy = 0.2 mA; TA = 25°C; typical at VCC = 2.5 Vtyp -1.8 mV/°C6
Quiescent supply current ICCSx = Sy = VCC; TA = 25°C; typical at VCC = 2.5 Vtyp 0.9 · max 1.8 mA6
Quiescent supply current ICCSx = Sy = VCC; TA = –40°C to 85°Cmax 2 mA6
Additional supply current per pin low ΔICCTx, Ty; TA = 25°C; typical at VCC = 2.5 Vtyp 1.7 · max 2.75 mA6
Additional supply current per pin low ΔICCTx, Ty; TA = –40°C to 85°Cmax 3 mA6
Dynamic output sink capability on I2C bus IIOSSx, Sy; VSx, VSy > 2 V, VRx, VRy = low; TA = 25°C; typical at VCC = 2.5 Vmin 7 · typ 18 mA6
Dynamic output sink capability on I2C bus IIOSSx, Sy; VSx, VSy > 2 V, VRx, VRy = low; TA = –40°C to 85°Cmin 5.5 mA6
Leakage current on I2C bus IIOSSx, Sy; VSx, VSy = 2.5 V, VRx, VRy = high; TA = 25°Ctyp 0.1 · max 1 uA6
Leakage current on I2C bus IIOSSx, Sy; VSx, VSy = 2.5 V, VRx, VRy = high; TA = –40°C to 85°Cmax 1 uA6
Dynamic output sink capability on buffered bus IIOTTx, Ty; VTx, VTy > 1 V, VSx, VSy = low on I2C bus = 0.4 V; TA = 25°C; typical at VCC = 2.5 Vmin 60 · typ 100 mA6
Dynamic output sink capability on buffered bus IIOTTx, Ty; VTx, VTy > 1 V, VSx, VSy = low on I2C bus = 0.4 V; TA = –40°C to 85°Cmin 60 mA6
Leakage current on buffered bus IIOTTx, Ty; VTx, VTy = VCC = 2.5 V, VSx, VSy = high; TA = 25°Ctyp 0.1 · max 1 uA6
Leakage current on buffered bus IIOTTx, Ty; VTx, VTy = VCC = 2.5 V, VSx, VSy = high; TA = –40°C to 85°Cmax 1 uA6
Input current from I2C bus IISx, Sy; Bus low, VRx, VRy = high; TA = 25°C; typical at VCC = 2.5 Vtyp -1 uA6
Input current from I2C bus IISx, Sy; Bus low, VRx, VRy = high; TA = –40°C to 85°Cmax 1 uA6
Input current from buffered bus IIRx, Ry; Bus low, VRx, VRy = 0.4 V; TA = 25°C; typical at VCC = 2.5 Vtyp -1 uA6
Input current from buffered bus IIRx, Ry; Bus low, VRx, VRy = 0.4 V; TA = –40°C to 85°Cmax 1 uA6
Leakage current on buffered bus input IIRx, Ry; VRx, VRy = VCC; TA = 25°C; typical at VCC = 2.5 Vtyp 1 uA6
Leakage current on buffered bus input IIRx, Ry; VRx, VRy = VCC; TA = –40°C to 85°Cmax 1.5 uA6
Input threshold VITSx, Sy; Input logic level high threshold on normal I2C bus; TA = 25°C; typical at VCC = 2.5 Vtyp 0.65 · max 0.7 V6
Input threshold VITSx, Sy; Input logic level low threshold on normal I2C bus; TA = 25°C; typical at VCC = 2.5 Vmin 0.6 · typ 0.65 V6
Input/output logic level difference VIOdiffSx, Sy; (VSx output low at 3 mA) – (VSx input high max) for I2C applications; TA = 25°C; typical at VCC = 2.5 Vmin 100 · typ 150 mV6
Input/output logic level difference VIOdiffSx, Sy; (VSx output low at 3 mA) – (VSx input high max) for I2C applications; TA = –40°C to 85°Cmin 100 mV6
VCC voltage at which all buses are released VIOrelSx, Sy, Tx, Ty; Sx, Sy are low, VCC ramping, voltage on Tx, Ty lowered until released; TA = 25°Cmin 1 V6
VCC voltage at which all buses are released VIOrelSx, Sy, Tx, Ty; Sx, Sy are low, VCC ramping, voltage on Tx, Ty lowered until released; TA = –40°C to 85°Cmin 1 V6
Temperature coefficient of release voltage ΔV/ΔTRELTA = 25°C; typical at VCC = 2.5 Vtyp -4 mV/°C6
Input capacitance CinRx, Ry; TA = 25°C; typical at VCC = 2.5 Vtyp 2.5 · max 4 pF6
Input capacitance CinRx, Ry; TA = –40°C to 85°Cmax 4 pF6
Temperature coefficient of input thresholds ΔV/ΔTINSx, Sy; TA = 25°C; typical at VCC = 3.3 Vtyp -2 mV/°C7
Low-level output voltage VOLSx, Sy; ISx, ISy = 3 mA; TA = 25°C; typical at VCC = 3.3 Vmin 0.8 · typ 0.88 · max 1 V7
Low-level output voltage VOLSx, Sy; ISx, ISy = 0.2 mA; TA = 25°C; typical at VCC = 3.3 Vmin 0.67 · typ 0.73 · max 0.79 V7
Temperature coefficient of output low levels ΔV/ΔTOUTSx, Sy; ISx, ISy = 0.2 mA; TA = 25°C; typical at VCC = 3.3 Vtyp -1.8 mV/°C7
Quiescent supply current ICCSx = Sy = VCC; TA = 25°C; typical at VCC = 3.3 Vtyp 0.9 · max 1.8 mA7
Additional supply current per pin low ΔICCTx, Ty; TA = 25°C; typical at VCC = 3.3 Vtyp 1.7 · max 2.75 mA7
Additional supply current per pin low ΔICCTx, Ty; TA = –40°C to 85°Cmax 3 mA7
Dynamic output sink capability on I2C bus IIOSSx, Sy; VSx, VSy > 2 V, VRx, VRy = low; TA = 25°C; typical at VCC = 3.3 Vmin 7 · typ 18 mA7
Dynamic output sink capability on I2C bus IIOSSx, Sy; VSx, VSy > 2 V, VRx, VRy = low; TA = –40°C to 85°Cmin 5.7 mA7
Leakage current on I2C bus IIOSSx, Sy; VSx, VSy = 5 V, VRx, VRy = high; TA = 25°C; typical at VCC = 3.3 Vtyp 0.1 · max 1 uA7
Leakage current on I2C bus IIOSSx, Sy; VSx, VSy = 5 V, VRx, VRy = high; TA = –40°C to 85°Cmax 1 uA7
Dynamic output sink capability on buffered bus IIOTTx, Ty; VTx, VTy > 1 V, VSx, VSy = low on I2C bus = 0.4 V; TA = 25°C; typical at VCC = 3.3 Vmin 60 · typ 100 mA7
Dynamic output sink capability on buffered bus IIOTTx, Ty; VTx, VTy > 1 V, VSx, VSy = low on I2C bus = 0.4 V; TA = –40°C to 85°Cmin 60 mA7
Leakage current on buffered bus IIOTTx, Ty; VTx, VTy = VCC = 3.3 V, VSx, VSy = high; TA = 25°Ctyp 0.1 · max 1 uA7
Leakage current on buffered bus IIOTTx, Ty; VTx, VTy = VCC = 3.3 V, VSx, VSy = high; TA = –40°C to 85°Cmax 1 uA7
Input current from I2C bus IISx, Sy; Bus low, VRx, VRy = high; TA = 25°C; typical at VCC = 3.3 Vtyp -1 uA7
Input current from I2C bus IISx, Sy; Bus low, VRx, VRy = high; TA = –40°C to 85°Cmax 1 uA7
Input current from buffered bus IIRx, Ry; Bus low, VRx, VRy = 0.4 V; TA = 25°C; typical at VCC = 3.3 Vtyp -1 uA7
Input current from buffered bus IIRx, Ry; Bus low, VRx, VRy = 0.4 V; TA = –40°C to 85°Cmax 1 uA7
Leakage current on buffered bus input IIRx, Ry; VRx, VRy = VCC; TA = 25°C; typical at VCC = 3.3 Vtyp 1 uA7
Leakage current on buffered bus input IIRx, Ry; VRx, VRy = VCC; TA = –40°C to 85°Cmax 1.5 uA7
Input threshold VITSx, Sy; Input logic-level high threshold on normal I2C bus; TA = 25°C; typical at VCC = 3.3 Vtyp 0.65 · max 0.7 V7
Input threshold VITSx, Sy; Input logic-level low threshold on normal I2C bus; TA = 25°C; typical at VCC = 3.3 Vmin 0.6 · typ 0.65 V7
Input/output logic level difference VIOdiffSx, Sy; (VSx output low at 3 mA) – (VSx input high max) for I2C applications; TA = 25°C; typical at VCC = 3.3 Vmin 100 · typ 150 mV7
Input/output logic level difference VIOdiffSx, Sy; (VSx output low at 3 mA) – (VSx input high max) for I2C applications; TA = –40°C to 85°Cmin 100 mV7
VCC voltage at which all buses are released VIOrelSx, Sy, Tx, Ty; Sx, Sy are low, VCC ramping, voltage on Tx, Ty lowered until released; TA = 25°Cmin 1 V7
VCC voltage at which all buses are released VIOrelSx, Sy, Tx, Ty; Sx, Sy are low, VCC ramping, voltage on Tx, Ty lowered until released; TA = –40°C to 85°Cmin 1 V7
Temperature coefficient of release voltage ΔV/ΔTRELTA = 25°C; typical at VCC = 3.3 Vtyp -4 mV/°C7
Input capacitance CinRx, Ry; TA = 25°C; typical at VCC = 3.3 Vtyp 2.5 · max 4 pF7
Temperature coefficient of input thresholds ΔV/ΔTINSx, Sy; TA = 25°C; typical at VCC = 5 Vtyp -2 mV/°C8
Low-level output voltage VOLSx, Sy; ISx, ISy = 3 mA; TA = 25°C; typical at VCC = 5 Vmin 0.8 · typ 0.88 · max 1 V8
Low-level output voltage VOLSx, Sy; ISx, ISy = 0.2 mA; TA = 25°C; typical at VCC = 5 Vmin 0.67 · typ 0.73 · max 0.79 V8
Temperature coefficient of output low levels ΔV/ΔTOUTSx, Sy; ISx, ISy = 0.2 mA; TA = 25°C; typical at VCC = 5 Vtyp -1.8 mV/°C8
Quiescent supply current ICCSx = Sy = VCC; TA = 25°C; typical at VCC = 5 Vtyp 0.9 · max 1.8 mA8
Additional supply current per pin low ΔICCTx, Ty; TA = 25°C; typical at VCC = 5 Vtyp 1.7 · max 2.75 mA8
Additional supply current per pin low ΔICCTx, Ty; TA = –40°C to 85°Cmax 3 mA8
Dynamic output sink capability on I2C bus IIOSSx, Sy; VSx, VSy > 2 V, VRx, VRy = low; TA = 25°C; typical at VCC = 5 Vmin 7 · typ 18 mA8
Dynamic output sink capability on I2C bus IIOSSx, Sy; VSx, VSy > 2 V, VRx, VRy = low; TA = –40°C to 85°Cmin 6 mA8
Leakage current on I2C bus IIOSSx, Sy; VSx, VSy = 5 V, VRx, VRy = high; TA = 25°Ctyp 0.1 · max 1 uA8
Dynamic output sink capability on buffered bus IIOTTx, Ty; VTx, VTy > 1 V, VSx, VSy = low on I2C bus = 0.4 V; TA = 25°C; typical at VCC = 5 Vmin 60 · typ 100 mA8
Leakage current on buffered bus IIOTTx, Ty; VTx, VTy = VCC = 5 V, VSx, VSy = high; TA = 25°Ctyp 0.1 · max 1 uA8
Leakage current on buffered bus IIOTTx, Ty; VTx, VTy = VCC = 5 V, VSx, VSy = high; TA = –40°C to 85°Cmax 1 uA8
Input current from I2C bus IISx, Sy; Bus low, VRx, VRy = high; TA = 25°C; typical at VCC = 5 Vtyp -1 uA8
Input current from buffered bus IIRx, Ry; Bus low, VRx, VRy = 0.4 V; TA = 25°C; typical at VCC = 5 Vtyp -1 uA8
Leakage current on buffered bus input IIRx, Ry; VRx, VRy = VCC; TA = 25°C; typical at VCC = 5 Vtyp 1 uA8
Input threshold VITSx, Sy; Input logic-level high threshold on normal I2C bus; TA = 25°C; typical at VCC = 5 Vtyp 0.65 · max 0.7 V8
Input threshold VITSx, Sy; Input logic-level low threshold on normal I2C bus; TA = 25°C; typical at VCC = 5 Vmin 0.6 · typ 0.65 V8
Input/output logic level difference VIOdiffSx, Sy; (VSx output low at 3 mA) – (VSx input high max) for I2C applications; TA = 25°C; typical at VCC = 5 Vmin 100 · typ 150 mV8
VCC voltage at which all buses are released VIOrelSx, Sy, Tx, Ty; Sx, Sy are low, VCC ramping, voltage on Tx, Ty lowered until released; TA = 25°Cmin 1 V8
VCC voltage at which all buses are released VIOrelSx, Sy, Tx, Ty; Sx, Sy are low, VCC ramping, voltage on Tx, Ty lowered until released; TA = –40°C to 85°Cmin 1 V8
Temperature coefficient of release voltage ΔV/ΔTRELTA = 25°C; typical at VCC = 5 Vtyp -4 mV/°C9
Input capacitance CinRx, Ry; TA = 25°C; typical at VCC = 5 Vtyp 2.5 · max 4 pF9
Temperature coefficient of input thresholds ΔV/ΔTINSx, Sy; TA = 25°Ctyp -2 mV/°C9
Low-level output voltage VOLSx, Sy; ISx, ISy = 3 mA; TA = 25°Cmin 0.8 · typ 0.88 · max 1 V9
Low-level output voltage VOLSx, Sy; ISx, ISy = 0.2 mA; TA = 25°Cmin 0.67 · typ 0.73 · max 0.79 V9
Temperature coefficient of output low levels ΔV/ΔTOUTSx, Sy; ISx, ISy = 0.2 mA; TA = 25°Ctyp -1.8 mV/°C9
Quiescent supply current ICCSx = Sy = VCC; TA = 25°Ctyp 0.9 · max 1.8 mA9
Quiescent supply current ICCSx = Sy = VCC; TA = –40°C to 85°Cmax 2 mA9
Additional supply current per pin low ΔICCTx, Ty; TA = 25°Ctyp 1.7 · max 2.75 mA9
Dynamic output sink capability on I2C bus IIOSSx, Sy; VSx, VSy > 2 V, VRx, VRy = low; TA = 25°Cmin 7 · typ 18 mA9
Dynamic output sink capability on I2C bus IIOSSx, Sy; VSx, VSy > 2 V, VRx, VRy = low; TA = –40°C to 85°Cmin 6.5 mA9
Leakage current on I2C bus IIOSSx, Sy; VSx, VSy = 15 V, VRx, VRy = high; TA = 25°Ctyp 0.1 · max 1 uA9
Leakage current on I2C bus IIOSSx, Sy; VSx, VSy = 15 V, VRx, VRy = high; TA = –40°C to 85°Cmax 1 uA9
Dynamic output sink capability on buffered bus IIOTTx, Ty; VTx, VTy > 1 V, VSx, VSy = low on I2C bus = 0.4 V; TA = 25°Cmin 60 · typ 100 mA9
Dynamic output sink capability on buffered bus IIOTTx, Ty; VTx, VTy > 1 V, VSx, VSy = low on I2C bus = 0.4 V; TA = –40°C to 85°Cmin 60 mA9
Leakage current on buffered bus IIOTTx, Ty; VTx, VTy = VCC = 15 V, VSx, VSy = high; TA = 25°Ctyp 0.1 · max 1 uA9
Leakage current on buffered bus IIOTTx, Ty; VTx, VTy = VCC = 15 V, VSx, VSy = high; TA = –40°C to 85°Cmax 1 uA9
Input current from I2C bus IISx, Sy; Bus low, VRx, VRy = high; TA = 25°Ctyp -1 uA9
Input current from buffered bus IIRx, Ry; Bus low, VRx, VRy = 0.4 V; TA = 25°Ctyp -1 uA9
Leakage current on buffered bus input IIRx, Ry; VRx, VRy = VCC; TA = 25°Ctyp 1 uA9
Input threshold VITSx, Sy; Input logic-level high threshold on normal I2C bus; TA = 25°Ctyp 0.65 · max 0.7 V9
Input threshold VITSx, Sy; second input logic-level high threshold row, as printed; TA = 25°Cmin 0.6 · typ 0.65 V9
Input/output logic level difference (5) VIOdiffVCC = 15 V, TA = 25°C; Sx, Sy; (VSx output low at 3 mA) – (VSx input high max) for I2C applicationsmin 100 · typ 150 mV10
Input/output logic level difference (5) VIOdiffVCC = 15 V, TA = –40°C to 85°C; Sx, Sy; (VSx output low at 3 mA) – (VSx input high max) for I2C applicationsmin 100 mV10
VCC voltage at which all buses are released VIOrelTA = 25°C; Sx, Sy, Tx, Ty; Sx, Sy are low, VCC ramping, voltage on Tx, Ty lowered until releasedmin 1 V10
VCC voltage at which all buses are released VIOrelTA = –40°C to 85°C; Sx, Sy, Tx, Ty; Sx, Sy are low, VCC ramping, voltage on Tx, Ty lowered until releasedmin 1 V10
Temperature coefficient of release voltage ΔV/ΔTRELTA = 25°Ctyp -4 mV/°C10
Input capacitance CinVCC = 15 V, TA = 25°C; Rx, Rytyp 2.5 · max 4 pF10
Input capacitance CinVCC = 15 V, TA = –40°C to 85°C; Rx, Rymax 4 pF10
Buffer delay time on falling input tpzlVCC = 5 V, TA = 25°C, no capacitive loads; VSx (or VSy) = input switching threshold to VTx (or VTy) output falling 50% of VLOAD; RTx pullup = 160 Ω, CTx = 7 pF + board trace capacitancetyp 70 ns10
Buffer delay time on rising input tplzVCC = 5 V, TA = 25°C, no capacitive loads; VSx (or VSy) = input switching threshold to VTx (or VTy) output reaching 50% of VLOAD; RTx pullup = 160 Ω, CTx = 7 pF + board trace capacitancetyp 90 ns10
Buffer delay time on falling input tpzlVCC = 5 V, TA = 25°C, no capacitive loads; VRx (or VRy) = input switching threshold to VSx (or VSy) output falling 50% of VLOAD; RSx pullup = 1500 Ω, CTx = 7 pF + board trace capacitancetyp 250 ns10
Buffer delay time on rising input tplzVCC = 5 V, TA = 25°C, no capacitive loads; VRx (or VRy) = input switching threshold to VSx (or VSy) output reaching 50% of VLOAD; RSx pullup = 1500 Ω, CTx = 7 pF + board trace capacitancetyp 270 ns10

Pins, by the datasheet

8
1 Sx
Serial data bus or SDA. Connect to VCC of I2C master through a pullup resistor. · p. 4
2 Rx
Receive signal. Connect to VCC of P82B96 through a pullup resistor. · p. 4
3 Tx
Transmit signal. Connect to VCC of P82B96 through a pullup resistor. · p. 4
4 GND
Ground. · p. 4
5 Ty
Transmit signal. Connect to VCC of P82B96 through a pullup resistor. · p. 4
6 Ry
Receive signal. Connect to VCC of P82B96 through a pullup resistor. · p. 4
7 Sy
Serial clock bus or SCL. Connect to VCC of I2C master through a pullup resistor. · p. 4
8 VCC
Supply voltage. · p. 4

Ordering codes, by the datasheet

11
P82B96D
SOIC · 8 pins, package drawing D, quantity 75, operating temperature -40 to 85 °C · p. 23
P82B96DG4
SOIC · 8 pins, package drawing D, quantity 75, operating temperature -40 to 85 °C · p. 23
P82B96DGKR
VSSOP · 8 pins, package drawing DGK, quantity 2500, operating temperature -40 to 85 °C · p. 23
P82B96DGKRG4
VSSOP · 8 pins, package drawing DGK, quantity 2500, operating temperature -40 to 85 °C · p. 23
P82B96DR
SOIC · 8 pins, package drawing D, quantity 2500, operating temperature -40 to 85 °C · p. 23
P82B96DRG4
SOIC · 8 pins, package drawing D, quantity 2500, operating temperature -40 to 85 °C · p. 23
P82B96P
PDIP · 8 pins, package drawing P, quantity 50, operating temperature -40 to 85 °C · p. 23
P82B96PW
TSSOP · 8 pins, package drawing PW, quantity 150, operating temperature -40 to 85 °C · p. 23
P82B96PWG4
TSSOP · 8 pins, package drawing PW, quantity 150, operating temperature -40 to 85 °C · p. 23
P82B96PWR
TSSOP · 8 pins, package drawing PW, quantity 2000, operating temperature -40 to 85 °C · p. 23
P82B96PWRG4
TSSOP · 8 pins, package drawing PW, quantity 2000, operating temperature -40 to 85 °C · p. 23

Parameters

16
Current - Supply
900uA
Data Rate
400Kbps
Delay Time
70ns
Features
Bus capacitance isolation
Input Capacitance
4pF
Input Type
2-Wire Bus
Number of Channels
2
Operating Temperature
-40℃~+85℃
Output Current per Pin(Max)
250mA
Output Type
2-Wire Bus
Thermal Resistance(Junction to Ambient)
109.1℃/W
Thermal Resistance(Junction to Board)
48.6℃/W
Thermal Resistance(Junction to Case)
61.6℃/W
Type
Buffer
Voltage - Supply
2V~15V
Voltage - Supply(Absolute Max)
18V

Order codes

2

Pinout

8
The pins of the P82B96D
PinNameType
1SDAInput/output
2RXD-SDAInput
3TXD-SDAOutput
4GNDPower in
5TXD-SCLOutput
6RXD-SCLInput
7SCLInput/output
8VCCPower in

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Questions

Is there a KiCad symbol and footprint for the P82B96D?

Yes. The symbol is Interface_Expansion:P82B96 and the footprint Package_SO:SOIC-8_3.9x4.9mm_P1.27mm, both drawn on this page. PCBKit places them on a board for you when you design with it.

What package is the P82B96D?

SOIC-8, with 8 pins. Its footprint is drawn on this page.

Where is the P82B96D datasheet?

Texas Instruments publishes it: the Datasheet link on this page opens it.

Where can I order the P82B96D?

JLCPCB lists it as part C2652363, with 519 in stock; the sellers' links on this page open their listings.

What can replace the P82B96D?

Parts like it in the library: the TCA4311AD by Texas Instruments, the P82B715TD by NXP Semiconductors, the PCA9508D by NXP Semiconductors and the P82B96TD by NXP Semiconductors. Check their datasheets: a part that fits the footprint may still differ in its ratings.

Which open-source boards use the P82B96D?

14 boards in 7 repositories on GitHub; the most starred are listed on this page, with their KiCad files.

Parts like it

8