
OPA196IDBV
Texas Instruments
-18V~-2.25V、2.25V~18V -40℃~+125℃ 1 100uV 140dB 140uA 15nV/√Hz@1kHz 2.5MHz 20pA 4.5V~36V 500nV/℃ 5pA 65mA 7.5V/us EMI filtering/RF suppression Rail-to-Rail Input, Rail-to-Rail Output SOT-23-5 Operational Amplifier ROHS
- Category
- Operational Amplifier
- Package
- SOT-23-5
- Pins
- 5
Overview
The OPA196IDBV is an operational Amplifier made by Texas Instruments in a SOT-23-5 package with 5 pins. -18V~-2.25V、2.25V~18V -40℃~+125℃ 1 100uV 140dB 140uA 15nV/√Hz@1kHz 2.5MHz 20pA 4.5V~36V 500nV/℃ 5pA 65mA 7.5V/us EMI filtering/RF suppression Rail-to-Rail Input, Rail-to-Rail Output SOT-23-5 Operational Amplifier ROHS.
PCBKit's library has its KiCad symbol (Amplifier_Operational:OPA196xDBV, from KiCad's library) and its footprint (Package_TO_SOT_SMD:SOT-23-5, from KiCad's library), ready for a KiCad board. 103 are in stock at JLCPCB (part C2060757).
Symbol
Footprint
From the datasheet
10- Supply, least
- 4.5 V · V+ – V–, recommended operating minimum · p. 5
- Supply, most
- 36 V · V+ – V–, recommended operating maximum · p. 5
- Supply, absolute maximum
- 40 V · V+ – V–, single-supply absolute maximum · p. 5
- Works from
- -40 °C · Specified operating temperature minimum · p. 5
- Works up to
- 125 °C · Specified operating temperature maximum · p. 5
- Junction, hottest
- 150 °C · Junction temperature absolute maximum · p. 5
- Takes working
- 140 µA · V+, typical quiescent current, IO = 0 A, VS = 8 V to 36 V · p. 8
- Junction to air (DBV (SOT))
- 158.8 K/W · Junction-to-ambient thermal resistance · p. 5
- Junction to case (DBV (SOT))
- 60.7 K/W · Junction-to-case(top) thermal resistance · p. 5
- Junction to board (DBV (SOT))
- 44.8 K/W · Junction-to-board thermal resistance · p. 5
What it is and has
11- Input and output
- Rail-to-rail · p. 1
- Offset voltage drift
- ±0.5 µV/°C typical · p. 1
- Input bias current
- ±5 pA typical · p. 1
- Common-mode rejection
- 140 dB · p. 1
- Voltage noise
- 15 nV/√Hz at 1 kHz · p. 1
- Gain bandwidth
- 2.5 MHz · p. 1
- Input filtering
- EMI/RFI filtered inputs · p. 1
- Capacitive load drive
- 1 nF · p. 1
- Package options
- SOIC-8, SOT-5, VSSOP-8 · p. 1
- Protection
- Internal phase-reversal protection · p. 21
- Protection
- Thermal protection with approximately 180°C threshold · p. 21
Around it
1- cap 0.1 µF
- between V+ and ground; Low-ESR ceramic bypass capacitor, placed as close as possible to the device. · p. 31
Specifications
86| Parameter | Conditions | As printed | Page |
|---|---|---|---|
| Supply voltage, VS = (V+) – (V–) VS | Single supply | max 40 V | 5 |
| Supply voltage, VS = (V+) – (V–) VS | Dual supply; positive and negative rail magnitude | max 20 V | 5 |
| Signal input pins | Current; ±10 mA | max 10 mA | 5 |
| Temperature | Operating | min -40 · max 150 °C | 5 |
| Temperature | Junction | max 150 °C | 5 |
| Temperature Tstg | Storage | min -65 · max 150 °C | 5 |
| Electrostatic discharge V(ESD) | OPAx196; Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001; ±3000 V | max 3000 V | 5 |
| Electrostatic discharge V(ESD) | OPA196; Charged-device model (CDM), per JEDEC specification JESD22-C101; ±1000 V | max 1000 V | 5 |
| Supply voltage, VS = (V+) – (V–) VS | Single supply; dual-supply equivalents ±2.25 V to ±18 V | min 4.5 · max 36 V | 5 |
| Specified temperature | min -40 · max 125 °C | 5 | |
| Junction-to-ambient thermal resistance RθJA | DBV (SOT), 5 pins | typ 158.8 °C/W | 5 |
| Junction-to-case(top) thermal resistance RθJC(top) | DBV (SOT), 5 pins | typ 60.7 °C/W | 5 |
| Junction-to-board thermal resistance RθJB | DBV (SOT), 5 pins | typ 44.8 °C/W | 5 |
| Junction-to-top characterization parameter ψJT | DBV (SOT), 5 pins | typ 1.6 °C/W | 5 |
| Junction-to-board characterization parameter ψJB | DBV (SOT), 5 pins | typ 4.2 °C/W | 5 |
| Input offset voltage VOS | VS = ±18 V; values are ± magnitudes | typ 25 · max 100 uV | 7 |
| Input offset voltage VOS | VS = ±18 V, VCM = (V+) – 1.5 V; values are ± magnitudes | typ 25 · max 100 uV | 7 |
| Input offset voltage drift dVOS/dT | VS = ±18 V, VCM = (V+) – 3 V; TA = –40°C to +125°C; ± typical | typ 0.5 uV/°C | 7 |
| Input offset voltage drift dVOS/dT | VS = ±18 V, VCM = (V+) – 1.5 V; TA = –40°C to +125°C; ± typical | typ 0.8 uV/°C | 7 |
| Power-supply rejection ratio PSRR | TA = –40°C to +125°C; values are ± magnitudes | typ 0.3 · max 1 uV/V | 7 |
| Input bias current IB | Values are ± magnitudes | typ 5 · max 20 pA | 7 |
| Input offset current IOS | Values are ± magnitudes | typ 2 · max 20 pA | 7 |
| Input voltage noise En | (V–) – 0.1 V < VCM < (V+) – 3 V; f = 0.1 Hz to 10 Hz | typ 1.4 uVPP | 7 |
| Input voltage noise En | (V+) – 1.5 V < VCM < (V+) + 0.1 V; f = 0.1 Hz to 10 Hz | typ 7 uVPP | 7 |
| Input voltage noise density en | (V–) – 0.1 V < VCM < (V+) – 3 V; f = 100 Hz | typ 18 nV/√Hz | 7 |
| Input voltage noise density en | (V–) – 0.1 V < VCM < (V+) – 3 V; f = 1 kHz | typ 15 nV/√Hz | 7 |
| Input voltage noise density en | (V+) – 1.5 V < VCM < (V+) + 0.1 V; f = 100 Hz | typ 53 nV/√Hz | 7 |
| Input voltage noise density en | (V+) – 1.5 V < VCM < (V+) + 0.1 V; f = 1 kHz | typ 24 nV/√Hz | 7 |
| Input current noise density in | f = 1 kHz | typ 1.5 fA/√Hz | 7 |
| Common-mode rejection ratio CMRR | VS = ±18 V; (V–) – 0.1 V < VCM < (V+) – 3 V | min 120 · typ 140 dB | 7 |
| Common-mode rejection ratio CMRR | VS = ±18 V; (V–) < VCM < (V+) – 3 V; TA = –40°C to +125°C | min 114 · typ 126 dB | 7 |
| Common-mode rejection ratio CMRR | VS = ±18 V; (V+) – 1.5 V < VCM < (V+) | min 96 · typ 120 dB | 7 |
| Common-mode rejection ratio CMRR | VS = ±18 V; (V+) – 1.5 V < VCM < (V+); TA = –40°C to +125°C | min 86 · typ 100 dB | 7 |
| Open-loop voltage gain AOL | VS = ±18 V; (V–) + 0.6 V < VO < (V+) – 0.6 V; RL = 2 kΩ | min 124 · typ 134 dB | 7 |
| Open-loop voltage gain AOL | VS = ±18 V; (V–) + 0.6 V < VO < (V+) – 0.6 V; RL = 2 kΩ; TA = –40°C to +125°C | min 114 · typ 126 dB | 7 |
| Open-loop voltage gain AOL | VS = ±18 V; (V–) + 0.3 V < VO < (V+) – 0.3 V; RL = 10 kΩ | min 126 · typ 140 dB | 7 |
| Open-loop voltage gain AOL | VS = ±18 V; (V–) + 0.3 V < VO < (V+) – 0.3 V; RL = 10 kΩ; TA = –40°C to +125°C | min 120 · typ 134 dB | 7 |
| Unity gain bandwidth GBW | typ 2.5 MHz | 8 | |
| Slew rate SR | VS = ±18 V, G = 1, 10-V step; Rising | typ 7.5 V/us | 8 |
| Slew rate SR | VS = ±18 V, G = 1, 10-V step; Falling | typ 5.5 V/us | 8 |
| Settling time ts | To 0.01%, CL = 20 pF; VS = ±18 V, G = 1, 2-V step | typ 0.7 us | 8 |
| Settling time ts | To 0.01%, CL = 20 pF; VS = ±18 V, G = 1, 5-V step | typ 1 us | 8 |
| Settling time ts | To 0.001%, CL = 20 pF; VS = ±18 V, G = 1, 2-V step | typ 1.8 us | 8 |
| Settling time ts | To 0.001%, CL = 20 pF; VS = ±18 V, G = 1, 5-V step | typ 3.7 us | 8 |
| Overload recovery time tOR | VIN × G = VS; From overload to negative rail | typ 0.4 us | 8 |
| Overload recovery time tOR | VIN × G = VS; From overload to positive rail | typ 1 us | 8 |
| Total harmonic distortion + noise THD+N | G = 1, f = 1 kHz, VO = 3.5 VRMS | typ 0.0012 % | 8 |
| Voltage output swing from rail VO | Positive rail; No load | typ 5 · max 15 mV | 8 |
| Voltage output swing from rail VO | Positive rail; RL = 10 kΩ | typ 50 · max 110 mV | 8 |
| Voltage output swing from rail VO | Positive rail; RL = 2 kΩ | typ 200 · max 500 mV | 8 |
| Voltage output swing from rail VO | Negative rail; No load | typ 5 · max 15 mV | 8 |
| Voltage output swing from rail VO | Negative rail; RL = 10 kΩ | typ 50 · max 110 mV | 8 |
| Voltage output swing from rail VO | Negative rail; RL = 2 kΩ | typ 200 · max 500 mV | 8 |
| Short-circuit current ISC | VS = ±18 V; ± typical | typ 65 mA | 8 |
| Open-loop output impedance ZO | f = 1 MHz, IO = 0 A, See Figure 19 | typ 700 Ω | 8 |
| Quiescent current per amplifier IQ | IO = 0 A; TA = 25°C | typ 140 · max 200 uA | 8 |
| Quiescent current per amplifier IQ | IO = 0 A; TA = –40°C to +125°C | max 250 uA | 8 |
| Thermal protection | typ 180 °C | 8 | |
| Thermal hysteresis | typ 30 °C | 8 | |
| Input offset voltage VOS | VS = ±2.25V, VCM = (V+) – 3 V; values are ± magnitudes | typ 25 · max 100 uV | 9 |
| Input offset voltage VOS | VS = ±3V, VCM = (V+) – 1.5 V; values are ± magnitudes | typ 25 · max 100 uV | 9 |
| Input offset voltage drift dVOS/dT | VS = ±2.25V, VCM = (V+) – 3 V; TA = –40°C to +125°C; ± typical | typ 0.5 uV/°C | 9 |
| Input offset voltage drift dVOS/dT | VS = ±2.25V, VCM = (V+) – 1.5 V; TA = –40°C to +125°C; ± typical | typ 0.5 uV/°C | 9 |
| Power-supply rejection ratio PSRR | TA = –40°C to +125°C, VCM = VS / 2 – 0.75 V; ± typical | typ 1 uV/V | 9 |
| Input voltage noise density en | (V–) – 0.1 V < VCM < (V+) – 3 V; f = 1 kHz | typ 15 nV/√Hz | 9 |
| Input voltage noise density en | (V+) – 1.5 V < VCM < (V+) + 0.1 V; f = 100 Hz | typ 53 nV/√Hz | 9 |
| Input current noise density in | f = 1 kHz | typ 1.5 fA/√Hz | 9 |
| Common-mode rejection ratio CMRR | VS = ±2.25 V; (V–) – 0.1 V < VCM < (V+) – 3 V | min 96 · typ 110 dB | 9 |
| Common-mode rejection ratio CMRR | VS = ±2.25 V; (V–) < VCM < (V+) – 3 V; TA = –40°C to +125°C | min 90 · typ 104 dB | 9 |
| Common-mode rejection ratio CMRR | VS = ±2.25 V; (V+) – 1.5 V < VCM < (V+) | min 96 · typ 120 dB | 9 |
| Common-mode rejection ratio CMRR | VS = ±2.25 V; (V+) – 1.5 V < VCM < (V+); TA = –40°C to +125°C | min 84 · typ 100 dB | 9 |
| Open-loop voltage gain AOL | VS = ±2.25V; (V–) + 0.6 V < VO < (V+) – 0.6 V; RL = 2 kΩ | min 110 · typ 120 dB | 9 |
| Open-loop voltage gain AOL | VS = ±2.25V; (V–) + 0.6 V < VO < (V+) – 0.6 V; RL = 2 kΩ; TA = –40°C to +125°C | min 100 · typ 114 dB | 9 |
| Open-loop voltage gain AOL | VS = ±2.25V; (V–) + 0.3 V < VO < (V+) – 0.3 V; RL = 10 kΩ | min 110 · typ 126 dB | 9 |
| Open-loop voltage gain AOL | VS = ±2.25V; (V–) + 0.3 V < VO < (V+) – 0.3 V; RL = 10 kΩ; TA = –40°C to +125°C | min 106 · typ 120 dB | 9 |
| Unity gain bandwidth GBW | typ 2.2 MHz | 10 | |
| Slew rate SR | VS = ±2.25V, G = 1, 1-V step; Rising | typ 6.5 V/us | 10 |
| Slew rate SR | VS = ±2.25V, G = 1, 1-V step; Falling | typ 5.5 V/us | 10 |
| Voltage output swing from rail VO | Positive rail; RL = 10 kΩ | typ 15 · max 110 mV | 10 |
| Voltage output swing from rail VO | Positive rail; RL = 2 kΩ | typ 60 · max 500 mV | 10 |
| Voltage output swing from rail VO | Negative rail; No load | typ 5 · max 15 mV | 10 |
| Voltage output swing from rail VO | Negative rail; RL = 10 kΩ | typ 15 · max 110 mV | 10 |
| Voltage output swing from rail VO | Negative rail; RL = 2 kΩ | typ 60 · max 500 mV | 10 |
| Short-circuit current ISC | VS = ±2.25V; ± typical | typ 30 mA | 10 |
| Open-loop output impedance ZO | f = 1 MHz, IO = 0 A, see Figure 19 | typ 700 Ω | 10 |
| Quiescent current per amplifier IQ | IO = 0 A; TA = +25°C | typ 140 · max 200 uA | 10 |
Pins, by the datasheet
5- 1 OUT
- Output. · p. 4
- 2 V–
- Negative (lowest) power supply. · p. 4
- 3 +IN
- Noninverting input. · p. 4
- 4 –IN
- Inverting input. · p. 4
- 5 V+
- Positive (highest) power supply. · p. 4
Parameters
22- Common Mode Rejection Ratio(CMRR)
- 140dB
- Current - Supply
- 140uA
- Dual Supply
- 2.25V~18V
- Features
- EMI filtering/RF suppression
- Gain Bandwidth Product
- 2.5MHz
- Ib - Input Bias Current
- 5pA
- Input Offset Current(Ios)
- 20pA
- Input Offset Voltage Drift(Vos TC)
- 500nV/℃
- Input Voltage Noise Density
- 15nV/√Hz@1kHz
- Junction Temperature(Max)
- 150℃
- Number of Channels
- 1
- Operating Temperature
- -40℃~+125℃
- Output Current
- 65mA
- Quiescent Current
- 140uA
- Rail to Rail
- Rail-to-Rail Input, Rail-to-Rail Output
- Single supply
- 4.5V~36V
- Slew Rate
- 7.5V/us
- Thermal Resistance(Junction to Ambient)
- 158.8℃/W
- Thermal Resistance(Junction to Board)
- 44.8℃/W
- Thermal Resistance(Junction to Case)
- 60.7℃/W
- Voltage - Supply(Absolute Max)
- 40V
- Vos - Input Offset Voltage
- 100uV
Order codes
2- OPA196IDBVTLCSC C2057618
- OPA196IDBVRLCSC C2060757
Pinout
5| Pin | Name | Type |
|---|---|---|
| 1 | — | Output |
| 2 | V- | Power in |
| 3 | + | Input |
| 4 | - | Input |
| 5 | V+ | Power in |
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Is there a KiCad symbol and footprint for the OPA196IDBV?
Yes. The symbol is Amplifier_Operational:OPA196xDBV and the footprint Package_TO_SOT_SMD:SOT-23-5, both drawn on this page. PCBKit places them on a board for you when you design with it.
What package is the OPA196IDBV?
SOT-23-5, with 5 pins. Its footprint is drawn on this page.
Where is the OPA196IDBV datasheet?
Texas Instruments publishes it: the Datasheet link on this page opens it.
Where can I order the OPA196IDBV?
JLCPCB lists it as part C2060757, with 103 in stock; the sellers' links on this page open their listings.
What can replace the OPA196IDBV?
Parts like it in the library: the LMV321B-TR by 3PEAK, the OPA365AIDBV by Texas Instruments, the LMV321LILT by STMicroelectronics and the RS821XF by Jiangsu RUNIC Tech. Check their datasheets: a part that fits the footprint may still differ in its ratings.
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