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ISO7721DWVR on a board, in 3D

ISO7721DWVR

Texas Instruments

-55℃~+125℃ 1 1 100Mbps 100kV/us 11ns 2.25V~5.5V 2.25V~5.5V 5000 SOIC-8 Digital Isolators ROHS

Extended
DatasheetJLCPCBLCSCti/ISO7721DWVR
Category
Digital Isolators
Package
SOIC-8
Pins
8

Overview

The ISO7721DWVR is a digital Isolator made by Texas Instruments in a SOIC-8 package with 8 pins. -55℃~+125℃ 1 1 100Mbps 100kV/us 11ns 2.25V~5.5V 2.25V~5.5V 5000 SOIC-8 Digital Isolators ROHS.

PCBKit's library has its KiCad symbol (Isolator:ISO7721DWV, from KiCad's library) and its footprint (Package_SO:SOIC-8_3.9x4.9mm_P1.27mm, from KiCad's library), ready for a KiCad board. 19 are in stock at JLCPCB (part C2864013). 4 open-source boards in 3 repositories on GitHub use it.

Symbol

VCC11OUTA2INB3GND14GND25OUTB6INA7VCC28
Isolator:ISO7721DWVFrom KiCad's library

Footprint

12345678
Package_SO:SOIC-8_3.9x4.9mm_P1.27mmFrom KiCad's library

From the datasheet

20
Supply, least
2.25 V · VCC1, recommended operating min · p. 8
Supply, most
5.5 V · VCC1, recommended operating max · p. 8
Supply, absolute maximum
6 V · VCC1, absolute max · p. 7
Works from
-55 °C · Ambient temperature min · p. 8
Works up to
125 °C · Ambient temperature max · p. 8
Junction, hottest
150 °C · Junction temperature absolute max · p. 7
A pin gives at most
15 mA · Output source or sink current absolute max · p. 7
Takes working
3.4 mA · sum of ICC1 and ICC2 typical, 5 V, all channels switching at 1 Mbps, CL = 15 pF · p. 14
Takes at most
19.8 mA · sum of ICC1 and ICC2 max, 5 V, all channels switching at 100 Mbps, CL = 15 pF · p. 14
Data rate, most
100 Mbit/s · Data rate max · p. 8
Junction to air (DWV (SOIC))
84.3 K/W · Junction-to-ambient thermal resistance · p. 9
Junction to case (DWV (SOIC))
36.3 K/W · Junction-to-case (top) thermal resistance · p. 9
Junction to board (DWV (SOIC))
47 K/W · Junction-to-board thermal resistance · p. 9
Takes working
11.2 mA · sum of ICC1 and ICC2 typical, 3.3 V, all channels switching at 100 Mbps, CL = 15 pF · p. 15
Takes at most
15.6 mA · sum of ICC1 and ICC2 max, 3.3 V, all channels switching at 100 Mbps, CL = 15 pF · p. 15
Takes working
9.2 mA · sum of ICC1 and ICC2 typical, 2.5 V, all channels switching at 100 Mbps, CL = 15 pF · p. 16
Takes at most
13 mA · sum of ICC1 and ICC2 max, 2.5 V, all channels switching at 100 Mbps, CL = 15 pF · p. 16
Edge
2.4 ns · output rise time typical, 5 V supply · p. 17
Edge
700 ps · output rise time typical, 3.3 V supply · p. 17
Edge
1 ns · output rise time typical, 2.5 V supply · p. 18

What it is and has

8
Data rate
100 Mbps · p. 1
Level translation
2.25 V to 5.5 V · p. 1
Propagation delay
11 ns typical · p. 1
Channel direction
Two channels in opposite directions · p. 1
Package
DWV (8), 5.85 mm × 7.50 mm · p. 1
Channel direction
1 Forward, 1 Reverse · p. 24
Default output state
High · p. 24
Rated isolation
DWV-8: 5000 VRMS / 7071 VPK · p. 24

Around it

2
cap 0.1 µF
between VCC1 and GND1; Decoupling capacitor · p. 28
cap 0.1 µF
between VCC2 and GND2; Decoupling capacitor · p. 28

Specifications

99
ParameterConditionsAs printedPage
Supply voltage VCC1, VCC2Relative to local groundmin -0.5 · max 6 V7
Voltage at INx, OUTx VMaximum VCCX + 0.5 V; must not exceed 6 Vmin -0.5 V7
Output current IOmin -15 · max 15 mA7
Junction temperature TJmax 150 °C7
Storage temperature Tstgmin -65 · max 150 °C7
Electrostatic discharge VESDHuman body model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins; ±6000 Vmax 6000 V7
Electrostatic discharge VESDCharged device model (CDM), per JEDEC specification JESD22-C101, all pins; ±1500 Vmax 1500 V7
Electrostatic discharge VESDContact discharge per IEC 61000-4-2; isolation barrier withstand test; ±8000 Vmax 8000 V7
Supply voltage VCC1, VCC2VCC1 and VCC2 can be set independentlymin 2.25 · max 5.5 V8
UVLO threshold when supply voltage is rising VCC(UVLO+)NOM column represented by typtyp 2 · max 2.25 V8
UVLO threshold when supply voltage is falling VCC(UVLO-)NOM column represented by typmin 1.7 · typ 1.8 V8
Supply voltage UVLO hysteresis VHYS(UVLO)NOM column represented by typmin 100 · typ 200 mV8
High level output current IOHVCCO = 5 Vmin -4 mA8
High level output current IOHVCCO = 3.3 Vmin -2 mA8
High level output current IOHVCCO = 2.5 Vmin -1 mA8
Low level output current IOLVCCO = 5 Vmax 4 mA8
Low level output current IOLVCCO = 3.3 Vmax 2 mA8
Low level output current IOLVCCO = 2.5 Vmax 1 mA8
Low level Input voltage VILMaximum 0.3 x VCCImin 0 V8
Data Rate DRmin 0 · max 100 Mbps8
Ambient temperature TANOM column represented by typmin -55 · typ 25 · max 125 °C8
Junction-to-ambient thermal resistance RθJADWV (SOIC)typ 84.3 °C/W9
Junction-to-case (top) thermal resistance RθJC(top)DWV (SOIC)typ 36.3 °C/W9
Junction-to-board thermal resistance RθJBDWV (SOIC)typ 47 °C/W9
Junction-to-top characterization parameter ψJTDWV (SOIC)typ 7.4 °C/W9
Junction-to-board characterization parameter ψJBDWV (SOIC)typ 45.1 °C/W9
Maximum power dissipation (both sides) PDISO7721; VCC1 = VCC2 = 5.5 V, TJ = 150°C, CL = 15 pF, Input a 50-MHz 50% duty cycle square wavemax 110 mW9
Maximum power dissipation (side-1) PD1ISO7721; VCC1 = VCC2 = 5.5 V, TJ = 150°C, CL = 15 pF, Input a 50-MHz 50% duty cycle square wavemax 55 mW9
Maximum power dissipation (side-2) PD2ISO7721; VCC1 = VCC2 = 5.5 V, TJ = 150°C, CL = 15 pF, Input a 50-MHz 50% duty cycle square wavemax 55 mW9
External clearance CLRDWV; IEC 60664-1; shortest terminal-to-terminal distance through airmin 8.5 mm10
External creepage CPGDWV; IEC 60664-1; shortest terminal-to-terminal distance across the package surfacemin 8.5 mm10
Distance through the insulation DTIDWV; minimum internal gap (internal clearance)min 17 um10
Maximum repetitive peak isolation voltage VIORMISO772x, DWV; AC voltage (bipolar); DIN EN IEC 60747-17max 2121 VPK10
Maximum working isolation voltage VIOWMISO772x, DWV; AC voltage; time-dependent dielectric breakdown (TDDB) test, see Figure 9-6max 1500 VRMS10
Maximum working isolation voltage VIOWMISO772x, DWV; DC voltagemax 2121 VDC10
Maximum transient isolation voltage VIOTMDWV; VTEST = VIOTM, t = 60 s (qualification); VTEST = 1.2 × VIOTM, t = 1 s (100% production)max 7071 VPK10
Maximum impulse voltage VIMPISO772x, DWV; tested in air, 1.2/50-us waveform per IEC 62368-1max 8000 VPK10
Maximum surge isolation voltage VIOSMISO772x, DWV; VIOSM ≥ 1.3 x VIMP; tested in oil (qualification test), 1.2/50-us waveform, per IEC 62368-1max 12800 VPK10
Apparent charge qpdDWV; method a: after I/O safety test subgroup 2/3; Vini = VIOTM, tini = 60 s; Vpd(m) = 1.2 × VIORM, tm = 10 smax 5 pC10
Apparent charge qpdISO772x, DWV; method a: after environmental tests subgroup 1; Vini = VIOTM, tini = 60 s; Vpd(m) = 1.6 x VIORM, tm = 10 smax 5 pC10
Apparent charge qpdISO772x, DWV; method b: routine test and preconditioning; Vini = 1.2 x VIOTM, tini = 1 s; Vpd(m) = 1.875 x VIORM, tm = 1 s (b1), or Vpd(m) = Vini, tm = tini (b2)max 5 pC10
Barrier capacitance, input to output CIODWV; VIO = 0.4 × sin (2 πft), f = 1 MHz; approximately 0.5 pFtyp 0.5 pF10
Safety input, output, or supply current ISDWV-8; RθJA = 84.3°C/W, VI = 5.5 V, TJ = 150°C, TA = 25°C, see Figure 6-3max 270 mA12
Safety input, output, or supply current ISDWV-8; RθJA = 84.3°C/W, VI = 3.6 V, TJ = 150°C, TA = 25°C, see Figure 6-3max 412 mA12
Safety input, output, or supply current ISDWV-8; RθJA = 84.3°C/W, VI = 2.75 V, TJ = 150°C, TA = 25°C, see Figure 6-3max 539 mA12
Safety input, output, or total power PSDWV-8; RθJA = 84.3°C/W, TJ = 150°C, TA = 25°C, see Figure 6-4max 1483 mW12
Maximum safety temperature TSDWV-8max 150 °C12
High-level output voltage VOHVCC1 = VCC2 = 5 V ± 10%; IOH = -4 mA; see Figure 7-1; minimum VCCO - 0.4 Vtyp 4.8 V14
Low-level output voltage VOLVCC1 = VCC2 = 5 V ± 10%; IOL = 4 mA; see Figure 7-1typ 0.2 · max 0.4 V14
High-level input current IIHVCC1 = VCC2 = 5 V ± 10%; VIH = VCCI at INxmax 10 uA14
Low-level input current IILVCC1 = VCC2 = 5 V ± 10%; VIL = 0 V at INxmin -10 uA14
Common mode transient immunity CMTIVCC1 = VCC2 = 5 V ± 10%; VI = VCCI or 0 V, VCM = 1200 V; see Figure 7-3min 85 · typ 100 kV/us14
Input Capacitance CIVI = VCC/2 + 0.4×sin(2πft), f = 1 MHz, VCC = 5 V; measured from input pin to same side groundtyp 2 pF14
Supply current - DC signal ICC1, ICC2ISO7721; each supply; VCC1 = VCC2 = 5 V ± 10%; VI = VCCItyp 1 · max 2.2 mA14
Supply current - DC signal ICC1, ICC2ISO7721; each supply; VCC1 = VCC2 = 5 V ± 10%; VI = 0 Vtyp 2.2 · max 3.4 mA14
Supply current - AC signal ICC1, ICC2ISO7721; each supply; VCC1 = VCC2 = 5 V ± 10%; all channels switching with square wave clock input; CL = 15 pF; 1 Mbpstyp 1.7 · max 2.9 mA14
Supply current - AC signal ICC1, ICC2ISO7721; each supply; VCC1 = VCC2 = 5 V ± 10%; all channels switching with square wave clock input; CL = 15 pF; 10 Mbpstyp 2.2 · max 3.5 mA14
Supply current - AC signal ICC1, ICC2ISO7721; each supply; VCC1 = VCC2 = 5 V ± 10%; all channels switching with square wave clock input; CL = 15 pF; 100 Mbpstyp 7.3 · max 9.9 mA14
High-level output voltage VOHVCC1 = VCC2 = 3.3 V ± 10%; IOH = -2mA; see Figure 7-1; minimum is VCCO - 0.3(1)typ 3.2 V15
Low-level output voltage VOLVCC1 = VCC2 = 3.3 V ± 10%; IOL = 2mA; see Figure 7-1typ 0.1 · max 0.3 V15
High-level input current IIHVCC1 = VCC2 = 3.3 V ± 10%; VIH = VCCI (1) at INxmax 10 uA15
Low-level input current IILVCC1 = VCC2 = 3.3 V ± 10%; VIL = 0 V at INxmin -10 uA15
Common mode transient immunity CMTIVCC1 = VCC2 = 3.3 V ± 10%; VI = VCCI or 0 V, VCM = 1200 V; see Figure 7-3min 85 · typ 100 kV/us15
Supply current - DC signal ICC1, ICC2ISO7721; VCC1 = VCC2 = 3.3 V ± 10%; VI = VCCI; values apply to each supplytyp 1 · max 2.1 mA15
Supply current - DC signal ICC1, ICC2ISO7721; VCC1 = VCC2 = 3.3 V ± 10%; VI = 0 V; values apply to each supplytyp 2.2 · max 3.4 mA15
Supply current - AC signal ICC1, ICC2ISO7721; VCC1 = VCC2 = 3.3 V ± 10%; all channels switching with square wave clock input; CL = 15 pF; 1 Mbps; values apply to each supplytyp 1.6 · max 2.8 mA15
Supply current - AC signal ICC1, ICC2ISO7721; VCC1 = VCC2 = 3.3 V ± 10%; all channels switching with square wave clock input; CL = 15 pF; 10 Mbps; values apply to each supplytyp 2 · max 3.2 mA15
Supply current - AC signal ICC1, ICC2ISO7721; VCC1 = VCC2 = 3.3 V ± 10%; all channels switching with square wave clock input; CL = 15 pF; 100 Mbps; values apply to each supplytyp 5.6 · max 7.8 mA15
High-level output voltage VOHVCC1 = VCC2 = 2.5 V ± 10%; IOH = -1mA; see Figure 7-1; minimum is VCCO - 0.2(1)typ 2.45 V16
Low-level output voltage VOLVCC1 = VCC2 = 2.5 V ± 10%; IOL = 1mA; see Figure 7-1typ 0.05 · max 0.2 V16
High-level input current IIHVCC1 = VCC2 = 2.5 V ± 10%; VIH = VCCI (1) at INxmax 10 uA16
Low-level input current IILVCC1 = VCC2 = 2.5 V ± 10%; VIL = 0 V at INxmin -10 uA16
Common mode transient immunity CMTIVCC1 = VCC2 = 2.5 V ± 10%; VI = VCCI or 0 V, VCM = 1200 V; see Figure 7-3min 85 · typ 100 kV/us16
Supply current - DC signal ICC1, ICC2ISO7721; VCC1 = VCC2 = 2.5 V ± 10%; VI = VCCI; values apply to each supplytyp 1 · max 2.1 mA16
Supply current - DC signal ICC1, ICC2ISO7721; VCC1 = VCC2 = 2.5 V ± 10%; VI = 0 V; values apply to each supplytyp 2.2 · max 3.3 mA16
Supply current - AC signal ICC1, ICC2ISO7721; VCC1 = VCC2 = 2.5 V ± 10%; all channels switching with square wave clock input; CL = 15 pF; 1 Mbps; values apply to each supplytyp 1.6 · max 2.7 mA16
Supply current - AC signal ICC1, ICC2ISO7721; VCC1 = VCC2 = 2.5 V ± 10%; all channels switching with square wave clock input; CL = 15 pF; 10 Mbps; values apply to each supplytyp 1.9 · max 3.1 mA16
Supply current - AC signal ICC1, ICC2ISO7721; VCC1 = VCC2 = 2.5 V ± 10%; all channels switching with square wave clock input; CL = 15 pF; 100 Mbps; values apply to each supplytyp 4.6 · max 6.5 mA16
Propagation delay time tPLH, tPHLVCC1 = VCC2 = 5 V ± 10%; see Figure 7-1min 6 · typ 11 · max 17 ns17
Pulse width distortion(1) |tPHL – tPLH| PWDVCC1 = VCC2 = 5 V ± 10%; see Figure 7-1typ 0.5 · max 5.9 ns17
Part-to-part skew time(3) tsk(pp)VCC1 = VCC2 = 5 V ± 10%max 4.5 ns17
Output signal rise time trVCC1 = VCC2 = 5 V ± 10%; see Figure 7-1typ 2.4 · max 3.9 ns17
Output signal fall time tfVCC1 = VCC2 = 5 V ± 10%; see Figure 7-1typ 2.4 · max 3.9 ns17
Default output delay time from input power loss tDOVCC1 = VCC2 = 5 V ± 10%; measured from the time VCC goes below 1.7V; see Figure 7-2typ 0.1 · max 0.3 us17
Time interval error tieVCC1 = VCC2 = 5 V ± 10%; 216 – 1 PRBS data at 100 Mbpstyp 1 ns17
Propagation delay time tPLH, tPHLVCC1 = VCC2 = 3.3 V ± 10%; see Figure 7-1min 6 · typ 11 · max 18.5 ns17
Pulse width distortion(1) |tPHL – tPLH| PWDVCC1 = VCC2 = 3.3 V ± 10%; see Figure 7-1typ 0.5 · max 5.9 ns17
Part-to-part skew time(3) tsk(pp)VCC1 = VCC2 = 3.3 V ± 10%max 5 ns17
Output signal rise time trVCC1 = VCC2 = 3.3 V ± 10%; see Figure 7-1typ 0.7 · max 3 ns17
Output signal fall time tfVCC1 = VCC2 = 3.3 V ± 10%; see Figure 7-1typ 0.7 · max 3 ns17
Default output delay time from input power loss tDOVCC1 = VCC2 = 3.3 V ± 10%; measured from the time VCC goes below 1.7V; see Figure 7-2typ 0.1 · max 0.3 us17
Time interval error tieVCC1 = VCC2 = 3.3 V ± 10%; 216 – 1 PRBS data at 100 Mbpstyp 1 ns17
Propagation delay time tPLH, tPHLVCC1 = VCC2 = 2.5 V ± 10%; see Figure 7-1min 7.5 · typ 12 · max 21 ns18
Pulse width distortion(1) |tPHL – tPLH| PWDVCC1 = VCC2 = 2.5 V ± 10%; see Figure 7-1typ 0.5 · max 5.9 ns18
Part-to-part skew time(3) tsk(pp)VCC1 = VCC2 = 2.5 V ± 10%max 5.5 ns18
Output signal rise time trVCC1 = VCC2 = 2.5 V ± 10%; see Figure 7-1typ 1 · max 3.5 ns18
Output signal fall time tfVCC1 = VCC2 = 2.5 V ± 10%; see Figure 7-1typ 1 · max 3.5 ns18
Default output delay time from input power loss tDOVCC1 = VCC2 = 2.5 V ± 10%; measured from the time VCC goes below 1.7V; see Figure 7-2typ 0.1 · max 0.3 us18
Time interval error tieVCC1 = VCC2 = 2.5 V ± 10%; 216 – 1 PRBS data at 100 Mbpstyp 1 ns18

Pins, by the datasheet

8
1 VCC1
Power supply, VCC1. · p. 6
2 OUTA
Output, channel A. · p. 6
3 INB
Input, channel B. · p. 6
4 GND1
Ground connection for VCC1. · p. 6
5 GND2
Ground connection for VCC2. · p. 6
6 OUTB
Output, channel B. · p. 6
7 INA
Input, channel A. · p. 6
8 VCC2
Power supply, VCC2. · p. 6

Parameters

20
CMTI(kV/us)
100kV/us
Current - Supply
3.4mA
Current - Supply(Max)
19.8mA
Data Rate(Max)
100Mbps
Isolation Voltage(Vrms)
5000
Junction Temperature(Max)
150℃
Number of Channels
2
Number of Forward Channels
1
Number of Reverse Channels
1
Operating Temperature
-55℃~+125℃
Output Current per Pin(Max)
15mA
Propagation Delay(tpd)
11ns
Rise Time
2.4ns
Thermal Resistance(Junction to Ambient)
84.3℃/W
Thermal Resistance(Junction to Board)
47℃/W
Thermal Resistance(Junction to Case)
36.3℃/W
Voltage - Supply
2.25V~5.5V
Voltage - Supply(Absolute Max)
6V
Voltage - Supply(VCCA)
2.25V~5.5V
Voltage - Supply(VCCB)
2.25V~5.5V

Order codes

1

Pinout

8
The pins of the ISO7721DWVR
PinNameType
1VCC1Power in
2OUTAOutput
3INBInput
4GND1Power in
5GND2Power in
6OUTBOutput
7INAInput
8VCC2Power in

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Questions

Is there a KiCad symbol and footprint for the ISO7721DWVR?

Yes. The symbol is Isolator:ISO7721DWV and the footprint Package_SO:SOIC-8_3.9x4.9mm_P1.27mm, both drawn on this page. PCBKit places them on a board for you when you design with it.

What package is the ISO7721DWVR?

SOIC-8, with 8 pins. Its footprint is drawn on this page.

Where is the ISO7721DWVR datasheet?

Texas Instruments publishes it: the Datasheet link on this page opens it.

Where can I order the ISO7721DWVR?

JLCPCB lists it as part C2864013, with 19 in stock; the sellers' links on this page open their listings.

What can replace the ISO7721DWVR?

Parts like it in the library: the ADUM1201ARZ-RL7 by Analog Devices, the CA-IS3720HS by Chipanalog, the CA-IS3721HS by Chipanalog and the ISO7721D by Texas Instruments. Check their datasheets: a part that fits the footprint may still differ in its ratings.

Which open-source boards use the ISO7721DWVR?

4 boards in 3 repositories on GitHub; the most starred are listed on this page, with their KiCad files.

Parts like it

8