2 layers158 × 85 mm
Overview
The ISO1540D is an I2C Isolator made by Texas Instruments in a SOIC-8 package with 8 pins. -40℃~+125℃ 2500 50kV/us Bidirectional Bidirectional automatic direction、Open-drain buffer output SOIC-8 I2C Isolators ROHS.
PCBKit's library has its KiCad symbol (Isolator:ISO1540, from KiCad's library) and its footprint (Package_SO:SOIC-8_3.9x4.9mm_P1.27mm, from KiCad's library), ready for a KiCad board. 36,383 are in stock at JLCPCB (part C179739). 49 open-source boards in 35 repositories on GitHub use it.
Symbol
Footprint
From the datasheet
14- Supply, least
- 3 V · VCC1, recommended operating min · p. 6
- Supply, most
- 5.5 V · VCC1, recommended operating max · p. 6
- Supply, absolute maximum
- 6 V · VCC1, absolute max · p. 6
- Works from
- -40 °C · Ambient temperature min · p. 6
- Works up to
- 125 °C · Ambient temperature max · p. 6
- Junction, hottest
- 150 °C · Junction temperature absolute max · p. 6
- Takes working
- 5.6 mA · sum of ICC1 and ICC2 typical, 4.5–5.5 V, inputs high, loads open · p. 11
- Takes at most
- 14 mA · sum of ICC1 and ICC2 max, 4.5–5.5 V, inputs low, loads open · p. 11
- A pin gives at most
- 20 mA · SDA1 or SCL1 output current absolute max · p. 6
- A pin gives at most
- 100 mA · SDA2 or SCL2 output current absolute max · p. 6
- Junction to air (D (SOIC))
- 114.6 K/W · Junction-to-ambient thermal resistance · p. 7
- Junction to case (D (SOIC))
- 69.6 K/W · Junction-to-case top thermal resistance · p. 7
- Junction to board (D (SOIC))
- 55.3 K/W · Junction-to-board thermal resistance · p. 7
- Edge
- 11 ns · Output fall time typical, side 1, 4.5–5.5 V, 0.7 × VCC1 to 0.3 × VCC1 · p. 12
What it is and has
9- Operating frequency
- Up to 1 MHz · p. 1
- Supply range
- 3 V to 5.5 V · p. 1
- Operating temperature
- –40°C to +125°C · p. 1
- Transient immunity
- ±50 kV/µs typical · p. 1
- Isolation channels
- Two isolated bidirectional channels for clock and data · p. 1
- Isolation certification
- 2500 VRMS for 1 minute per UL 1577 · p. 1
- Maximum operating frequency
- 1 MHz · p. 1
- Transient immunity
- ±50 kV/µs, typical · p. 1
- ESD protection
- HBM, 4 kV on all pins · p. 1
Around it
1- cap 0.1 µF
- between VCC1 and GND1; Supply decoupling; place as close as possible to the supply pin, within 2 mm. · p. 24
Specifications
86| Parameter | Conditions | As printed | Page |
|---|---|---|---|
| Voltage | VCC1, VCC2; relative to local ground | min -0.5 · max 6 V | 6 |
| Voltage | SDA1, SCL1; maximum VCC1 + 0.5 V, not exceeding 6 V | min -0.5 V | 6 |
| Voltage | SDA2, SCL2; maximum VCC2 + 0.5 V, not exceeding 6 V | min -0.5 V | 6 |
| Output current IO | SDA1, SCL1 | min 0 · max 20 mA | 6 |
| Output current IO | SDA2, SCL2 | min 0 · max 100 mA | 6 |
| Maximum junction temperature TJ(MAX) | max 150 °C | 6 | |
| Storage temperature Tstg | min -65 · max 150 °C | 6 | |
| Electrostatic discharge V(ESD) | Human body model (HBM), per ANSI/ESDA/JEDEC JS-001; Bus pins; ±8000 V | max 8000 V | 6 |
| Electrostatic discharge V(ESD) | Human body model (HBM), per ANSI/ESDA/JEDEC JS-001; All pins; ±4000 V | max 4000 V | 6 |
| Electrostatic discharge V(ESD) | Charged-device model (CDM), per JEDEC specification JESD22-C101; ±1500 V | max 1500 V | 6 |
| Supply voltage VCC1, VCC2 | min 3 · max 5.5 V | 6 | |
| Input and output signal voltages, side 1 VSDA1, VSCL1 | Maximum VCC1 | min 0 V | 6 |
| Input and output signal voltages, side 2 VSDA2, VSCL2 | Maximum VCC2 | min 0 V | 6 |
| Low-level input voltage, side 1 VIL1 | min 0 · max 0.5 V | 6 | |
| Low-level input voltage, side 2 VIL2 | Maximum 0.3 × VCC2 | min 0 V | 6 |
| Output current, side 1 IOL1 | min 0.5 · max 3.5 mA | 6 | |
| Output current, side 2 IOL2 | min 0.5 · max 35 mA | 6 | |
| Capacitive load, side 1 C1 | max 40 pF | 6 | |
| Capacitive load, side 2 C2 | max 400 pF | 6 | |
| Operating frequency fMAX | Maximum bus load and maximum current sink | max 1 MHz | 6 |
| Ambient temperature TA | min -40 · max 125 °C | 6 | |
| Junction temperature TJ | min -40 · max 136 °C | 6 | |
| Thermal shutdown TSD | min 139 · max 197 °C | 6 | |
| Junction-to-ambient thermal resistance RθJA | D (SOIC), 8 PINS | typ 114.6 °C/W | 7 |
| Junction-to-case (top) thermal resistance RθJC(top) | D (SOIC), 8 PINS | typ 69.6 °C/W | 7 |
| Junction-to-board thermal resistance RθJB | D (SOIC), 8 PINS | typ 55.3 °C/W | 7 |
| Junction-to-top characterization parameter ψJT | D (SOIC), 8 PINS | typ 27.2 °C/W | 7 |
| Junction-to-board characterization parameter ψJB | D (SOIC), 8 PINS | typ 54.7 °C/W | 7 |
| Maximum power dissipation (both sides) PD | VCC1 = VCC2 = 5.5 V, TJ = 150 °C, C1 = 20 pF, C2 = 400 pF; R1 = 1.4 kΩ, R2 = 94 Ω; Input a 1-MHz 50% duty cycle clock signal | max 105 mW | 7 |
| Maximum power dissipation (side-1) PD1 | VCC1 = VCC2 = 5.5 V, TJ = 150 °C, C1 = 20 pF, C2 = 400 pF; R1 = 1.4 kΩ, R2 = 94 Ω; Input a 1-MHz 50% duty cycle clock signal | max 37 mW | 7 |
| Maximum power dissipation (side-2) PD2 | VCC1 = VCC2 = 5.5 V, TJ = 150 °C, C1 = 20 pF, C2 = 400 pF; R1 = 1.4 kΩ, R2 = 94 Ω; Input a 1-MHz 50% duty cycle clock signal | max 68 mW | 7 |
| External clearance CLR | Shortest terminal-to-terminal distance through air; value >4 mm | min 4 mm | 8 |
| External creepage CPG | Shortest terminal-to-terminal distance across the package surface; value >4 mm | min 4 mm | 8 |
| Distance through the insulation DTI | Minimum internal gap (internal clearance) | typ 0.014 mm | 8 |
| Comparative tracking index CTI | DIN EN 60112 (VDE 0303-11); IEC 60112; value >400 V | min 400 V | 8 |
| Maximum repetitive peak isolation voltage VIORM | DIN EN IEC 60747-17 (VDE 0884-17); AC voltage (bipolar) | max 566 VPK | 8 |
| Maximum transient isolation voltage VIOTM | VTEST = VIOTM; t = 60 s (qualification); t = 1 s (100% production) | max 4242 VPK | 8 |
| Apparent charge qpd | Method a: After I/O safety test subgroup 2/3, Vini = VIOTM, tini = 60 s; Vpd(m) = 1.2 × VIORM = 680 VPK, tm = 10 s; value <5 pC | max 5 pC | 8 |
| Apparent charge qpd | Method a: After environmental tests subgroup 1, Vini = VIOTM, tini = 60 s; Vpd(m) = 1.6 × VIORM = 906 VPK, tm = 10 s; value <5 pC | max 5 pC | 8 |
| Apparent charge qpd | Method b1: At routine test (100% production) and preconditioning (type test) Vini = VIOTM, tini = 1 s; Vpd(m) = 1.875 × VIORM = 1062 VPK, tm = 1 s; value <5 pC | max 5 pC | 8 |
| Barrier capacitance, input to output CIO | VIO = 0.4 sin (2πft), f = 1 MHz; approximately 1 pF | typ 1 pF | 8 |
| Withstand isolation voltage VISO | UL 1577; VTEST = VISO = 2500 VRMS, t = 60 s (qualification); VTEST = 1.2 × VISO = 3000 VRMS, t = 1 s (100% production) | max 2500 VRMS | 8 |
| Safety input, output, or supply current IS | RθJA = 114.6°C/W, VI = 5.5 V, TJ = 150°C, TA = 25°C; see Figure 6-1 | max 198 mA | 9 |
| Safety input, output, or supply current IS | RθJA = 114.6°C/W, VI = 3.6 V, TJ = 150°C, TA = 25°C; see Figure 6-1 | max 303 mA | 9 |
| Safety temperature TS | max 150 °C | 9 | |
| Voltage input threshold low, SDA1 and SCL1 VILT1 | Side 1; over recommended operating conditions | min 480 · typ 550 · max 660 mV | 10 |
| Voltage input threshold high, SDA1 and SCL1 VIHT1 | Side 1; over recommended operating conditions | min 520 · typ 610 · max 700 mV | 10 |
| Voltage input hysteresis VHYST1 | Side 1; VIHT1 –VILT1 | min 40 · typ 60 mV | 10 |
| Low-level output voltage, SDA1 and SCL1 VOL1 | 0.5 mA ≤ (ISDA1 and ISCL1) ≤ 3.5 mA | min 570 · max 800 mV | 10 |
| Low-level output voltage to high-level input voltage threshold difference, SDA1 and SCL1 ΔVOIT1 | 0.5 mA ≤ (ISDA1 and ISCL1) ≤ 3.5 mA | min 50 mV | 10 |
| Low-level output voltage, SDA2 and SCL2 VOL2 | 0.5 mA ≤ (ISDA2 and ISCL2) ≤ 35 mA | max 0.4 V | 10 |
| Input leakage currents, SDA1, SCL1, SDA2, and SCL2 |II| | VSDA1, VSCL1 = VCC1; VSDA2, VSCL2 = VCC2 | typ 0.01 · max 10 uA | 10 |
| Input capacitance to local ground, SDA1, SCL1, SDA2, and SCL2 CI | VI = 0.4 × sin(2E6πt) + 2.5 V | typ 7 pF | 10 |
| Common-mode transient immunity CMTI | See Figure 7-3 | min 25 · typ 50 kV/us | 10 |
| VCC undervoltage lockout threshold VCCUV | min 1.7 · typ 2.5 · max 2.9 V | 10 | |
| Supply current, side 1 ICC1 | ISO1540; 3 V ≤ VCC1, VCC2 ≤ 3.6 V; VSDA1, VSCL1 = GND1; VSDA2, VSCL2 = GND2; R1, R2 = Open; C1, C2 = Open | typ 2.4 · max 7.1 mA | 11 |
| Supply current, side 1 ICC1 | ISO1540; 3 V ≤ VCC1, VCC2 ≤ 3.6 V; VSDA1, VSCL1 = VCC1; VSDA2, VSCL2 = VCC2; R1, R2 = Open; C1, C2 = Open | typ 2.5 · max 4 mA | 11 |
| Supply current, side 2 ICC2 | ISO1540; 3 V ≤ VCC1, VCC2 ≤ 3.6 V; VSDA1, VSCL1 = GND1; VSDA2, VSCL2 = GND2; R1, R2 = Open; C1, C2 = Open | typ 1.7 · max 6.7 mA | 11 |
| Supply current, side 2 ICC2 | ISO1540; 3 V ≤ VCC1, VCC2 ≤ 3.6 V; VSDA1, VSCL1 = VCC1; VSDA2, VSCL2 = VCC2; R1, R2 = Open; C1, C2 = Open | typ 1.9 · max 3.5 mA | 11 |
| Supply current, side 1 ICC1 | ISO1540; 4.5 V ≤ VCC1, VCC2 ≤ 5.5 V; VSDA1, VSCL1 = GND1; VSDA2, VSCL2 = GND2; R1,R2 = Open; C1,C2 = Open | typ 3.1 · max 7.2 mA | 11 |
| Supply current, side 1 ICC1 | ISO1540; 4.5 V ≤ VCC1, VCC2 ≤ 5.5 V; VSDA1, VSCL1 = VCC1; VSDA2, VSCL2 = VCC2; R1, R2 = Open; C1, C2 = Open | typ 3.1 · max 4.7 mA | 11 |
| Supply current, side 2 ICC2 | ISO1540; 4.5 V ≤ VCC1, VCC2 ≤ 5.5 V; VSDA1, VSCL1 = GND1; VSDA2, VSCL2 = GND2; R1, R2 = Open; C1, C2 = Open | typ 2.3 · max 6.8 mA | 11 |
| Supply current, side 2 ICC2 | ISO1540; 4.5 V ≤ VCC1, VCC2 ≤ 5.5 V; VSDA1, VSCL1 = VCC1; VSDA2, VSCL2 = VCC2; R1, R2 = Open; C1, C2 = Open | typ 2.5 · max 4 mA | 11 |
| Time to recover from UVLO tUVLO | 2.7 V to 0.9 V; See Figure 7-4; middle column is NOM | min 30 · typ 50 · max 151 us | 11 |
| Output Signal Fall Time (SDA1, SCL1) tf1 | 3 V ≤ VCC1, VCC2 ≤ 3.6 V; See Figure 7-1; R1 = 953 Ω, C1 = 40 pF; 0.7 × VCC1 to 0.3 × VCC1 | min 8 · typ 17 · max 29 ns | 12 |
| Output Signal Fall Time (SDA1, SCL1) tf1 | 3 V ≤ VCC1, VCC2 ≤ 3.6 V; See Figure 7-1; R1 = 953 Ω, C1 = 40 pF; 0.9 × VCC1 to 900 mV | min 16 · typ 29 · max 48 ns | 12 |
| Output Signal Fall Time (SDA2, SCL2) tf2 | 3 V ≤ VCC1, VCC2 ≤ 3.6 V; See Figure 7-1; R2 = 95.3 Ω, C2 = 400 pF; 0.7 × VCC2 to 0.3 × VCC2 | min 14 · typ 23 · max 47 ns | 12 |
| Output Signal Fall Time (SDA2, SCL2) tf2 | 3 V ≤ VCC1, VCC2 ≤ 3.6 V; See Figure 7-1; R2 = 95.3 Ω, C2 = 400 pF; 0.9 × VCC2 to 400 mV | min 35 · typ 50 · max 100 ns | 12 |
| Low-to-High Propagation Delay, Side 1 to Side 2 tpLH1-2 | 3 V ≤ VCC1, VCC2 ≤ 3.6 V; See Figure 7-1; R1 = 953 Ω, R2 = 95.3 Ω, C1, C2 = 10 pF; 0.55 V to 0.7 × VCC2 | typ 33 · max 65 ns | 12 |
| High-to-Low Propagation Delay, Side 1 to Side 2 tPHL1-2 | 3 V ≤ VCC1, VCC2 ≤ 3.6 V; See Figure 7-1; R1 = 953 Ω, R2 = 95.3 Ω, C1, C2 = 10 pF; 0.7 V to 0.4 V | typ 90 · max 181 ns | 12 |
| Pulse Width Distortion |tpHL1-2 – tpLH1-2| PWD1-2 | 3 V ≤ VCC1, VCC2 ≤ 3.6 V; See Figure 7-1; R1 = 953 Ω, R2 = 95.3 Ω, C1, C2 = 10 pF | typ 55 · max 123 ns | 12 |
| Low-to-High Propagation Delay, Side 2 to Side 1 tPLH2-1 | ISO1540; 3 V ≤ VCC1, VCC2 ≤ 3.6 V; See Figure 7-1; R1 = 953 Ω, R2 = 95.3 Ω, C1, C2 = 10 pF; 0.4 × VCC2 to 0.7 × VCC1 | typ 47 · max 68 ns | 12 |
| High-to-Low Propagation Delay, Side 2 to Side 1 tPHL2-1 | ISO1540; 3 V ≤ VCC1, VCC2 ≤ 3.6 V; See Figure 7-1; R1 = 953 Ω, R2 = 95.3 Ω, C1, C2 = 10 pF; 0.4 × VCC2 to 0.9 V | typ 67 · max 109 ns | 12 |
| Pulse Width Distortion |tpHL2-1 – tpLH2-1| PWD2-1 | ISO1540; 3 V ≤ VCC1, VCC2 ≤ 3.6 V; See Figure 7-1; R1 = 953 Ω, R2 = 95.3 Ω, C1, C2 = 10 pF | typ 20 · max 49 ns | 12 |
| Round-trip propagation delay on Side 1 tLOOP1 | ISO1540; 3 V ≤ VCC1, VCC2 ≤ 3.6 V; See Figure 7-2; R1 = 953 Ω, C1 = 40 pF, R2 = 95.3 Ω, C2 = 400 pF; 0.4 V to 0.3 × VCC1 | typ 100 · max 165 ns | 12 |
| Output Signal Fall Time (SDA1, SCL1) tf1 | 4.5 V ≤ VCC1, VCC2 ≤ 5.5 V; See Figure 7-1; R1 = 1430 Ω, C1 = 40 pF; 0.7 × VCC1 to 0.3 × VCC1 | min 6 · typ 11 · max 22 ns | 12 |
| Output Signal Fall Time (SDA1, SCL1) tf1 | 4.5 V ≤ VCC1, VCC2 ≤ 5.5 V; See Figure 7-1; R1 = 1430 Ω, C1 = 40 pF; 0.9 × VCC1 to 900 mV | min 13 · typ 21 · max 48 ns | 12 |
| Output Signal Fall Time (SDA2, SCL2) tf2 | 4.5 V ≤ VCC1, VCC2 ≤ 5.5 V; See Figure 7-1; R2 = 143 Ω, C2 = 400 pF; 0.7 × VCC2 to 0.3 × VCC2 | min 10 · typ 18 · max 35 ns | 12 |
| Output Signal Fall Time (SDA2, SCL2) tf2 | 4.5 V ≤ VCC1, VCC2 ≤ 5.5 V; See Figure 7-1; R2 = 143 Ω, C2 = 400 pF; 0.9 × VCC2 to 400 mV | min 28 · typ 41 · max 76 ns | 12 |
| Low-to-High Propagation Delay, Side 1 to Side 2 tpLH1-2 | 4.5 V ≤ VCC1, VCC2 ≤ 5.5 V; See Figure 7-1; R1 = 1430 Ω, R2 = 143 Ω, C1,2 = 10 pF; 0.55 V to 0.7 × VCC2 | typ 31 · max 62 ns | 12 |
| High-to-Low Propagation Delay, Side 1 to Side 2 tPHL1-2 | 4.5 V ≤ VCC1, VCC2 ≤ 5.5 V; See Figure 7-1; R1 = 1430 Ω, R2 = 143 Ω, C1,2 = 10 pF; 0.7 V to 0.4 V | typ 70 · max 139 ns | 12 |
| Pulse Width Distortion |tpHL1-2 – tpLH1-2| PWD1-2 | 4.5 V ≤ VCC1, VCC2 ≤ 5.5 V; See Figure 7-1; R1 = 1430 Ω, R2 = 143 Ω, C1,2 = 10 pF | typ 38 · max 80 ns | 12 |
| Low-to-high propagation delay, side 2 to side 1 tPLH2-1 | ISO1540; 4.5 V ≤ VCC1, VCC2 ≤ 5.5 V; See Figure 7-1; R1 = 1430 Ω, R2 = 143 Ω, C1,2 = 10 pF; 0.4 × VCC2 to 0.7 × VCC1 | typ 55 · max 80 ns | 12 |
| High-to-low propagation delay, Side 2 to side 1 tPHL2-1 | ISO1540; 4.5 V ≤ VCC1, VCC2 ≤ 5.5 V; See Figure 7-1; R1 = 1430 Ω, R2 = 143 Ω, C1,2 = 10 pF; 0.4 × VCC2 to 0.9 V | typ 47 · max 85 ns | 12 |
| Pulse Width Distortion |tpHL2-1 – tpLH2-1| PWD2-1 | ISO1540; 4.5 V ≤ VCC1, VCC2 ≤ 5.5 V; See Figure 7-1; R1 = 1430 Ω, R2 = 143 Ω, C1,2 = 10 pF | typ 8 · max 34 ns | 12 |
| Round-trip propagation delay on side 1 tLOOP1 | ISO1540; 4.5 V ≤ VCC1, VCC2 ≤ 5.5 V; See Figure 7-2; R1 = 1430 Ω, C1 = 40 pF, R2 = 143 Ω, C2 = 400 pF; 0.4 V to 0.3 × VCC1 | typ 110 · max 180 ns | 12 |
Pins, by the datasheet
8- 1 VCC1
- Supply voltage, side 1. · p. 4
- 2 SDA1
- Serial data input / output, side 1. · p. 4
- 3 SCL1
- Serial clock input / output, side 1. · p. 4
- 4 GND1
- Ground, side 1. · p. 4
- 5 GND2
- Ground, side 2. · p. 4
- 6 SCL2
- Serial clock input / output, side 2. · p. 4
- 7 SDA2
- Serial data input / output, side 2. · p. 4
- 8 VCC2
- Supply voltage, side 2. · p. 4
Ordering codes, by the datasheet
4- ISO1540DR
- SOIC (D) | 8 · 2500 units, LARGE T&R; operating temperature -40 to 125 °C · p. 29
- ISO1540DR.A
- SOIC (D) | 8 · 2500 units, LARGE T&R; operating temperature -40 to 125 °C · p. 29
- ISO1540DRG4
- SOIC (D) | 8 · 2500 units, LARGE T&R; operating temperature -40 to 125 °C · p. 29
- ISO1540DRG4.A
- SOIC (D) | 8 · 2500 units, LARGE T&R; operating temperature -40 to 125 °C · p. 29
Parameters
24- CMTI(kV/us)
- 50kV/us
- Clock Direction
- Bidirectional
- Current - Supply
- 5.6mA
- Current - Supply(Max)
- 14mA
- Data Rate(Max)
- 1Mbps
- Features
- Bidirectional automatic direction
- Isolation Voltage(Vrms)
- 2500
- Junction Temperature(Max)
- 150℃
- Maximum I2C Clock
- 1MHz
- Number of Forward Channels
- 2
- Number of Reverse Channels
- 2
- Operating Temperature
- -40℃~+125℃
- Operating Voltage
- 3V~5.5V
- Output Current per Pin(Max)
- 20mA
- Peak Output Current(Sink)
- 35mA
- Propagation Delay(tpd)
- 65ns
- Rise Time
- 11ns
- Thermal Resistance(Junction to Ambient)
- 114.6℃/W
- Thermal Resistance(Junction to Board)
- 55.3℃/W
- Thermal Resistance(Junction to Case)
- 69.6℃/W
- Voltage - Supply
- 3V~5.5V
- Voltage - Supply(Absolute Max)
- 6V
- Voltage - Supply(VCCA)
- 3V~5.5V
- Voltage - Supply(VCCB)
- 3V~5.5V
Order codes
2- ISO1540DRLCSC C179739
- ISO1540DLCSC C2878172
Pinout
8| Pin | Name | Type |
|---|---|---|
| 1 | VCC1 | Power in |
| 2 | SDA1 | Input/output |
| 3 | SCL1 | Input/output |
| 4 | GND1 | Power in |
| 5 | GND2 | Power in |
| 6 | SCL2 | Input/output |
| 7 | SDA2 | Input/output |
| 8 | VCC2 | Power in |
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Is there a KiCad symbol and footprint for the ISO1540D?
Yes. The symbol is Isolator:ISO1540 and the footprint Package_SO:SOIC-8_3.9x4.9mm_P1.27mm, both drawn on this page. PCBKit places them on a board for you when you design with it.
What package is the ISO1540D?
SOIC-8, with 8 pins. Its footprint is drawn on this page.
Where is the ISO1540D datasheet?
Texas Instruments publishes it: the Datasheet link on this page opens it.
Where can I order the ISO1540D?
JLCPCB lists it as part C179739, with 36,383 in stock; the sellers' links on this page open their listings.
What can replace the ISO1540D?
Parts like it in the library: the ISO1640BD by Texas Instruments, the ADUM1250ARZ-RL7 by Analog Devices, the CA-IS3020S by Chipanalog and the CA-IS3021S by Chipanalog. Check their datasheets: a part that fits the footprint may still differ in its ratings.
Which open-source boards use the ISO1540D?
49 boards in 35 repositories on GitHub; the most starred are listed on this page, with their KiCad files.
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