DIR9001PW

Q: Is there a KiCad symbol and footprint for the DIR9001PW?

Yes. The symbol is EasyEDA_Cloud:DIR9001IPWQ1 and the footprint Package_SO:TSSOP-28_4.4x9.7mm_P0.65mm, both drawn on this page. PCBKit places them on a board for you when you design with it.

Q: What package is the DIR9001PW?

TSSOP-28, with 28 pins. Its footprint is drawn on this page.

Q: Where is the DIR9001PW datasheet?

Texas Instruments publishes it: the Datasheet link on this page opens it.

Q: Where can I order the DIR9001PW?

JLCPCB lists it as part C96215, with 736 in stock; the sellers' links on this page open their listings.

Q: What can replace the DIR9001PW?

Parts like it in the library: the DIT4096IPW by Texas Instruments, the PCM3060PW by Texas Instruments, the CS4272-CZZR by Cirrus Logic and the CS8416-CZZR by Cirrus Logic. Check their datasheets: a part that fits the footprint may still differ in its ratings.

Q: Which open-source boards use the DIR9001PW?

7 boards in 7 repositories on GitHub; the most starred are listed on this page, with their KiCad files.

Texas InstrumentsExtended

-40℃~+85℃ 2.7V~3.6V 28kHz~108kHz Built-in phase-locked loop I2S Transceiver TSSOP-28 Audio Interface ICs ROHS

Datasheet JLCPCB LCSC

Part id: ti/DIR9001PW
Category: Audio Interface ICs
Package: TSSOP-28
Pins: 28
In stock: 736 at JLCPCB (C96215)
Used on: 7 open-source boards

Overview

The DIR9001PW is an audio Interface IC made by Texas Instruments in a TSSOP-28 package with 28 pins. -40℃~+85℃ 2.7V~3.6V 28kHz~108kHz Built-in phase-locked loop I2S Transceiver TSSOP-28 Audio Interface ICs ROHS.

PCBKit's library has its KiCad symbol (EasyEDA_Cloud:DIR9001IPWQ1, from EasyEDA) and its footprint (Package_SO:TSSOP-28_4.4x9.7mm_P0.65mm, from KiCad's library), ready for a KiCad board. 736 are in stock at JLCPCB (part C96215). 7 open-source boards in 7 repositories on GitHub use it.

Symbol

EasyEDA_Cloud:DIR9001IPWQ1From EasyEDA

Footprint

Package_SO:TSSOP-28_4.4x9.7mm_P0.65mmFrom KiCad's library

From the datasheet

Supply, least: 2.7 V · VCC, recommended operating min · p. 6
Supply, most: 3.6 V · VCC, recommended operating max · p. 6
Supply, absolute maximum: 4 V · VCC, absolute max · p. 6
Works from: -40 °C · Operating free-air temperature min · p. 6
Works up to: 85 °C · Operating free-air temperature max · p. 6
Junction, hottest: 150 °C · Junction temperature absolute max · p. 6
Takes working: 12 mA · sum of ICC and IDD typical, 96 kHz, PLL locked, XTI grounded · p. 8
Takes working: 15 mA · sum of ICC and IDD typical, 96 kHz, PLL locked, 24.576-MHz resonator · p. 8
Takes at most: 20.7 mA · sum of ICC and IDD max, 96 kHz, PLL locked, 24.576-MHz resonator · p. 8
Takes asleep: 202 µA · sum of ICC and IDD typical, RXIN high or low, XTI low, reset asserted · p. 7
Junction to air (TSSOP (PW)): 81.9 K/W · Junction-to-ambient thermal resistance · p. 7
Junction to case (TSSOP (PW)): 22.5 K/W · Junction-to-case top thermal resistance · p. 7
Junction to board (TSSOP (PW)): 40 K/W · Junction-to-board thermal resistance · p. 7
Junction to air (28-pin T-SSOP): 105 K/W · Thermal resistance, electrical characteristics table · p. 8

What it is and has

Recovered system clock jitter: 50 ps · p. 1
Jitter tolerance: Compliant with IEC60958-3 · p. 1
Decode clock: No external clock required · p. 1
Function control: Parallel (hardware) · p. 1
Digital inputs: 5 V tolerant · p. 1
Package: 28-pin TSSOP, 0.65 mm pin pitch · p. 1
Sampling frequency range: 28 kHz to 108 kHz · p. 12
Audio sample word length: 24-bit maximum · p. 12
Input tolerance: 5-V tolerant TTL-level RXIN input · p. 12
PLL capture ratio: ±12.5%, IEC60958-3 level III · p. 12
Jitter tolerance: Complies with IEC60958-3 · p. 12

Around it

cap 10-µF: between VDD and DGND; Supply decoupling; place close to the device terminals. Typical application specifies electrolytic. · p. 29
cap 0.1-µF: between VDD and DGND; Supply decoupling; place close to the device terminals. Typical application specifies ceramic. · p. 29

Specifications

Parameter	Conditions	As printed	Page
Supply voltage VCC		min -0.3 · max 4 V	6
Supply voltage differences VCC to VDD		min -0.1 · max 0.1 V	6
Ground voltage differences AGND to DGND		min -0.1 · max 0.1 V	6
Digital input voltage	Digital input	min -0.3 · max 6.5 V	6
Digital input voltage	Digital output; maximum (VDD + 0.3) < 4 V	min -0.3 V	6
Analog input voltage	XTI, XTO; maximum (VCC + 0.3) < 4 V	min -0.3 V	6
Analog input voltage	FILT; maximum (VCC + 0.3) < 4 V	min -0.3 V	6
Input current (any pins except supplies)		min -10 · max 10 mA	6
Ambient temperature under bias		min -40 · max 125 °C	6
Junction temperature		max 150 °C	6
Lead temperature (soldering)		max 260 °C	6
Package temperature (reflow, peak)		max 260 °C	6
Storage temperature Tstg		min -55 · max 150 °C	6
Electrostatic discharge V(ESD)	Human body model (HBM), per ANSI/ESDA/JEDEC JS-001; rating ±500 V	max 500 V	6
Electrostatic discharge V(ESD)	Charged-device model (CDM), per JEDEC specification JESD22-C101; rating ±250 V	max 250 V	6
Analog supply voltage VCC		min 2.7 · typ 3.3 · max 3.6 VDC	6
Digital supply voltage VDD		min 2.7 · typ 3.3 · max 3.6 VDC	6
Digital input clock frequency	XTI is connected to clock source	typ 24.576 MHz	6
Digital output load capacitance, except SCKO		max 20 pF	6
Digital output load capacitance (SCKO)		max 10 pF	6
Operating free-air temperature TA		min -40 · max 85 °C	6
Junction-to-ambient thermal resistance RθJA	TSSOP (PW), 28 pins	typ 81.9 °C/W	7
Junction-to-case (top) thermal resistance RθJC(top)	TSSOP (PW), 28 pins	typ 22.5 °C/W	7
Junction-to-board thermal resistance RθJB	TSSOP (PW), 28 pins	typ 40 °C/W	7
Junction-to-top characterization parameter ψJT	TSSOP (PW), 28 pins	typ 0.7 °C/W	7
Junction-to-board characterization parameter ψJB	TSSOP (PW), 28 pins	typ 39.4 °C/W	7
Input logic level (2) VIH	5-V tolerant TTL inputs: RXIN, FMT0, FMT1, PSCK0, PSCK1, CKSEL, RST, RSV	min 2 · max 5.5 VDC	7
Input logic level (2) VIL	5-V tolerant TTL inputs: RXIN, FMT0, FMT1, PSCK0, PSCK1, CKSEL, RST, RSV	max 0.8 VDC	7
Input leakage current (4) IIH	VIN = VDD; internal pulldowns: FMT0, FMT1, PSCK0, PSCK1, CKSEL, RSV	typ 65 · max 100 uA	7
Input leakage current (4) IIL	VIN = 0 V; internal pulldowns: FMT0, FMT1, PSCK0, PSCK1, CKSEL, RSV	min -10 · max 10 uA	7
Input leakage current (5) IIH	VIN = VDD; internal pullup: RST	min -10 · max 10 uA	7
Input leakage current (5) IIL	VIN = 0 V; internal pullup: RST	min -100 · typ -65 uA	7
Input leakage current (6) IIH	VIN = VDD; no internal pullup and pulldown: RXIN, XTI	min -10 · max 10 uA	7
Input leakage current (6) IIL	VIN = 0 V; no internal pullup and pulldown: RXIN, XTI	min -10 · max 10 uA	7
Serial audio data width		min 16 · max 24 Bit	7
SCKO jitter	fS = 48 kHz, SCKO = 256 fS, measured periodic	typ 50 · max 100 ps rms	7
Frequency accuracy	XTI is connected to clock source	min -100 · max 100 ppm	7
Operation voltage range VCC		min 2.7 · typ 3.3 · max 3.6 VDC	7
Operation voltage range VDD		min 2.7 · typ 3.3 · max 3.6 VDC	7
Supply current (7) ICC	fS = 96 kHz, PLL locked, XTI connected to DGND; no output load	typ 6 · max 8.3 mA	7
Supply current (7) ICC	fS = 96 kHz, PLL locked, XTI connected to 24.576-MHz resonator; no output load	typ 6 · max 8.3 mA	7
Supply current (7) ICC	RXIN = H or L, XTI = L, RST = L; no output load	typ 130 uA	7
Supply current (7) IDD	fS = 96 kHz, PLL locked, XTI connected to 24.576-MHz resonator; no output load	typ 9 · max 12.4 mA	8
Supply current (7) IDD	RXIN = H or L, XTI = L, RST = L; no output load	typ 72 uA	8
Power dissipation (7) PD	fS = 96 kHz, PLL locked, XTI connected to DGND; no output load	typ 40 · max 55 mW	8
Power dissipation (7) PD	fS = 96 kHz, PLL locked, XTI connected to 24.576-MHz resonator; no output load	typ 50 · max 68 mW	8
Power dissipation (7) PD	RXIN = H or L, XTI = L, RST = L; no output load	typ 0.67 mW	8
Operation temperature range TA		min -40 · max 85 °C	8
Thermal resistance θJA	28-pin T-SSOP	typ 105 °C/W	8
Input sampling frequency range		min 28 · max 108 kHz	8
XTI source clock frequency	XTI is connected to clock source	typ 24.576 MHz	8
XTI input-clock duty cycle	XTI is connected to clock source	min 45 · max 55 %	8
CLKST pulse duration, high tCLKST		min 4 · max 20 us	8
System clock pulse cycle time tSCY		min 18 ns	8
Delay time of SCK rising edge to BCK rising edge tSCBC		min 4 · typ 8 · max 15 ns	8
Delay time of BCKO falling edge to LRCKO valid tCKLR	See Figure 16	min -5 · typ 0.5 · max 0.5 ns	8
BCKO pulse duration, HIGH tBCH	See Figure 16	min 60 ns	8
BCKO pulse duration, LOW tBCL	See Figure 16	min 60 ns	8
Delay time of BCKO falling edge to DOUT valid tBCDO	See Figure 16	min -5 · typ 1 · max 5 ns	8
Rising time of all signals tr		max 10 ns	8
Falling time of all signals tf		max 10 ns	8
PLL lock-up time	From biphase signal detection to error-out release (ERROR = L)	max 100 ms	9
SCKO frequency	128 fS	min 3.584 · max 13.824 MHz	9
SCKO frequency	256 fS	min 7.168 · max 27.648 MHz	9
SCKO frequency	384 fS	min 10.752 · max 41.472 MHz	9
SCKO frequency	512 fS	min 14.336 · max 55.296 MHz	9
BCKO frequency	64 fS	min 1.792 · max 6.912 MHz	9
LRCKO frequency	fS	min 28 · max 108 kHz	9
SCKO duty cycle		min 45 · max 55 %	9

Pins, by the datasheet

1 AUDIO: Channel-status indication of non-audio sample word, active-low. · p. 5
2 FSOUT0: Actual sampling frequency calculated result output 0. · p. 5
3 FSOUT1: Actual sampling frequency calculated result output 1. · p. 5
4 SCKO: System clock output. · p. 5
5 VDD: Digital power supply, 3.3-V. · p. 5
6 DGND: Digital ground. · p. 5
7 XTO: Oscillation amplifier output. · p. 5
8 XTI: Oscillation amplifier input or external XTI source clock input; CMOS Schmitt-trigger. · p. 5
9 CLKST: Clock change/transition signal output. · p. 5
10 LRCKO: Audio data latch enable output. · p. 5
11 BCKO: Audio data bit clock output. · p. 5
12 DOUT: 16-bit/24-bit decoded serial digital audio data output. · p. 5
13 PSCK0: PLL source SCKO output frequency selection 0; internal pulldown, 5-V tolerant TTL. · p. 5
14 PSCK1: PLL source SCKO output frequency selection 1; internal pulldown, 5-V tolerant TTL. · p. 5
15 COUT: Channel-status data serial output synchronized with LRCKO. · p. 5
16 UOUT: User data serial output synchronized with LRCKO. · p. 5
17 EMPH: Channel-status indication of pre-emphasis (50 us/15 us). · p. 5
18 BFRAME: Indication of top block of biphase input signal. · p. 5
19 RSV: Reserved; must be connected to DGND; internal pulldown. · p. 5
20 RXIN: Biphase digital data input; 5-V tolerant TTL Schmitt-trigger. · p. 5
21 RST: Reset control input, active-low; internal pullup, 5-V tolerant TTL. · p. 5
22 FILT: External filter connection terminal; must connect recommended filter. · p. 5
23 AGND: Analog ground. · p. 5
24 VCC: Analog power supply, 3.3-V. · p. 5
25 FMT0: Decoded serial digital audio data output format selection 0; internal pulldown, 5-V tolerant TTL. · p. 5
26 FMT1: Decoded serial digital audio data output format selection 1; internal pulldown, 5-V tolerant TTL. · p. 5
27 ERROR: Indication of internal PLL or data parity error. · p. 5
28 CKSEL: System clock source selection: low selects PLL (VCO), high selects XTI; internal pulldown, 5-V tolerant TTL. · p. 5

Ordering codes, by the datasheet

DIR9001PW: TSSOP · 28 pins, PW package drawing, package quantity 50; operating temperature -40 to 85 °C · p. 32
DIR9001PWR: TSSOP · 28 pins, PW package drawing, package quantity 2000; operating temperature -40 to 85 °C · p. 32

Parameters

Current - Supply: 12mA
Current - Supply(Max): 20.7mA
Features: Built-in phase-locked loop
Interface: I2S
Junction Temperature(Max): 150℃
Operating Temperature: -40℃~+85℃
Sampling Rate: 28kHz~108kHz
Standby Current: 202uA
Thermal Resistance(Junction to Board): 40℃/W
Thermal Resistance(Junction to Case): 22.5℃/W
Type: Transceiver
Voltage - Supply: 2.7V~3.6V
Voltage - Supply(Absolute Max): 4V

Order codes

DIR9001PWLCSC C1519991
DIR9001PWRLCSC C96215

Pinout

The pins of the DIR9001PW
Pin	Name	Type
1	AUDIO#	Unspecified
2	FSOUT0	Unspecified
3	FSOUT1	Unspecified
4	SCKO	Unspecified
5	VDD	Unspecified
6	DGND	Unspecified
7	XTO	Unspecified
8	XTI	Unspecified
9	CLKST	Unspecified
10	LRCKO	Unspecified
11	BCKO	Unspecified
12	DOUT	Unspecified
13	PSCK0	Unspecified
14	PSCK1	Unspecified
15	COUT	Unspecified
16	UOUT	Unspecified
17	EMPH	Unspecified
18	BFRAME	Unspecified
19	RSV	Unspecified
20	RXIN	Unspecified
21	RST#	Unspecified
22	FILT	Unspecified
23	AGND	Unspecified
24	VCC	Unspecified
25	FMT0	Unspecified
26	FMT1	Unspecified
27	ERROR	Unspecified
28	CKSEL	Unspecified

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Parts like it

Questions

Is there a KiCad symbol and footprint for the DIR9001PW?

Yes. The symbol is EasyEDA_Cloud:DIR9001IPWQ1 and the footprint Package_SO:TSSOP-28_4.4x9.7mm_P0.65mm, both drawn on this page. PCBKit places them on a board for you when you design with it.

What package is the DIR9001PW?

TSSOP-28, with 28 pins. Its footprint is drawn on this page.

Where is the DIR9001PW datasheet?

Texas Instruments publishes it: the Datasheet link on this page opens it.

Where can I order the DIR9001PW?

JLCPCB lists it as part C96215, with 736 in stock; the sellers' links on this page open their listings.

What can replace the DIR9001PW?

Parts like it in the library: the DIT4096IPW by Texas Instruments, the PCM3060PW by Texas Instruments, the CS4272-CZZR by Cirrus Logic and the CS8416-CZZR by Cirrus Logic. Check their datasheets: a part that fits the footprint may still differ in its ratings.

Which open-source boards use the DIR9001PW?

7 boards in 7 repositories on GitHub; the most starred are listed on this page, with their KiCad files.

DIR9001PW

Overview

Symbol

Footprint

From the datasheet

What it is and has

Around it

Specifications

Pins, by the datasheet

Ordering codes, by the datasheet

Open-source boards using it

MIxer SPDIF V1.0

Dac

Preamp

Most listener

Aes dac

Tas5805m

GPIO CTRL

Parts like it

DIT4096IPW

PCM3060PW

CS4272-CZZR

CS8416-CZZR

CS4272K-CZZR

TDA7718N

DIR9001IPWQ1

TDA7719