STUSB4500Q

Q: Is there a KiCad symbol and footprint for the STUSB4500Q?

Yes. The symbol is Interface_USB:STUSB4500QTR and the footprint Package_DFN_QFN:QFN-24-1EP_4x4mm_P0.5mm_EP2.7x2.7mm, both drawn on this page. PCBKit places them on a board for you when you design with it.

Q: What package is the STUSB4500Q?

QFN-24-EP(4x4), with 25 pins. Its footprint is drawn on this page.

Q: Where is the STUSB4500Q datasheet?

STMicroelectronics publishes it: the Datasheet link on this page opens it.

Q: Where can I order the STUSB4500Q?

JLCPCB lists it as part C2678061, with 4,052 in stock; the sellers' links on this page open their listings.

Q: What can replace the STUSB4500Q?

Parts like it in the library: the CP2105-F01-GMR by Silicon Labs, the CH342F by WCH (Nanjing Qinheng Microelectronics), the AP33771DKZ by Diodes Incorporated and the CP2105-F01-GM by Silicon Labs. Check their datasheets: a part that fits the footprint may still differ in its ratings.

Q: Which open-source boards use the STUSB4500Q?

14 boards in 11 repositories on GitHub; the most starred are listed on this page, with their KiCad files.

STMicroelectronics

-40℃~+105℃ 160uA 3V、5.5V Controller PD 3.0、PD 2.0 QFN-24-EP(4x4) USB Converters ROHS

Extended

Datasheetst/STUSB4500Q

Category: USB Converters
Package: QFN-24-EP(4x4)
Pins: 25

Overview

The STUSB4500Q is a USB Converter made by STMicroelectronics in a QFN-24-EP(4x4) package with 25 pins. -40℃~+105℃ 160uA 3V、5.5V Controller PD 3.0、PD 2.0 QFN-24-EP(4x4) USB Converters ROHS.

PCBKit's library has its KiCad symbol (Interface_USB:STUSB4500QTR, from KiCad's library) and its footprint (Package_DFN_QFN:QFN-24-1EP_4x4mm_P0.5mm_EP2.7x2.7mm, from KiCad's library), ready for a KiCad board. 4,052 are in stock at JLCPCB (part C2678061). 14 open-source boards in 11 repositories on GitHub use it.

Symbol

Interface_USB:STUSB4500QTRFrom KiCad's library

Footprint

Package_DFN_QFN:QFN-24-1EP_4x4mm_P0.5mm_EP2.7x2.7mmFrom KiCad's library

From the datasheet

Supply, least: 4.1 V · VDD, recommended operating min · p. 28
Supply, most: 22 V · VDD, recommended operating max · p. 28
Supply, least: 3 V · VSYS, recommended operating min · p. 28
Supply, most: 5.5 V · VSYS, recommended operating max · p. 28
Supply, absolute maximum: 28 V · VDD, absolute max · p. 27
Supply, absolute maximum: 6 V · VSYS, absolute max · p. 27
Works from: -40 °C · TA, operating ambient min · p. 28
Works up to: 105 °C · TA, operating ambient max · p. 28
Junction, hottest: 145 °C · TJ, absolute max · p. 27
Takes asleep: 140 µA · VSYS at 3.3 V, disconnected sink idle typical · p. 29
Takes asleep: 160 µA · VDD at 5.0 V, disconnected sink idle typical · p. 29

What it is and has

Controller: Auto-run Type-C and USB PD sink controller · p. 1
Dead battery mode: Supported · p. 1
Sink PDO profiles: Up to 3 configurable · p. 1
Charging paths: Dual high power charging path support · p. 1
Gate drivers: Integrated VBUS PMOS switch gate drivers · p. 1
VBUS monitoring: Integrated voltage monitoring · p. 1
VBUS discharge: Internal and/or external paths · p. 1
Protection: CC short-to-VBUS protection up to 22 V · p. 1
VBUS voltage capability: 28 V · p. 1
Debug accessory mode: Supported · p. 1
Certification: USB Type-C rev 1.2 · p. 1
Certification: USB PD rev 2.0, TID #1000133 · p. 1
Interoperability: USB PD rev 3.0 · p. 1
I²C interface: Slave, up to 400 kHz · p. 18
Sink PDO profiles: Up to 3 configurable profiles · p. 1
VBUS switch gate drivers: Integrated PMOS gate drivers · p. 1
VBUS voltage monitoring: Integrated · p. 1
CC protection: Short-to-VBUS protection, 22 V · p. 1
Power supplies: VSYS and/or VDD · p. 1

Around it

cap 1 µF typ.: between VREG_1V2 and GND; External regulator decoupling; 0.5 uF minimum, 10 uF maximum. · p. 9

Specifications

Parameter	Conditions	As printed	Page
SCL clock frequency Fscl	VDD = 5 V	min 0 · max 400 kHz	18
Hold time (repeated) START condition thd,sta	VDD = 5 V	min 0.6 us	18
LOW period of the SCL clock tlow	VDD = 5 V	min 1.3 us	18
HIGH period of the SCL clock thigh	VDD = 5 V	min 0.6 us	18
Setup time for repeated START condition tsu,dat	VDD = 5 V	min 0.6 us	18
Data hold time thd,dat	VDD = 5 V	min 0.04 · max 0.9 us	18
Data setup time tsu,dat	VDD = 5 V	min 100 ns	18
Rise time of both SDA and SCL signals tr	VDD = 5 V; minimum = 20 + 0.1 Cb ns	max 300 ns	18
Fall time of both SDA and SCL signals tf	VDD = 5 V; minimum = 20 + 0.1 Cb ns	max 300 ns	18
Set-up time for STOP condition tsu,sto	VDD = 5 V	min 0.6 us	18
Bus free time between a STOP and START condition tbuf	VDD = 5 V	min 1.3 us	18
Capacitive load for each bus line Cb	VDD = 5 V	max 400 pF	18
Supply voltage on VDD pin VDD	Referenced to GND	max 28 V	27
Supply voltage on VSYS pin VSYS	Referenced to GND	max 6 V	27
High voltage on CC pins VCC1, VCC2, VCC1DB, VCC2DB	Referenced to GND	max 22 V	27
High voltage on VBUS pins VVBUS_EN_SNK, VVBUS_VS_DISCH, VDISCH, VPOWER_OK2	Referenced to GND	max 28 V	27
Operating voltage on I/O pins VSCL, VSDA, VALERT, VRESET, VATTACH, VA_B_SIDE, VPOWER_OK3, VGPIO, VADDR0, VADDR1	Referenced to GND	min -0.3 · max 6 V	27
Storage temperature TSTG		min -55 · max 150 °C	27
Maximum junction temperature TJ		max 145 °C	27
ESD ESD	HBM	max 3 kV	27
ESD ESD	CDM	max 1.5 kV	27
Supply voltage on VDD pin VDD		min 4.1 · max 22 V	28
Supply voltage on VSYS pin VSYS		min 3 · max 5.5 V	28
CC pins VCC1, VCC2, VCC1DB, VCC2DB		min 0 · max 5.5 V	28
High voltage pins VVBUS_EN_SNK, VVBUS_VS_DISCH, VDISCH, VPOWER_OK2		min 0 · max 22 V	28
Operating voltage on I/O pins VSCL, VSDA, VALERT, VRESET, VATTACH, VA_B_SIDE, VPOWER_OK3, VGPIO, VADDR0, VADDR1		min 0 · max 4.5 V	28
Operating temperature TA		min -40 · max 105 °C	28
Current consumption IDD (SNK)	Device idle as a SINK (not connected, no communication); VSYS @ 3.3 V; TA = 25 °C	min 115 · typ 140 · max 165 uA	29
Current consumption IDD (SNK)	Device idle as a SINK (not connected, no communication); VDD @ 5.0 V; TA = 25 °C	min 110 · typ 160 · max 210 uA	29
I2C registers loading time from NVM TLOAD	At power-up or after a reset; VDD = 5 V, TA = 25 °C	max 30 ms	29
CC pull-down resistors Rd	-40 °C < TA < +105 °C; minimum tolerance -10%, maximum tolerance +10%	typ 5.1 kΩ	29
CC input impedance RINCC	Terminations off; VDD = 5 V, TA = 25 °C	min 200 kΩ	29
Detection threshold 1 VTH0.2	Min. IP-USB detection by sink on Rd, min CC voltage for connected sink; VDD = 5 V, TA = 25 °C	min 0.15 · typ 0.2 · max 0.25 V	29
Detection threshold 2 VTH0.66	Min. I P_1.5 detection by sink on Rd; VDD = 5 V, TA = 25 °C	min 0.61 · typ 0.66 · max 0.71 V	29
Detection threshold 3 VTH1.23	Min. I P_3.0 detection by sink on Rd; VDD = 5 V, TA = 25 °C	min 1.16 · typ 1.23 · max 1.31 V	29
Detection threshold 4 VTH2.6	Max. CC voltage for connected sink; VDD = 5 V, TA = 25 °C	min 2.45 · typ 2.6 · max 2.75 V	29
Overvoltage protection on CC pins VOVP	VDD = 5 V, TA = 25 °C	min 5.82 · typ 6 · max 6.18 V	29
VBUS disconnection threshold (5 V USB Type-C or PDO1 selected) VTHUSB	VSYS = 3.0 to 5.5 V; VDD = 5 V, TA = 25 °C	min 3.2 · typ 3.3 · max 3.4 V	29
VBUS safe 0 V threshold (vSafe0V) VTH0V	VSYS = 3.0 to 5.5 V; VDD = 5 V, TA = 25 °C	min 0.5 · typ 0.6 · max 0.7 V	29
VBUS discharge current IDISUSB	Through external resistor connected to VBUS_VS_DISCH pin; VDD = 5 V, TA = 25 °C	max 50 mA	29
Power system discharge current IDISPWR	Through external resistor connected to DISCH pin; VDD = 5 V, TA = 25 °C	max 500 mA	30
High level input voltage VIH	Digital input/output: SCL, SDA, ALERT, RESET, ATTACH, A_B_SIDE, POWER_OK3, GPIO, ADDR0, ADDR1; VDD = 5 V, TA = 25 °C	min 1.2 V	30
Low level input voltage VIL	Digital input/output: SCL, SDA, ALERT, RESET, ATTACH, A_B_SIDE, POWER_OK3, GPIO, ADDR0, ADDR1; VDD = 5 V, TA = 25 °C	max 0.35 V	30
Low level output voltage VOL	Digital input/output: SCL, SDA, ALERT, RESET, ATTACH, A_B_SIDE, POWER_OK3, GPIO, ADDR0, ADDR1; Ioh = 3 mA; VDD = 5 V, TA = 25 °C	max 0.4 V	30
Low level output voltage VOL	20 V open drain outputs: VBUS_EN_SNK, DISCH, POWER_OK2; Ioh = 3 mA; VDD = 5 V, TA = 25 °C	max 0.4 V	30
Junction-to-ambient thermal resistance RθJA	Package not specified in the table	typ 37 °C/W	35
Junction-to-case thermal resistance RθJC	Package not specified in the table	typ 5 °C/W	35
Supply voltage on VDD pin VDD	All voltages referenced to GND	max 28 V	27
Supply voltage on VSYS pin VSYS	All voltages referenced to GND	max 6 V	27
High voltage on CC pins VCC1, VCC2, VCC1DB, VCC2DB	All voltages referenced to GND	max 22 V	27
High voltage on VBUS pins VVBUS_EN_SNK, VVBUS_VS_DISCH, VDISCH, VPOWER_OK2	All voltages referenced to GND	max 28 V	27
Operating voltage on I/O pins VSCL, VSDA, VALERT, VRESET, VATTACH, VA_B_SIDE, VPOWER_OK3, VGPIO, VADDR0, VADDR1	All voltages referenced to GND	min -0.3 · max 6 V	27
Current consumption IDD (SNK)	Device idle as a SINK (not connected, no communication), VSYS @ 3.3 V; TA = 25 °C	min 115 · typ 140 · max 165 uA	29
Current consumption IDD (SNK)	Device idle as a SINK (not connected, no communication), VDD @ 5.0 V; TA = 25 °C	min 110 · typ 160 · max 210 uA	29
CC pull-down resistors Rd	-40 °C < TA < +105 °C; minimum and maximum are printed as -10% and +10% relative tolerances	typ 5.1 kΩ	29
VBUS disconnection threshold (5 V USB Type-C or PDO1 selected) VTHUSB	VSYS = 3.0 to 5.5 V; TA = 25 °C	min 3.2 · typ 3.3 · max 3.4 V	29
VBUS safe 0 V threshold (vSafe0V) VTH0V	VSYS = 3.0 to 5.5 V; TA = 25 °C	min 0.5 · typ 0.6 · max 0.7 V	29
High level input voltage VIH	Digital input/output (SCL, SDA, ALERT, RESET, ATTACH, A_B_SIDE, POWER_OK3, GPIO, ADDR0, ADDR1); VDD = 5 V, TA = 25 °C	min 1.2 V	30
Low level input voltage VIL	Digital input/output (SCL, SDA, ALERT, RESET, ATTACH, A_B_SIDE, POWER_OK3, GPIO, ADDR0, ADDR1); VDD = 5 V, TA = 25 °C	max 0.35 V	30
Low level output voltage VOL	Digital input/output (SCL, SDA, ALERT, RESET, ATTACH, A_B_SIDE, POWER_OK3, GPIO, ADDR0, ADDR1); Ioh = 3 mA; VDD = 5 V, TA = 25 °C	max 0.4 V	30
Low level output voltage VOL	20 V open drain outputs (VBUS_EN_SNK, DISCH, POWER_OK2); Ioh = 3 mA; VDD = 5 V, TA = 25 °C	max 0.4 V	30
Junction-to-ambient thermal resistance RθJA	Package not specified in the provided thermal table	typ 37 °C/W	35
Junction-to-case thermal resistance RθJC	Package not specified in the provided thermal table	typ 5 °C/W	35

Pins, by the datasheet

1 CC1DB: Dead battery enable on CC1; connect to CC1 if used, otherwise ground. · p. 4
2 CC1: Type-C configuration channel 1; connect to receptacle A5. · p. 4
3 NC: Leave floating. · p. 4
4 CC2: Type-C configuration channel 2; connect to receptacle B5. · p. 4
5 CC2DB: Dead battery enable on CC2; connect to CC2 if used, otherwise ground. · p. 4
6 RESET: Active high reset input from system. · p. 4
7 SCL: I2C clock input; connect to master with external pull-up. · p. 4
8 SDA: I2C data input/output, active low open drain; requires external pull-up. · p. 4
9 DISCH: Analog input for internal discharge or active low open drain output enabling an external discharge path. · p. 4
10 GND: Ground. · p. 4
11 ATTACH: Active low attachment detection output; connect to MCU if present with external pull-up. · p. 4
12 ADDR0: I²C address selection; connect to ground or external pull-up, and ground if no MCU connection. · p. 4
13 ADDR1: I²C address selection; connect to ground or external pull-up, and ground if no MCU connection. · p. 4
14 POWER_OK3: Active low power contract flag; connect to power system with external pull-up. · p. 4
15 GPIO: Active low general purpose output; requires external pull-up. · p. 4
16 VBUS_EN_SNK: Active low VBUS sink power path enable; connect to power switch or power system with external pull-up. · p. 4
17 A_B_SIDE: Active low cable orientation output for USB super speed MUX selection; requires external pull-up. · p. 4
18 VBUS_VS_DISCH: VBUS voltage monitoring and discharge path from receptacle-side VBUS. · p. 4
19 ALERT: Active low I2C interrupt; connect to master with external pull-up. · p. 4
20 POWER_OK2: High voltage active low power contract flag; connect to power switch or power system with external pull-up. · p. 4
21 VREG_1V2: 1.2 V internal regulator output for external decoupling with a typical 1 uF capacitor. · p. 4
22 VSYS: Power supply from system; connect to ground if unused. · p. 4
23 VREG_2V7: 2.7 V internal regulator output for external decoupling with a typical 1 uF capacitor. · p. 4
24 VDD: Power supply from USB power line, connected to receptacle-side VBUS. · p. 4
EP EP: Exposed pad; connect to ground. · p. 4

Ordering codes, by the datasheet

STUSB4500QTR: QFN-24 EP (4x4) · QFN package · p. 1

Parameters

Applications Function: Controller
Current - Supply: 160uA
Junction Temperature(Max): 145℃
Operating Temperature: -40℃~+105℃
Standby Current: 140uA
USB Protocol: PD 3.0
Voltage - Supply: 3V~22V
Voltage - Supply(Absolute Max): 28V

Order codes

STUSB4500QTRLCSC C2678061

Pinout

The pins of the STUSB4500Q
Pin	Name	Type
1	CC1DB	Input/output
2	CC1	Input/output
3	NC	Not connected
4	CC2	Input/output
5	CC2DB	Input/output
6	RESET	Input
7	SCL	Input
8	SDA	Input/output
9	DISCH	Input/output
10	GND	Power in
11	ATTACH	Open collector
12	ADDR0	Input
13	ADDR1	Input
14	POWER_OK3	Open collector
15	GPIO	Open collector
16	VBUS_EN_SNK	Open collector
17	A_B_SIDE	Open collector
18	VBUS_VS_DISCH	Input
19	ALERT	Open collector
20	POWER_OK2	Open collector
21	VREG_1V2	Power out
22	VSYS	Power in
23	VREG_2V7	Power out
24	VDD	Power in
25	GND	Passive

Open-source boards using it

All 14

4 layers96 × 100 mm
OtterCastAmp
Ottercast/OtterCastAmp
OtterCastAmp is an open-source WiFi Speaker amplifier, based on a Sochip S3 SoC. Powered by any USB PD adapter for up to 100W of music.
272 parts341MIT
2 layers12 × 21 mm
Fpx
oxplot/fpx
easy USB-C power for all your devices
36 parts336BSD-3-Clause
2 layers35.6 × 33 mm
Imported Sparkfun
Andr-Zero/PXU-C-PIM
USB C PD Input Module for PXU
101 parts11
4 layers41.6 × 32.6 mm
Led driver
Jana-Marie/LAEMP-Spoet
The LÄMP-Spöt, a snack for moths
112 parts8CERN-OHL-S-2.0
2 layers49 × 34 mm
OPS
Jana-Marie/OPS
OPS - The Otter Power Supply
99 parts3
2 layers74.5 × 95.8 mm
Camera flash
Jana-Marie/Zoetrope-Flash
Zoetrope-Flash is a flash built for machine vision. It is based on the LED pcb of Enlightened Otter.
95 parts2
4 layers85 × 59 mm
ESPHome Parking Assistant
mikelawrence/ESPHome-Parking-Assistant
Use a TFMini LiDAR module and a RGB light strip so you can park your car in the same spot everytime!
114 partsCERN-OHL-P-2.0
6 layers138 × 50 mm
Ovc3
osrf/ovc
the Open Vision Computer
149 parts207Apache-2.0

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Questions

Is there a KiCad symbol and footprint for the STUSB4500Q?

Yes. The symbol is Interface_USB:STUSB4500QTR and the footprint Package_DFN_QFN:QFN-24-1EP_4x4mm_P0.5mm_EP2.7x2.7mm, both drawn on this page. PCBKit places them on a board for you when you design with it.

What package is the STUSB4500Q?

QFN-24-EP(4x4), with 25 pins. Its footprint is drawn on this page.

Where is the STUSB4500Q datasheet?

STMicroelectronics publishes it: the Datasheet link on this page opens it.

Where can I order the STUSB4500Q?

JLCPCB lists it as part C2678061, with 4,052 in stock; the sellers' links on this page open their listings.

What can replace the STUSB4500Q?

Parts like it in the library: the CP2105-F01-GMR by Silicon Labs, the CH342F by WCH (Nanjing Qinheng Microelectronics), the AP33771DKZ by Diodes Incorporated and the CP2105-F01-GM by Silicon Labs. Check their datasheets: a part that fits the footprint may still differ in its ratings.

Which open-source boards use the STUSB4500Q?

14 boards in 11 repositories on GitHub; the most starred are listed on this page, with their KiCad files.