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TLS115D0EJ on a board, in 3D

TLS115D0EJ

Infineon Technologies

-40℃~+150℃@(Tj) 1 150mA 2V~14V 45V 500mV@(150mA) 85dB@(100Hz) 90uA Adjustable Over Current Protection、Short Circuit Protection、Thermal shutdown、Enable control、Operating status indication、Reverse polarity voltage protection、Built-in soft-start Positive DSO-8 Voltage Regulators - Linear, Low Drop Out (LDO) Regulators ROHS

Extended
DatasheetJLCPCBLCSCinfineon/TLS115D0EJ
Category
Voltage Regulators Linear, Low Drop Out (LDO) Regulators
Package
DSO-8
Pins
9

Overview

The TLS115D0EJ is a voltage Regulators Linear, Low Drop Out (LDO) Regulator made by Infineon Technologies in a DSO-8 package with 9 pins. -40℃~+150℃@(Tj) 1 150mA 2V~14V 45V 500mV@(150mA) 85dB@(100Hz) 90uA Adjustable Over Current Protection、Short Circuit Protection、Thermal shutdown、Enable control、Operating status indication、Reverse polarity voltage protection、Built-in soft-start Positive DSO-8 Voltage Regulators - Linear, Low Drop Out (LDO) Regulators ROHS.

PCBKit's library has its KiCad symbol (EasyEDA_Cloud:TLS115D0EJXUMA1, from EasyEDA) and its footprint (EasyEDA_Cloud:ESOP-8_L4.9-W3.9-P1.27-LS6.0-BL-EP, from EasyEDA), ready for a KiCad board. 4,677 are in stock at JLCPCB (part C3747428). 2 open-source boards in 2 repositories on GitHub use it.

Symbol

EP9IN8EN7N.C.6ADJ5PG4GND3N.C.2OUT1
EasyEDA_Cloud:TLS115D0EJXUMA1From EasyEDA

Footprint

123456789
EasyEDA_Cloud:ESOP-8_L4.9-W3.9-P1.27-LS6.0-BL-EPFrom EasyEDA

From the datasheet

15
Supply, least
4 V · IN, functional range minimum · p. 8
Supply, most
45 V · IN, functional range maximum · p. 8
Supply, absolute maximum
45 V · IN, absolute maximum · p. 7
Junction, hottest
150 °C · Junction temperature maximum · p. 7
Takes working
55 µA · IN, typical quiescent current, IOUT ≤ 0.1 mA, VADJ = 5 V, Tj ≤ 125 °C · p. 16
Takes working
7 mA · IN, typical quiescent current, IOUT ≤ 150 mA, VADJ = 5 V · p. 16
Takes asleep
100 nA · IN, typical standby current, VEN ≤ 0.4 V, Tj ≤ 125°C · p. 16
Gives
150 mA · OUT, rated output current capability · p. 1
Current limit
350 mA · Typical output current limitation, VOUT = VADJ - 0.1 V, VADJ = 5 V · p. 11
Dropout
250 mV · Typical dropout at IOUT = 150 mA, VADJ = 5 V · p. 11
Junction to case (PG-DSO-8)
18 K/W · Typical junction to case · p. 8
Junction to air (PG-DSO-8)
50 K/W · Typical junction to ambient, 2s2p board · p. 8
Junction to air (PG-DSO-8)
157 K/W · Typical junction to ambient, 1s0p board, footprint only · p. 8
Junction to air (PG-DSO-8)
77 K/W · Typical junction to ambient, 1s0p board, 300 mm2 heatsink area · p. 8
Junction to air (PG-DSO-8)
63 K/W · Typical junction to ambient, 1s0p board, 600 mm2 heatsink area · p. 8

What it is and has

11
Output current capability
150 mA · p. 1
Output voltage
Adjustable down to 2.0 V · p. 1
Output capacitor compatibility
Stable with ceramic output capacitors · p. 1
Power good
Overvoltage and undervoltage indication · p. 1
Soft start
Internally controlled · p. 1
Protection
Output short circuit to GND and battery · p. 1
Protection
Reverse polarity protected input · p. 1
Protection
Overtemperature protection · p. 1
Compliance
RoHS compliant · p. 1
Qualification
Automotive applications; product validation according to AEC-Q100 · p. 1
Package
PG-DSO-8 · p. 1

Around it

4
cap 100 nF to 470 nF
between IN and GND; CIN1 ceramic capacitor; filters high frequency disturbance. Place as close as possible to the input pin. · p. 24
cap 10 µF to 470 µF
between IN and GND; CIN2 aluminum electrolytic capacitor; smoothens high energy pulses. Place close to the input pin. · p. 24
cap 1 µF minimum
between OUT and GND; COUT required for stability; ESR maximum 5 Ω. Minimum capacitance requirement applies for a worst case capacitance tolerance of 30%. X5R or X7R ceramic recommended in automotive applications; place close to OUT and GND on the same PCB side as the device. · p. 8
res Sized depending on pull-up voltage
between PG and positive voltage rail; Required pull-up resistor; maintain PG absolute maximum ratings and limit external input current. The application example uses microcontroller VDD. · p. 25

Specifications

44
ParameterConditionsAs printedPage
Voltage VINInput INmin -16 · max 45 V7
Voltage VENEnable ENmin -16 · max 45 V7
Voltage VADJAdjust ADJmin -16 · max 45 V7
Voltage VOUTOutput OUTmin -5 · max 45 V7
Voltage VIN - VOUTInput output voltage differencemin -30 · max 45 V7
Voltage VPGPower good PGmin -0.3 · max 7 V7
Junction temperature Tjmin -40 · max 150 °C7
Storage temperature Tstgmin -55 · max 150 °C7
ESD susceptibility to GND VESD,HBMHuman Body Model (HBM); not subject to production test, specified by designmin -4 · max 4 kV7
ESD susceptibility to GND VESD,CDMCharged Device Model (CDM); not subject to production test, specified by designmin -1 · max 1 kV7
ESD susceptibility to GND VESD,CDMCharged Device Model (CDM) at corner pins; not subject to production test, specified by designmin -1 · max 1 kV7
Input voltage range VINmin 4 · max 45 V8
Adjust input voltage range (voltage tracking range) VADJmin 2 · max 14 V8
Capacitance of output capacitor COUTMinimum requirement applies for a worst case capacitance tolerance of 30%; not subject to production test, specified by designmin 1 uF8
Equivalent series resistance of output capacitor ESRCOUTNot subject to production test, specified by designmax 5 Ω8
Junction temperature Tjmin -40 · max 150 °C8
Junction to case RthJCPG-DSO-8; not subject to production test, specified by designtyp 18 K/W8
Junction to pin RthJPPG-DSO-8typ 85 K/W8
Junction to ambient RthJAPG-DSO-8; 2s2p boardtyp 50 K/W8
Junction to ambient RthJAPG-DSO-8; 1s0p board, footprint onlytyp 157 K/W8
Junction to ambient RthJAPG-DSO-8; 1s0p board, 300 mm2 heatsink area on PCBtyp 77 K/W8
Junction to ambient RthJAPG-DSO-8; 1s0p board, 600 mm2 heatsink area on PCBtyp 63 K/W8
Output voltage tracking accuracy ∆VOUT∆VOUT = VADJ - VOUT; 5.5 V ≤ VIN ≤ 22 V; 0.1 mA ≤ IOUT ≤ 150 mA; 2 V ≤ VADJ ≤ VIN - 1 V; VEN ≥ 2.0 V; Tj = -40°C to 150°Cmin -5 · max 5 mV11
Output voltage tracking accuracy ∆VOUT∆VOUT = VADJ - VOUT; 5.5 V ≤ VIN ≤ 32 V; 0.1 mA ≤ IOUT ≤ 70 mA; 2 V ≤ VADJ ≤ VIN - 1 V; VEN ≥ 2.0 V; Tj = -40°C to 150°Cmin -5 · max 5 mV11
Load regulation steady-state ∆VOUT,loadVIN = 13.5 V; IOUT = 0.1 mA to 150 mA; VADJ = 5 V; VEN ≥ 2.0 V; Tj = -40°C to 150°Cmin -4 · typ -0.1 mV11
Line regulation steady-state ∆VOUT,lineVIN = 5.5 V to 32 V; IOUT = 10 mA; VADJ = 5 V; VEN ≥ 2.0 V; Tj = -40°C to 150°Ctyp 0.1 · max 4 mV11
Power supply ripple rejection PSRRVIN = 13.5 V; 2.0 V ≤ VADJ ≤ 14 V; VEN ≥ 2.0 V; Tj = -40°C to 150°C; fripple = 100 Hz; Vripple = 1 Vpp; IOUT = 10 mA; COUT = 10 uF, ceramic type; not subject to production test, specified by designtyp 85 dB11
Output current limitation IOUT,maxVIN = 13.5 V; VOUT = VADJ - 0.1 V; VADJ = 5 V; VEN ≥ 2.0 V; Tj = -40°C to 150°Cmin 151 · typ 350 · max 500 mA11
Reverse current IOUT,revVIN = 0 V; VOUT = 16 V; VADJ = 5 V; VEN ≥ 2.0 V; Tj = -40°C to 150°Cmin -3.5 · typ -1.7 mA11
Reverse current at negative input voltage IIN,revVIN = -16 V; VOUT = 0 V; VADJ = 5 V; VEN ≥ 2.0 V; Tj = -40°C to 150°Cmin -4 · typ -2 mA11
Dropout voltage VdrVdr = VIN - VOUT; IOUT = 150 mA; VADJ = 5 V; VEN ≥ 2.0 V; Tj = -40°C to 150°C; measured when VOUT has dropped 100 mV from the nominal value obtained at VIN = 13.5 Vtyp 250 · max 500 mV11
Overtemperature shutdown threshold Tj,sdVIN = 13.5 V; 2.0 V ≤ VADJ ≤ 14 V; VEN ≥ 2.0 V; Tj increasing due to power dissipation generated by the devicetyp 175 °C12
Overtemperature shutdown threshold hysteresis ∆Tj,sdhVIN = 13.5 V; 2.0 V ≤ VADJ ≤ 14 V; VEN ≥ 2.0 Vtyp 15 K12
Current consumption stand-by mode Iq,offVIN = 13.5 V; 2.0 V ≤ VADJ ≤ 14 V; Iq,off = IIN; VEN ≤ 0.4 V; -40°C ≤ Tj ≤ 125°Ctyp 0.1 · max 5 uA16
Current consumption IqVIN = 13.5 V; VEN ≥ 2.0 V; Iq = IIN - IOUT; IOUT ≤ 0.1 mA; VADJ = 5 V; -40°C ≤ Tj ≤ 125 °Ctyp 55 · max 90 uA16
Current consumption IqVIN = 13.5 V; VEN ≥ 2.0 V; Tj = -40°C to 150°C; Iq = IIN - IOUT; IOUT ≤ 150 mA; VADJ = 5 Vtyp 7 · max 14 mA16
Enable off voltage range VEN,offVIN = 13.5 V; 2.0 V ≤ VADJ ≤ 14 V; VOUT = 0 V; IOUT ≤ 5 uA; -40°C ≤ Tj ≤ 125°Cmax 0.8 V19
Enable on voltage range VEN,onVIN = 13.5 V; 2.0 V ≤ VADJ ≤ 14 V; Tj = -40°C to 150°C; VOUT settledmin 2 V19
Enable input current IENVIN = 13.5 V; 2.0 V ≤ VADJ ≤ 14 V; Tj = -40°C to 150°C; VEN = 5 Vtyp 2 · max 4 uA19
Adjust input current IADJVIN = 13.5 V; VEN ≥ 2.0 V; Tj = -40°C to 150°C; VADJ = 5 Vtyp 0.03 · max 1 uA21
Power good reaction time tPG,rVIN = 13.5 V; 2.0 V ≤ VADJ ≤ 14 V; VEN ≥ 2.0 V; Tj = -40°C to 150°Cmin 10 · typ 15 · max 30 us23
Power good output "low" voltage VPG,lowVIN ≥ 4 V; 2.0 V ≤ VADJ ≤ 14 V; VEN ≥ 2.0 V; Tj = -40°C to 150°C; IPG,ext ≤ 1.8 mAtyp 0.2 · max 0.4 V23
Power good output external input current IPG,extVIN = 13.5 V; 2.0 V ≤ VADJ ≤ 14 V; VEN ≥ 2.0 V; Tj = -40°C to 150°C; VPG ≤ 0.4 Vmax 1.8 mA23
Power good output leakage current IPG,leakVIN = 13.5 V; 2.0 V ≤ VADJ ≤ 14 V; VEN ≥ 2.0 V; Tj = -40°C to 150°C; VOUT = VADJ; VPG = 5 Vtyp 0 · max 2 uA23

Pins, by the datasheet

9
1 OUT
Tracker output with 150 mA capability; connect a capacitor to GND close to the pins, meeting Table 2 capacitance and ESR requirements. · p. 6
2 N.C.
Not connected. · p. 6
3 GND
Ground. · p. 6
4 PG
Power good output; connect to a positive voltage rail through a pull-up resistor. Low indicates a tracker output fault. · p. 6
5 ADJ
Adjust input; connect to the reference voltage. · p. 6
6 N.C.
Not connected. · p. 6
7 EN
High enables the tracker; low disables it. Connect EN to IN if the enable function is not required. · p. 6
8 IN
Input; a small ceramic capacitor to GND close to the pins is recommended to compensate line influence. · p. 6
Pad –
Exposed pad; connect to GND. Connection to a heat sink is recommended. · p. 6

Parameters

16
Current Limit
350mA
Features
Enable control
Junction Temperature(Max)
150℃
Number of Outputs
1
Operating Temperature
-40℃~+150℃@(Tj)
Output Configuration
Positive
Output Current
150mA
Output Type
Adjustable
Output Voltage
2V~14V
Power Supply Rejection Ratio (PSRR)
85dB@(100Hz)
Standby Current
100nA
Thermal Resistance(Junction to Ambient)
157℃/W
Thermal Resistance(Junction to Case)
18℃/W
Voltage - Supply
4V~45V
Voltage - Supply(Absolute Max)
45V
Voltage Dropout
250mV

Order codes

2

Pinout

9
The pins of the TLS115D0EJ
PinNameType
1OUTUnspecified
2N.C.Unspecified
3GNDUnspecified
4PGUnspecified
5ADJUnspecified
6N.C.Unspecified
7ENUnspecified
8INUnspecified
9EPUnspecified

Open-source boards using it

All 2
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Questions

Is there a KiCad symbol and footprint for the TLS115D0EJ?

Yes. The symbol is EasyEDA_Cloud:TLS115D0EJXUMA1 and the footprint EasyEDA_Cloud:ESOP-8_L4.9-W3.9-P1.27-LS6.0-BL-EP, both drawn on this page. PCBKit places them on a board for you when you design with it.

What package is the TLS115D0EJ?

DSO-8, with 9 pins. Its footprint is drawn on this page.

Where is the TLS115D0EJ datasheet?

Infineon Technologies publishes it: the Datasheet link on this page opens it.

Where can I order the TLS115D0EJ?

JLCPCB lists it as part C3747428, with 4,677 in stock; the sellers' links on this page open their listings.

What can replace the TLS115D0EJ?

Parts like it in the library: the RT9048GSP by Richtek Tech, the BL1118CS8TR1833 by BL, the MD7672B50SF4 by Shanghai Mingda Microelectronics and the MD85E50SF4 by Shanghai Mingda Microelectronics. Check their datasheets: a part that fits the footprint may still differ in its ratings.

Which open-source boards use the TLS115D0EJ?

2 boards in 2 repositories on GitHub; the most starred are listed on this page, with their KiCad files.

Parts like it

8