AES42HAT

AES42HAT

The AES42HAT is a Raspberry Pi compatible HAT with up to 4 channels of AES3/AES42 interface. At present it is a work in progress.

AES3 is the stereo digital audio interface for professional applications, which is compatible to some extent with SPDIF as used on consumer gear.

AES42 is building on AES3 to provide power and control for digital microphones.

Depending on what is fitted on the board, AES42HAT supports up to 4 stereo channels of input/output, with or without SRC on input, and with or without external synchronization.

Raspberry Pi models up to the Raspberry Pi 4B, and various clones, support only one stereo channel in/out. The Raspberry Pi 5 supports the full set of 4 stereo channels. The BeagleY-AI also supports 4 stereo channels in/out.

The 4 inputs and outputs are available on a header that supports the "Tascam pinout" (or AES59 pinout) for a 25-pin SubD connector for multichannel digital input/output. A standard IDC cable adapter between the header and the SubD connector is needed.

Build variants

The design supports different variants, depending on which parts are fitted on the board. This allows a tradeoff between cost and feature set, depending on user's needs.

See the schematics for the function blocks that can be omitted if desired. The bare minimum consists of the parts that are shown outside of an optional block.

The Raspberry Pi uses the ID EEPROM to determine the build variant.

Minimum build -- AES42HAT lite

The minimum build uses a DIX4192 for U10, and omits everything in the optional blocks. It provides a stereo input/output in AES3 format, without SRC. It is compatible with most Raspberry Pi models and some clones, provided they feature a PCM interface on the standard pins, and a finely adjustable clock source on GCLK0. It offers minimal cost for stereo applications that don't need AES42 support or SRC.

The lack of SRC means that there are only two sensible clocking options:

• The Raspberry Pi supplies the clock, and both input and output use it. This can be useful when an external device is connected, that synchronizes to the signal it receives from the AES42HAT.
• The output uses the clock derived from the received signal. This is useful when the external device is treated as the clock source, and the Raspberry is following it.

In both cases input and output use the same clock, i.e. they are synchronous to each other.

The lack of a clock synthesizer means that the HAT is dependent on the Raspberry Pi for a clock source. The original Raspberry Pi contains finely tunable PLLs which can output a clock signal on GCLK0 that acts as a clock master. If a clone doesn't support this, it won't work.

The lack of a control processor means that the DIX4192 is configured and controlled directly by the Raspberry Pi through its SPI0 interface.

Full-featured stereo interface -- AES42HAT stereo

This is the AES42HAT lite with an SRC4392 for U10, plus the clock synthesizer.

This adds the capability of using SRC on input, so the input clock can be independent from the output clock. The presence of a clock synthesizer eliminates the dependency on the Raspberry Pi clock generator, and adds a separate wordclock input and output to support synchronization.

The clock syntheziser may also be slaved to a 10 MHz reference input as commonly used in measurement equipment and frequency references. This can be used for measurement purposes, or for creating audio clocks from GPS receivers and highly stable oscillators.

The clock synthesizer is controlled by the Raspberry Pi through its I2C bus.

Full-featured 8-channel interface -- AES42HAT octal

This adds 3 more stereo channels to the AES42HAT stereo to form a bidirectional 8-channel interface. SRC is supported on all channels by virtue of 3 more SRC4392 chips, so that each input can run on its own clock, while all outputs share a common clock generated by the local clock synthesizer.

The addition of more channels also requires the local control processor. The SPI0 interface on the Raspberry Pi is no longer needed. All control is done via the I2C bus, with the control processor managing the multiple channels.

Any of the input channels can be used as a synchronization source, instead of the separate wordclock input.

The usage of a Raspberry 5 or a BeagleY-AI is needed to handle all the audio channels.

Full-featured 8-channel interface with AES42 support -- AES42HAT microphone

This adds AES42 compatible phantom power and remote control capability to all 4 stereo input channels of the AES42HAT octal. All synchronization modes of AES42 are supported, and the microphones can be remote controlled, independently for each of the 4 inputs.

This requires a power supply that can deliver the necessary current for powering the microphones in addition to the Raspberry Pi with the HAT. It is recommended to use a 25W power supply capable of delivering 5A@5V to the Raspberry Pi 5. Appropriate cooling should be provided.

The local control processor takes care of the AES42 specifics, and the Raspberry Pi controls and monitors it via I2C.

If the goal is to merely power and control AES42 microphones, whose audio signal is made available on the AES3 outputs, with no intent to process the audio with the Raspberry Pi, then a cheaper/smaller Raspberry Pi can be used, for example a Pi Zero 2. When intending to process the audio with the Raspberry Pi, use a Raspberry Pi 5 or a BeagleY-AI.

Function blocks

Power Supply and Reset

The AES42HAT is powered through the HAT connector's 5V supply. Only the board ID EEPROM (U3) is powered from the 3.3V supply on the HAT connector (J1). A dual DC/DC converter (U4) generates local 3.3V and 1.8V rails for most of the electronics on the board. The DC/DC converter is enabled by the 3.3V supply from the HAT connector, so when the Raspberry Pi is powered down, the AES42HAT is also powered down, even though the 5V rail may remain on.

The Raspberry Pi is responsible for lifting the RESET line after powerup, otherwise the AES42HAT will remain in reset due to R5 pulling down the RESET line. The ID EEPROM can be accessed regardless if the board is in reset or not.

Local Control Processor (optional)

The 8-channel variants of the AES42HAT have a local control processor (U1) fitted, which configures and controls the receivers and transmitters, and handles the phantom powering, the remote control and the synchronization of the AES42 interfaces.

The Raspberry Pi accesses the control processor primarily through I2C, using pins 3&5 on the HAT connector. The Raspberry Pi controls this interface, and the AES42HAT is the target. The communication protocol is TBD.

There is also a UART connection between the Raspberry Pi and the control processor on pins 8&10. This connection can be used for updating the firmware of the control processor from the Raspberry Pi. It may also be used during normal operation for a console-like communication interface. The details are TBD.

There is an additional signal on Pin 26 of the HAT connector (REQ/ISP), which serves two purposes:

• Upon release of RESET, the signal determines the boot mode of the control processor. When high, the control processor boots normally and executes its stored firmware. When low, it boots into a bootloader that can be used to update its firmware through the UART interface. Hence, to initiate firmware update, the Raspberry PI has to pull this signal low while releasing RESET.
• During normal operation, the signal is used as a service request signal from the AES42HAT to the Raspberry Pi. It is up to the Raspberry Pi to poll the signal, or arrange for an interrupt to be generated whenever the signal goes low. The control processor holds the interrupt active until the Raspberry Pi clears it through the I2C interface. The details are TBD.

When the control processor is fitted, the Raspberry Pi's own SPI interface on HAT connector pins 19,21,23&24 is not used and must be disabled.

Clock Synthesizer (optional)

The clock synthesizer supports generating arbitrary audio clock frequencies, and to reference them to an external clock source. This provides considerable flexibility in setting up the clocking structure of a system. The following features are supported:

• Support for any sampling rate the Receivers/Transmitters are capable of (20 .. 216 kHz). All transmitters use the same rate, and are synchronous to each other.
• Sampling rate can be finely tuned by software.
• An external 10 MHz reference can be connected to support synchronization from highly stable frequency sources (GPS receivers, OXCOs, Rubidium sources, ...). This can also help measurement applications. If no external reference is used, an internal 10 MHz crystal is used. The reference signal can be made available internally as the ACLK signal.
• Any one of the AES3 input signals can be used as the synchronization source.
• An external TTL wordclock signal can be connected to serve as a synchronization source.
• A TTL wordclock output is available.

All those features are controlled from software. The clock synthesizer is connected to the I2C bus (HAT connector pins 3&5) that is controlled by the Raspberry Pi. It produces two output clocks:

• The MCLK signal is the audio master clock from which the transmitters derive their output signal. The audio interface of the Raspberry Pi (PCM) is also driven from this clock, and operated in slave mode. The MCLK signal connects to pin 7 of the HAT interface. This allows the Raspberry Pi to supply the audio master clock instead of the clock synthesizer. The clock synthesizer's output must be switched off in this case (if it is fitted).
• The ACLK signal is typically driven by the 10 MHz reference clock signal. It can be used in the AES3 receivers as a reference signal for measuring incoming sampling rates.

The MCLK frequency should be between 10 and 25 MHz. For a single-speed sampling rate up to a nominal 48 kHz, MCLK should be 512 * Fs. For a double-speed rate up to 96 kHz it should be 256 * Fs. For a quad-speed rate up to 192 kHz it should be 128 * Fs. The dividers in U10 must be set up to divide this down to the right bit clock and word clock.

The clock synthesizer has a separate synchronization input that is driven by the RCLK signal. Its use is optional, determined by software.

• If RCLK is not used, the 10 MHz signal is used as the reference, from which MCLK is derived directly using a fractional PLL.
• If RCLK is used, MCLK is derived from it by steering the fractional multiplier of the PLL to track the frequency of RCLK. This also reduces the jitter that may be present on RCLK. A wide frequency range on RCLK is supported (50 Hz .. 30 MHz). Skipped pulses on RCLK can also be supported.

The RCLK signal can be fed from different sources:

• In the default case, it is fed from the external wordclock input. This is a TTL level signal that need not work at the wordclock frequency. It may be used to synchronize to a wide range of external frequency sources. The Raspberry Pi must enable it by driving the WIEN signal low.
• It can alternatively be fed from one of the receivers, using their RXCKO output. This output can be enabled to provide a clock signal derived from the incoming AES3 signal. It allows an incoming audio signal to be used as the synchronization source for the clock synthesizer. On 8-channel variants of AES42HAT, only one of four receiver chips can have this output enabled, or they will interfere with each other, potentially leading to damage. The output is disabled by default. Before enabling one of them, the Raspberry Pi must disable the external wordclock signal by driving the WIEN signal high.
• The Raspberry Pi can drive the RCLK signal using its GCLK2/GPIO6 signal on pin 31 of the HAT connector. Both the wordclock input and the receiver RXCKO outputs must be disabled before the Raspberry Pi can activate this signal.

The clock syntheizer can be a CS2000 (obsolete), a CS2500 or a THAT7200. Its I²C address is 0x4F (0x9E for write, 0x9F for read).

AES Receivers/Transmitters

Decoding and encoding of the AES3 signal is done by U10 (on 8-channel variants also U20, U30 and U40). There are three pin-compatible chips that can be fitted alternatively:

• The DIX4192 is a receiver and transmitter for one AES3 signal, including the balanced driver and receiver necessary for the physical interface.
• The SRC4392 includes a sampling rate converter (SRC) that can be used with either the receiver or the transmitter, but is most useful with the receiver. Its other functions are the same as with the DIX4192, and the software interface is compatible.
• The SRC4382 saves some cost by including a less accurate SRC that offers worse signal to noise. While this chip can be used, the cost savings are usually not worth it, and the AES42HAT will only use it upon special request.

Whichever chip is fitted, most of the functionality is the same. It has an extensive register set for controlling the details of operation, which is accessed through an SPI compatible interface.

When the local control processor is fitted, it is in control of the SPI interface used to configure and control the receivers/transmitters.

The chips have flexible internal signal routing and clocking, which is set up through the SPI control interface. Routing and clocking is set up as follows:

• U10 is the clock master on the PCM interface to the Raspberry Pi. Audio port A is configured in master mode and produces the BCLK and LR clock signals, with MCLK as the clock source. The BLS pin is configured as output.
• When fitted, U20, U30 & U40 operate their audio ports A&B in slave mode, so the BCKA, BCKB, LRCKA and LRCKB pins are inputs. The BLS pin is also configured as input.
• The transmitters within U10, U20, U30 and U40 are typically configured to be sourced from audio port A. The transmitter thereby sends an audio signal provided by the Raspberry Pi.
• Alternatively, the received input signal can be passed through to the output directly, using the pin multiplexers, bypassing the DIR and DIT blocks.
• The SRC is used with the receiver to convert the sampling rate of the received signal to the clock used on port A. If the input signal is known to be synchronous with this clock, the SRC can be omitted from the signal path.
• The ACLK signal (nominally 10 MHz) is available on the RXCKI signal, and can be used as a reference for the SRC to estimate the ratio. It can also be used as a reference clock for the DIR block. When the clock synthesizer is not fitted, the ACLK signal is not available, and the MCLK signal must be used as a reference.

Each receiver/transmitter has 4 GPO pins that have programmable functionality. On the AES42HAT, they are used as follows:

• GPO1 is used to enable phantom power for the AES42 input. If the AES42 circuit is not fitted, the signal is unused. The output defaults to low after reset, thereby turning phantom power off.
• GPO2 is used to select between two synchronization modes of AES42. This is only relevant when phantom power is switched on. A low signal selects mode 2, which is the default after reset.
• GPO3 is connected to the control processor, and is intended to carry the reconstructed wordclock signal from the receiver ("Receiver Internal Sync Clock"). If the control processor is not fitted, the signal is unused.
• GPO4 is connected to the control processor, and is intended to carry the received U-bit ("Receiver User Data Bit"), giving the control processor an alternate way to process the incoming user bit. If the control processor is not fitted, the signal is unused.

If the intended functionality of GPO3&4 is not required, other signals may be chosen to be fed to the control processor.

Each receiver/transmitter can generate an interrupt signal. The interrupt signal is handled by the control processor, if it is fitted. Otherwise the interrupt from U10 is fed to the Raspberry Pi on HAT connector pin 26.

AES42 Phantom Supply and Remote Control

AES42 defines a way of powering a connected microphone using a 10 V phantom power scheme. Additionally, remote control signals can be sent to the microphone by modulating them on top of the phantom power. The "AES42HAT microphone", the fully featured variant, supports both.

Phantom power is generated by a DC/DC converter (U51, U61, U71, U81). Each input can be powered separately, controlled by GPO1 of the respective receiver/transmitter. The DC/DC converter works from the +5V rail, and each circuit potentially draws up to 600mA from this rail, depending on the load represented by the microphone that is connected. The power supply used must be able to deliver this amount of current.

The control processor can monitor the phantom voltage through signals PVx, so it can diagnose short circuits or overload.

Remote control using AES42 Mode 2 is handled by raising the phantom voltage for each pulse generated. This is achieved by temporarily switching the DC/DC converter to output 12 V instead of 10 V. Edge speed is shaped by an additional driver (U52, U62, U72, U82).

Mode 3 is supported by a different circuit built from a signal transformer (L50, L60, L70, L80) driven by a bandpass amplifier (U53, U63, U73, U83). It is based on a clock signal WCLK generated by the control processor.

For both modes, the modulating signal (MODx) is generated by the control processor. Switches (U50, U60, U70, U80) are used to select between the two modes, depending on signals M3x sourced by GPO2 of the receiver/transmitter.

An LED shows the presence of phantom power on each channel. Its brightness is modulated by the remote control pulses.

Dependencies Between Optional Function Blocks

The control processor must be fitted if any of U20, U30 or U40 are fitted. It must also be fitted when the AES42 circuitry is fitted.

The clock synthesizer is controlled by the Raspberry Pi and can be fitted without the control processor. The clock synthesizer is independent from any other function block and can be fitted or omitted, regardless of which other options are fitted. However, if not fitted, the Raspberry Pi must supply the audio master clock (GCLK0).

Support for Raspberry Pi Variants and Clones

The AES42HAT is fully compatible with the Raspberry Pi 5, including support for up to 8 channels of audio input and output.

Previous models of the Raspberry Pi up to the 4B only support stereo audio. The 8-channel variants of AES42HAT can therefore not be fully supported, i.e. the audio signals of the additional channels can't be accessed by the Raspberry Pi. The additional channels can be controlled and configured, however, so it is possible to support use cases where the audio signals need not be touched by the Raspberry Pi (for example using pass-through from input to output, without or with SRC).

Raspberry Pi clones may or may not support the PCM interface, so it is up to the user to check compatibility. In many cases only stereo is supported, if at all.

BeagleY-AI

The BeagleY-AI is a clone that can support all 8 channels, albeit with some special arrangements. The pin assignment for the PCM interface is only partly compatible with the Raspberry Pi 5, and AES42HAT contains some additional wiring to make up for the difference.

With the BeagleY-AI, the McASP0 is used for all the input signals with up to 8 channels. The output channels are generated by McASP1 and McASP2 in SPDIF transmit mode. The latter is necessary because of limitations of clock signal connectivity. The input multiplexers in the receivers/transmitters are used to route the output signals directly to the balanced line driver, bypassing the DIT block. To deal with wiring differences for input channels, audio port B is used on U30 and U40.

ESP32-P4 Function Evaluation Board

The Espressif ESP32-P4 is a microcontroller with a dual-core RISC-V CPU and a rich set of peripherals, including I2S and 100 MBit/s Ethernet. It appears to have some potential for a very low cost platform for low-end networked audio devices, below the price point of a Linux-based solution. Its evaluation board has a set of GPIO signals routed to a Raspberry Pi HAT connector. This opens the possibility to use the AES42HAT as an audio interface.

The ESP32-P4 has 3 I2S function blocks that can be freely assigned to GPIO pins, and it includes a PLL dedicated for audio. It therefore should be able to work with the AES42HAT directly, with no need for a wiring change. At the time of writing, the information available for the ESP32-P4 is sparse, hence the suitability is somewhat unclear at this point, but it certainly looks promising.