

Casserole
Control GE appliances
- Size
- 50 × 55.4 mm
- Copper layers
- 2
- Thickness
- 1.6 mm
- Parts
- 23
- Nets
- 53
- Pads
- 110
- Tracks, vias
- 38, 0
- Pours
- 1
- Routed
- Yes
- KiCad
- KiCad 5 (file 20210925)
- Created
- 22 Dec 2018
- Updated
- 27 Sep 2024
Overview
Casserole is an open-source printed circuit board by puddly, from the puddly/casserole repository on GitHub, published under the Apache-2.0 licence. It is a 2-layer board of 50 × 55.4 mm with 23 parts on 53 nets, routed with 38 tracks and 0 vias.
It is built around the AP6502SP and RJ45. Its parts include 9 resistors, 5 capacitors, 3 transistors, 3 connectors and 1 IC.
Main components
2AP6502SP
SOIC-8-EP-40℃~+85℃ 1 1.5mA 2A 340kHz 4.7V~18V 925mV~16V Adjustable Buck Built-in Overcurrent Protection、Adjustable soft-start、Cycle-by-cycle current limiting、External compensation Step-down type Yes SOIC-8-EP DC-DC Converters ROHSDiodes IncorporatedDC-DC ConvertersRJ45
TH-12PTH-12P SMT ROHSJLCPCB AssemblyUncategorised
README
README.mdCasserole
An open source alternative to the now-defunct Green Bean adapter to monitor and control GE appliances through their RJ45 port.
Installation
# Clone the repo
git clone https://github.com/puddly/casserole
cd casserole
# Setup a new virtual Python env (optional but recommended)
python3 -m venv venv
source venv/bin/activate
# Install dependencies
pip install -r requirements.txt
# Compile and upload the firmware to your ESP32
platformio run -t upload -v -e esp32 --upload-port=/dev/cu.SLAB_USBtoUART
# Run the host software and see what your appliance is doing
python protocol.pyWhat works
- All bus messages are sent back to the computer, including ones sent by the appliance user input boards.
- Messages can be sent to the bus.
What doesn't work
- Other devices occasionally interrupt the adapter's messages. I'm not sure how devices take turns when sending data over the bus.
- GE/FirstBuild's open source SDK is incomplete and does not document any way to remotely start some appliances (like my washer).
Hardware
I don't know much about building electronics but here are the parts I've used:
- ESP32 dev kit (I use this one with built-in RGB LEDs but any should work)
- 3.3v to 5V bus transceiver (TI SN74LVC2T45)
- 5V regulator (ST LD1117, though just about any should work). I've read that the ESP32 can draw up to 600mA in 100ms bursts when in AP mode but ordinarily draws about 40mA.
Wiring:
- Regulate the 9V from the GE bus down to 5V and connect it both your ESP32's
Vinpin and to the high voltage input of the bus transceiver. - Connect the ESP32's 3.3V pin to the low voltage input of the bus transceiver.
- Tie together the ESP32's second UART's RX and TX pins (16 and 17) and connect them to the low voltage input of the bus transceiver.
- Connect pin 18 (though any will work) to the direction control of the bus transceiver.
[insert proper diagram here]Low-level details
RJ45 Port
The RJ45 (Ethernet) port on some GE appliances exposes a bus that allows for communication with the appliance's controller board. The three pins are labeled GND, COMM, and 9V.
The COMM bus uses 5V logic and is an inverted UART at 19,200 baud.
Protocol
I've been unable to acquire an actual Green Bean module so all of the information here is based on what I can capture from my washing machine. Here is a sample packet:
e2 23 22 2d f1 03 f1 2e 0e 03 03 01 19 15 05 2a 00 0a f1 76 fc 0f 0a f1 39 01 03 f1 33 01 5d 9c 30 e3 e1All packets begin with e2 and end with e3 e1 (although very rarely just e3). The byte e0 acts as an escape character and all instances of e0, e1, e2, and e3 in the body of the packet are escaped with e0 (so aa e0 bb e1 cc becomes aa e0 e0 bb e0 e1 cc).
Each packet has a simple structure:
-
(1 byte)
e2. Everything after this but before the finale1is encoded using the above scheme. -
(1 byte) packet destination
-
(1 byte) total packet length (before the
e[0-3]bytes have been escaped) -
(1 byte) packet sender
-
(1 byte) command type
-
(? bytes) data
-
(2 bytes) CRC-16 checksum of the entire packet up until the start of the checksum bytes. It is a 16-bit CRC with the following parameters:
text width=16 poly=0x1021 init=0xe300 refin=false refout=false xorout=0x0000 check=0x5b10 residue=0x0000 name=(none)As before, this is computed on the packet payload before the
e[0-3]bytes have been escaped. Interestingly, this specific CRC-16 has the following property:text crc16(packet_until_checksum || crc16(packet_until_checksum)) == 0x0000 -
(1 or 2 bytes)
e1 e3, although very rarely a packet is sent (consistently) withe3missing.
The packet command type determines how the data is interpreted. A command type of f1 is used internally for all reads/writes and has the following structure:
- (1 byte)
f1 - (1 byte) number of reads/writes encoded in
data - A list of commands:
- (1 byte)
f0is read,f1is write. - (1 byte) endpoint ID
- (1 byte) (This and the following bytes are absent in read requests and write acknowledgements) size of read respons or data to be written
- (? bytes) data
- (1 byte)
The Green Bean uses a different syntax for reads (writes TBD) for what it calls ERDs:
- (1 byte)
f0 - (1 byte)
01for reads - (2 byte) 16-bit ERD, big-endian
Parts
23| Qty | Value | Footprint | References |
|---|---|---|---|
| 3 | 47k | Resistor_SMD:R_0805_2012Metric_Pad1.20x1.40mm_HandSolder | R2, R4, R6 |
| 3 | Q_NMOS_DGS | Package_TO_SOT_SMD:SC-59_Handsoldering | Q1, Q2, Q3 |
| 2 | 22µF | Capacitor_SMD:C_0805_2012Metric_Pad1.18x1.45mm_HandSolder | C5, C6 |
| 2 | ? | Resistor_SMD:R_0805_2012Metric_Pad1.20x1.40mm_HandSolder | R1, R9 |
| 2 | Conn_01x19_Female | Connector_PinSocket_2.54mm:PinSocket_1x19_P2.54mm_Vertical | J2, J3 |
| 1 | 100k | Resistor_SMD:R_0805_2012Metric_Pad1.20x1.40mm_HandSolder | R3 |
| 1 | 10k | Resistor_SMD:R_0805_2012Metric_Pad1.20x1.40mm_HandSolder | R8 |
| 1 | 10nF | Capacitor_SMD:C_1206_3216Metric_Pad1.33x1.80mm_HandSolder | C4 |
| 1 | 10µF | Capacitor_SMD:C_0805_2012Metric_Pad1.18x1.45mm_HandSolder | C1 |
| 1 | 10µH | Inductor_SMD:L_Vishay_IFSC-1515AH_4x4x1.8mm | L1 |
| 1 | 53.3k | Resistor_SMD:R_0805_2012Metric_Pad1.20x1.40mm_HandSolder | R7 |
| 1 | 6.8k | Resistor_SMD:R_0805_2012Metric_Pad1.20x1.40mm_HandSolder | R5 |
| 1 | 6.8nF | Capacitor_SMD:C_1206_3216Metric_Pad1.33x1.80mm_HandSolder | C3 |
| 1 | AP6502 | Package_SO:Diodes_SO-8EP | U1 |
| 1 | RJ45 | Connector_RJ:RJ45_Wuerth_7499010001A_Horizontal | J1 |
| 1 | SW_DIP_x06 | Package_DIP:DIP-12_W7.62mm | SW1 |
Questions
How big is the Casserole PCB?
It measures 50 × 55.4 mm and has 2 copper layers, 1.6 mm thick.
What parts does the Casserole use?
23 parts, built around the AP6502SP and RJ45. The full list of its parts is on this page, with links to each part's symbol and footprint where PCBKit's library has them.
Where can I download the Casserole KiCad files?
From the puddly/casserole repository on GitHub, at the commit this page was made from: the board is board/board.kicad_pcb and its schematic board/board.kicad_sch. PCBKit opens the board in the browser, with nothing to install.
Can I use the Casserole design in my own project?
Its repository publishes it under the Apache-2.0 licence: you may reuse it on that licence's terms (keep the author's notice, and for a copyleft licence share your changes alike).
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