PCBDesign

1. Instrument design

   • Ohmmeter (500 Ω – 10 kΩ)
   • Voltmeter (−5 V to +5 V)
   • DC reference (−5 V to +5 V)
   • Sine wave frequency measurement (1 – 10 kHz)
   • Function generator — square wave (100 Hz – 10 kHz, ±10 V) and sine wave (1 – 10 kHz, 0 – 10 V pk)

2. System integration

   • ±12 V power supply from 24 V input
   • Software-driven successive-approximation measurement (digipot + comparator)
   • Rotary-encoder UI on 20×4 LCD

3. PCB layout

   • Full KiCad schematic and 4-layer board design sized to the Raspberry Pi footprint

The interface is a stack-based menu tree with automatic hardware cleanup on back-navigation. Measurement modes sample every 500 ms; the LCD refreshes on a 50 ms display flag with thread-safe writes.

To ensure a highly responsive user interface, the 500 ms hardware measurement routines run asynchronously or utilize non-blocking sleep intervals. This prevents the synchronous 8-bit SPI SAR sweeps from blocking encoder interrupt callbacks or delaying the 50 ms LCD UI refresh cycle.

while True:
    if display_needs_update → render_interface()
    if measurement_mode     → sample hardware every 500 ms
    if leaving_mode         → cleanup GPIO / stop waveforms
    sleep(0.05)

Objective: Split a +24 V DC input into symmetric +12 V and −12 V rails to power op-amps throughout the system. Rails must remain stable under varying load.

Theory of Operation: Virtual ground from a 24 V source. TL081 unity-gain follower at the 12 V midpoint drives IRFZ34N + IRF5305 push-pull stage. Virtual ground tied to Pi GND → +12 V above, −12 V below. The virtual ground node acts as the absolute 0 V reference point for all analog measurements. To prevent heavy analog return currents from injecting noise into the digital plane, the Raspberry Pi GND is tied to this virtual ground at a single star-ground point right at the power entry terminal.

1. Voltage reference: Matched 10 kΩ divider + Zener clamping → 12 V at TL081 pin 3
2. Unity-gain buffering: 100 kΩ feedback drives MOSFET gates
3. Push-pull output: NMOS sources / PMOS sinks load current at virtual ground
4. Output stabilization: 220 µF bulk caps per rail

Physical Integration: Breadboard; ±12 V via terminal blocks. GPIO: None — analog only.

Objective: High-accuracy auto-ranging digital ohmmeter for 500 Ω to 10 kΩ.

Theory of Operation: Voltage divider with unknown resistor vs. 7-bit MCP4131 programmable reference. Successive approximation across 128 wiper steps; LM339 comparator on GPIO 21. LCD updates every 500 ms with ±10% tolerance. A fixed series current-limiting resistor (R_limit = 1 kΩ) is placed in series with the unknown device under test (DUT). This keeps the maximum current through the MCP4131 wiper well below its absolute maximum rating of 2.5 mA even when measuring low resistances down to 500 Ω.

[!NOTE] SAR performance (8-bit search): Each iteration writes one MCP4131 wiper step over SPI (1 MHz, 2-byte frame ≈ 16 µs), waits 5 ms for the divider/comparator to settle (sleep(0.005)), then reads GPIO 21. Eight bisection steps → ≈40 ms per resistance reading, well under the 500 ms LCD refresh cadence. Quantization is set by the 128-step digipot (7-bit effective range); resistance resolution is non-linear with step (R = R_known × step / (128 − step)) and tightest near the matched mid-scale point. Because the voltage-divider topology yields a non-linear resolution across the 128-step digipot, measurement precision peaks when the unknown resistance closely matches the internal reference (R_known). Near the outer bounds (500 Ω and 10 kΩ), step-size quantization broadens, which accounts for the specified worst-case ±10% tolerance.

Objective: Measure −5 V to +5 V at ±0.2 V accuracy. Dual-source: external input or internal DC reference verification.

Theory of Operation:

1. U2 — Inverting summing amp: Maps −5 V to +5 V → 0 V to −10 V
2. U1 — Inverting amp: Gain −1/3 → 0 to +3.3 V
3. U3 — MCP4131: 128-step programmable reference via SPI
4. U5A — LM339: Comparator with 10 kΩ pull-up
5. GPIO 6: Binary search until reference matches test voltage

[!NOTE] SAR performance (8-bit search): Same 8-iteration binary search as the ohmmeter — one SPI wiper write + 5 ms settle per step → ≈40 ms total sweep, safely below the 500 ms display refresh rate. The ±10 V input span maps to 128 comparator steps, giving a theoretical ≈78 mV/step (10 V / 128 ≈ 78 mV); linear interpolation between calibrated lookup points improves display accuracy to ±0.2 V.

Calibration & Testing: Verified against reference multimeter across full range. SAR converges in 8 iterations. ±0.2 V accuracy; best precision near 0 V.

Objective: Programmable DC output −5 V to +5 V in 0.625 V steps (32 levels).

1. R-2R DAC: GPIO 14, 15, 18, 23, 24 → binary-weighted divider
2. U2 — Non-inverting amp: Gain ≈ 3.03 scales 0–3.3 V → 0–10 V
3. U3 — Difference amp: +5 V bias → −5 V to +5 V output

Calibration & Testing: Output verified across all 32 steps with a reference multimeter. Monotonic response confirmed from −5 V to +5 V.

Figure 4.4.2: Previous DC Ref Schematic

Original binary-weighted DAC with per-GPIO comparator buffers suffered cross-loading. R-2R ladder maintains uniform 2R impedance regardless of bit pattern. The R-2R ladder ensures the digital pins always see a constant output impedance of R (or 2R depending on the node), preventing the voltage sag and non-monotonicity caused by varying pin source impedances in the previous binary-weighted layout.

Objective: Variable square wave centered at 0 V, up to ±10 V, high-Z output for oscilloscope use.

Theory: Pi hardware PWM GPIO 12 → MCP4231 amplitude + offset → difference amplifier (gain 10) → ±10 V. The hardware PWM output from GPIO 12 passes through a dedicated RC low-pass filter stage to smooth high-frequency switching transients and stabilize the signal envelope before amplitude scaling, maintaining waveform integrity across the 100 Hz to 10 kHz band.

Calibration & Testing:

• Figure 4.5.2 — ±7 V initial: −7.24 V min / +5.95 V max (miscentered)
• Figure 4.5.3 — ±5 V @ 100 Hz: Offset ratio 0.45 → ±3% centering
• Figure 4.5.4 — ±10 V @ 100 Hz: Full swing confirmed

Objective: Measure 0 V to +10 V sine input frequency from 1 kHz to 10 kHz.

Theory: LM339 threshold at +1.65 V → digital edges on GPIO 25 → f = 1/T. 100-period rolling buffer with >2σ outlier rejection.

pigpio edge architecture: On standard Linux (non-real-time), Python thread scheduling would jitter any bit-banged timing. The pigpio daemon sidesteps this by sampling GPIO transitions with hardware-level DMA, stamping each rising edge with a microsecond-accurate tick (pigpio.tickDiff) in a background buffer. The Python callback only appends period samples; compute_frequency() runs on the 500 ms UI loop, decoupling the timing-critical edge capture from GIL contention and kernel scheduling delay.

Calibration & Testing: ±2% tolerance across 1 – 10 kHz.

Objective: 0 – 10 V peak sine wave from 1 kHz to 10 kHz.

1. U3 — TL081 buffer: Pi audio jack + −5 V DC offset
2. U4 & U5 — Scaling: Normalize to 0–3.3 V. Because the Raspberry Pi audio jack outputs a line-level AC signal (≈1 V pk-pk), U4 is configured as a non-inverting amplifier with a hardware gain of A_v ≈ 3.3 to scale the raw audio voltage up to the required 3.3 V internal logic dynamic range before attenuation.
3. U10 — MCP4131: Digital attenuation via SPI
4. U11 & U12 — Output: Reconstruct to 0–10 V

• CAD tool: KiCad — free, full-featured
• Schematic: Hierarchical sub-sheets per instrument; max 4 layers
• Layout: Subsystem grouping, through-hole + SMD passives, 45° routing
• Manufacturing: DRC-checked Gerbers in PCBDesign/ (designed, not manufactured)

Power Pi via USB-C, analog circuits via 24 V DC. Wait ~20 s after boot.