Bcd counter using d flipfflop

🔢 BCD Counter Using D-Flip Flop

A complete BCD (Binary-Coded Decimal) Counter built from scratch using D-type Flip-Flops (74LS74), designed and routed in KiCad 10.0. This project demonstrates synchronous digital counter design using discrete TTL logic ICs with a 7-segment display output.

📸 Project Screenshots

Schematic Diagram

PCB Layout

3D View — Front Side

3D View — Back Side

🧠 How It Works

A BCD counter counts from 0 to 9 (binary 0000 to 1001) and then resets back to 0. This design achieves that using:

1. NE555 Timer (Astable Mode) — Generates the clock signal for the counter.
2. 74LS74 D-Flip Flops — Four flip-flops (Q0–Q3) form the 4-bit binary counter. Each flip-flop's complementary output (Q̅) is fed back to its D input, creating a toggle behavior.
3. 74LS00 NAND Gates — Provide the combinational logic to detect count 10 (binary 1010) and force a reset, ensuring the counter wraps around after 9.
4. 74LS47 BCD-to-7-Segment Decoder — Converts the 4-bit BCD output into signals to drive the 7-segment display.
5. HDSP-7401 7-Segment Display — Displays the current count (0–9) visually.

📊 Count Sequence

After reaching 9, the NAND gate logic detects 1010 (Q3·Q1) and resets all flip-flops to 0000.

🧩 Components Used (Bill of Materials)

Total ICs: 6  |  Total Passives: 11  |  Total Components: 18

⚡ Power Supply

⚠️ Do NOT exceed 5.25V as the 74LS series TTL ICs have a maximum operating voltage of 5.25V.

🕐 Clock Signal (NE555 Timer)

The NE555 is configured in Astable (free-running) mode to generate a continuous square wave clock signal.

Timer Configuration

• R1 (Ra) = 1KΩ
• R2 (Rb) = 15KΩ
• C1 = 47µF
• C2 = 0.01µF (Decoupling)

Calculated Frequency

f = 1.44 / ((R1 + 2×R2) × C1)
f = 1.44 / ((1000 + 2×15000) × 0.000047)
f ≈ 0.99 Hz  (~1 count per second)

The counter advances approximately once per second, making the count changes easily visible on the 7-segment display.

📂 Project Structure

bcd_counter_using_d-flipfflop/
│
├── 📄 README.md                                    ← You are here
├── 📐 bcd_counter_using_d-flipfflop.kicad_sch      ← Schematic file
├── 🟢 bcd_counter_using_d-flipfflop.kicad_pcb      ← PCB layout file
├── ⚙️ bcd_counter_using_d-flipfflop.kicad_pro      ← KiCad project file
│
├── 📁 images/
│   ├── 🖼️ schematic_diagram.jpeg                   ← Circuit schematic screenshot
│   ├── 🖼️ pcb_layout.jpeg                          ← PCB layout screenshot
│   ├── 🖼️ 3d_view_front.jpeg                       ← 3D render (front side)
│   └── 🖼️ 3d_view_back.jpeg                        ← 3D render (back side)
│
└── 📁 Gerber/
    ├── bcd_counter_using_d-flipfflop-F_Cu.gbr       ← Front copper layer
    ├── bcd_counter_using_d-flipfflop-B_Cu.gbr       ← Back copper layer
    ├── bcd_counter_using_d-flipfflop-F_Mask.gbr     ← Front solder mask
    ├── bcd_counter_using_d-flipfflop-B_Mask.gbr     ← Back solder mask
    ├── bcd_counter_using_d-flipfflop-F_Paste.gbr    ← Front solder paste
    ├── bcd_counter_using_d-flipfflop-B_Paste.gbr    ← Back solder paste
    ├── bcd_counter_using_d-flipfflop-F_Silkscreen.gbr ← Front silkscreen
    ├── bcd_counter_using_d-flipfflop-B_Silkscreen.gbr ← Back silkscreen
    ├── bcd_counter_using_d-flipfflop-Edge_Cuts.gbr  ← Board outline
    ├── bcd_counter_using_d-flipfflop-PTH.drl        ← Plated through-holes
    ├── bcd_counter_using_d-flipfflop-NPTH.drl       ← Non-plated holes
    └── bcd_counter_using_d-flipfflop-job.gbrjob     ← Gerber job file

🏭 PCB Specifications

✅ All nets are fully routed — The PCB design is complete with zero unrouted connections.

🛠️ How to Use This Project

Prerequisites

• KiCad 10.0 or later — Download here

Opening the Project

1. Open KiCad
2. Go to File → Open Project
3. Navigate to this folder and select bcd_counter_using_d-flipfflop.kicad_pro
4. The schematic and PCB layout will be available in the project window

Ordering the PCB

1. The Gerber/ folder contains all manufacturing files
2. Upload the contents of the Gerber/ folder to any PCB manufacturer:
   • JLCPCB
   • PCBWay
   • OSH Park
3. Use default settings (2-layer, 1.6mm thickness, HASL finish)

📚 Theory — BCD Counter with D-Flip Flops

Why D-Flip Flops?

A D-Flip Flop can be used as a toggle flip-flop by connecting its Q̅ (complementary) output back to the D input. On each rising edge of the clock, it toggles its state — this is the fundamental building block for binary counters.

BCD vs. Binary Counter

A standard 4-bit binary counter counts from 0000 to 1111 (0–15). A BCD counter is modified to count only from 0000 to 1001 (0–9) by adding reset logic that detects the invalid state 1010 (decimal 10) and immediately resets all flip-flops to 0000.

Reset Logic (74LS00 NAND Gates)

The NAND gates monitor Q3 and Q1. When both are HIGH (indicating count = 10 in binary, 1010), the NAND gate output goes LOW, which asynchronously clears (resets) all flip-flops back to 0000.

📝 License

This project is open-source. Feel free to use, modify, and share it for educational purposes.

👤 Author

Nirav Jain - Designed and developed as an electronics/digital logic project using KiCad EDA.

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