6 layers114 × 48 mm
Cache6400
Kelsidavis/cache-goblin
Modern reverse-engineered drop-in L2 cache card for Power Macintosh 6400/6500 — replaces the unobtanium IDT7MP6071 with an ATF1508AS CPLD + IS61C1024AL SRAMs
26 parts
4 layers114 × 48 mm
Cache6400
Kelsidavis/cache-goblinModern reverse-engineered drop-in L2 cache card for Power Macintosh 6400/6500 — replaces the unobtanium IDT7MP6071 with an ATF1508AS CPLD + IS61C1024AL SRAMs
- Size
- 114 × 48 mm
- Copper layers
- 4
- Thickness
- 1.6 mm
- Parts
- 18
- Nets
- 183
- Pads
- 582
- Tracks, vias
- 717, 97
- Routed
- Yes
- KiCad
- KiCad 7 (file 20221018)
- Created
- 2 May 2026
- Updated
- 2 May 2026
Overview
Cache6400 is an open-source printed circuit board by Kelsidavis, from the Kelsidavis/cache-goblin repository on GitHub. It is a 4-layer board of 114 × 48 mm with 18 parts on 183 nets, routed with 717 tracks and 97 vias.
Its parts include 10 ICs, 4 capacitors, 2 resistors and 2 connectors.
README
kicad/README.mdKiCad project — cache6400
Open cache6400.kicad_pro in KiCad 7 (or 8 — it will offer to upgrade).
Layout
-
cache6400.kicad_pro— project file -
symbols/cache6400.kicad_sym— custom symbol library (SRAM today; CPLD added once we lock pinning) -
symbols/cache_slot.kicad_sym— auto-generated byscripts/build_slot_symbol.pyfromdocs/pinout.csv -
scripts/build_slot_symbol.py— symbol generator. Re-run any time the pinout CSV changes:sh python3 kicad/scripts/build_slot_symbol.py
What's blocked on hardware
Schematic and PCB layout cannot start until docs/pinout.csv is filled
in. See docs/probe-protocol.md for the procedure.
Library tables
To make the custom symbols visible in this project, add to
sym-lib-table (KiCad will create it on first open):
(lib (name "cache6400")(type "KiCad")(uri "${KIPRJMOD}/symbols/cache6400.kicad_sym")(options "")(descr ""))
(lib (name "cache_slot")(type "KiCad")(uri "${KIPRJMOD}/symbols/cache_slot.kicad_sym")(options "")(descr ""))Parts
18| Qty | Value | Footprint | References |
|---|---|---|---|
| 8 | SOJ-32 | cache6400:SOJ-32_10.16x20.32mm_P1.27mm | U2, U3, U4, U5, U6, U7, U8, U9 |
| 2 | C_0603_1608Metric | Capacitor_SMD:C_0603_1608Metric | C3, C4 |
| 2 | C_0805_2012Metric | Capacitor_SMD:C_0805_2012Metric | C1, C2 |
| 2 | R_0603_1608Metric | Resistor_SMD:R_0603_1608Metric | R1, R2 |
| 1 | CACHE_SLOT_PM6400 | cache6400:CACHE_SLOT_PM6400 | J1 |
| 1 | PinHeader_2x05_P1.27mm_Vertical | Connector_PinHeader_1.27mm:PinHeader_2x05_P1.27mm_Vertical | J2 |
| 1 | TQFP-100_14x14mm_P0.5mm | Package_QFP:TQFP-100_14x14mm_P0.5mm | U1 |
| 1 | TSOP-II-44_10.16x18.41mm_P0.8mm | Package_SO:TSOP-II-44_10.16x18.41mm_P0.8mm | U10 |
Questions
How big is the Cache6400 PCB?
It measures 114 × 48 mm and has 4 copper layers, 1.6 mm thick.
What parts does the Cache6400 use?
18 parts. The full list of its parts is on this page, with links to each part's symbol and footprint where PCBKit's library has them.
Where can I download the Cache6400 KiCad files?
From the Kelsidavis/cache-goblin repository on GitHub, at the commit this page was made from: the board is kicad/cache6400.kicad_pcb and its schematic kicad-quilter/cache6400.kicad_sch. PCBKit opens the board in the browser, with nothing to install.
Can I use the Cache6400 design in my own project?
Its repository states no licence, so its author keeps all rights: ask Kelsidavis before reusing the design.
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