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4 layers70 × 70 mmCLOCK CORE, the printed circuit board in 3D

CLOCK CORE

Han-ZenX/CLOCK1

High-precision frequency meter clock generation module

Open in PCBKitView on GitHub.kicad_pcb
Size
70 × 70 mm
Copper layers
4
Thickness
1.62 mm
Parts
145
Nets
90
Pads
420
Tracks, vias
530, 152
Pours
34
Routed
Yes
KiCad
KiCad 10.0 (file 20260206)
Created
10 Aug 2026
Updated
4 Nov 2026

Overview

CLOCK CORE is an open-source printed circuit board by Han-ZenX, from the Han-ZenX/CLOCK repository on GitHub. It is a 4-layer board of 70 × 70 mm with 145 parts on 90 nets, routed with 530 tracks and 152 vias.

It is built around the LMK5B12204RGZ, REF5040ID and KH-IPEX-K501-29, with the BSMD1206C-1300T, LAIL-PHC2.54-2P-01-XH-LT and TAJB107M010RNJ among its other parts. Its parts include 59 capacitors, 47 resistors, 6 ICs, 5 diodes and 3 connectors. It belongs with the lEDs and displays boards of this library.

Main components

6

README

README.md

CLOCK - 高精度频率计后端标准时钟产生模块

专业级时间基准解决方案 | 超低相位噪声 | 高稳定度输出

License Version [blocked]

📋 项目概述

本模块是高精度频率计的后端标准时钟产生系统，为频率测量提供超稳定的时间基准信号。采用 TI 高端时钟发生器芯片 LMK5B12204 和 LMK1C1102，实现超低相位噪声和高精度的时钟输出，适用于精密测试测量、通信系统、雷达电子战等对时钟质量要求极高的应用场景。

核心特性

  • ✅ 超低相位噪声：专业级时钟性能，满足苛刻的频谱纯度要求
  • ✅ 多路可编程输出：支持 4 路独立可编程差分时钟输出（LVDS/PECL）
  • ✅ 高分辨率频率合成：支持 1Hz-3.3GHz 范围内任意频率设定
  • ✅ 参考源冗余切换：双参考输入 + 自动切换，确保时钟连续性
  • ✅ 低抖动性能：<0.2ps RMS 抖动，提供精准时序基准
  • ✅ EEPROM 存储：配置断电保存，上电自启动
  • ✅ 硬件级稳定性：工业级设计，宽温工作范围

🔧 技术规格

时钟输出性能

参数指标
输出通道数4 路独立可编程
输出类型LVDS / PECL / CML 差分
频率范围1MHz ~ 1.25GHz (每路独立)
相位噪声< -110dBc @ 1kHz (100MHz 输出)
均方根抖动< 0.2ps (12kHz-20MHz 积分)
输出幅度800mVp-p 差分 (典型)
输出阻抗50Ω 匹配

参考输入

参数指标
主参考输入10MHz 正弦/CMOS 可选
备参考输入10MHz 或 1PPS 可选
参考切换自动故障检测与无缝切换
1PPS 对齐支持秒脉冲同步对齐

电源要求

  • 核心电压：3.3V ±5%
  • 功耗：典型 1.2W
  • 电源抑制比：>60dB

🏗️ 系统架构

text
┌─────────────────────────────────────────────────────────────┐
│                    CLOCK 时钟产生模块                        │
├─────────────────────────────────────────────────────────────┤
│                                                               │
│   ┌──────────┐    ┌──────────┐    ┌──────────┐              │
│   │  Ref 1   │    │  Ref 2   │    │  1PPS    │              │
│   │ 10MHz    │    │ 10MHz/   │    │  Pulse   │              │
│   │ 正弦     │    │ PPS      │    │          │              │
│   └────┬─────┘    └────┬─────┘    └────┬─────┘              │
│        │               │                │                   │
│        └───────────────┼────────────────┘                   │
│                        ▼                                    │
│                 ┌───────────────┐                           │
│                 │   LMK5B12204  │  ┌────────────┐          │
│                 │  时钟生成器   │  │            │          │
│                 │  (Main PLL)   │→ │ Out0:100MHz│ LVDS     │
│                 │               │  │            │          │
│                 │               │→ │ Out1:10MHz │ LVDS     │
│                 │               │  │            │          │
│                 │               │→ │ Out2:10MHz │ LVDS     │
│                 │               │  │            │          │
│                 │               │→ │ Out3:1PPS  │ CMOS     │
│                 └───────────────┘  └────────────┘           │
│                        ▲                                      │

关键组件

器件制造商功能描述
LMK5B12204Texas Instruments高性能时钟生成器，内置 4 个超低噪声 PLL
LMK1C1102Texas Instruments低抖动时钟分配器，提供辅助时钟路径
SMA 连接器AmphenolRF 输入输出接口，50Ω 匹配
EEPROMAtmel非易失性配置存储

📁 目录结构

text
CLOCK-master/
├── firmware/              # 嵌入式固件代码
│   ├── src/
│   │   ├── app/           # 应用层：时钟控制逻辑、状态机
│   │   ├── hal/           # 硬件抽象层：GPIO、I²C、定时器
│   │   ├── drivers/       # 驱动层：LMK5B 寄存器配置
│   │   └── services/      # 服务层：I²C 通信、EEPROM 访问
│   ├── boards/            # 板级配置
│   └── CMakeLists.txt     # CMake 构建配置
├── hardware/              # 硬件设计文件
│   ├── schematic/         # KiCad 原理图
│   │   └── v1.0/
│   │       ├── CLOCK.kicad_sch
│   │       ├── CLOCK.kicad_pcb
│   │       └── ...
│   ├── bom/               # BOM 物料清单
│   ├── gerber/            # PCB 生产文件
│   └── pinout/pinout.md   # 引脚分配说明
├── software/              # 配套软件（可选）
│   ├── desktop/           # PC 配置工具
│   └── mobile/            # 移动端 App
├── docs/                  # 项目文档
│   ├── architecture/      # 架构设计文档
│   ├── user-guide/        # 用户使用手册

🛠️ 快速开始

环境要求

  • 编译工具链：ARM GCC Toolchain (arm-none-eabi-gcc)
  • 构建系统：CMake 3.16+
  • 硬件调试器：JLink / STLink
  • 操作系统：Windows 10+ / Linux / macOS

构建固件

bash
# 克隆仓库
git clone https://github.com/your-repo/CLOCK.git
cd CLOCK

# 创建构建目录
mkdir build && cd build

# 配置项目
cmake .. -DBOARD=default

# 编译 Debug 版本
cmake --build .

# 编译 Release 版本（优化）
cmake --build . --config Release

或使用自动化脚本：

bash
python tools/scripts/build.py --board=default          # Debug 构建
python tools/scripts/build.py --board=v2.0 --release   # Release 构建
python tools/scripts/build.py --flash                  # 构建并烧录

烧录固件

bash
# JLink 烧录
JLinkExe -device STM32F4xx -interface swd -speed 4000 -fc 4 -commandER -exitafter1sec firmware/build/app.hex

# 或通过 IDE 烧录

📖 使用说明

1. 硬件连接

  1. 连接外部 10MHz 参考源到 J1 (REF_IN) SMA 接口
  2. 可选：连接备用参考源到 REF_BIST 接口
  3. 连接电源至 VDD_3V3 (3.3V, 最大 500mA)
  4. 观测输出：
    • J2: OUT0 - 100MHz 主时钟
    • J3: OUT1 - 10MHz 分频时钟
    • J4: OUT2 - 可配置频率
    • J5: OUT3 - 1PPS 秒脉冲

2. 默认配置

上电后，模块将加载 EEPROM 中保存的配置：

  • OUT0: 100MHz LVDS 差分输出
  • OUT1: 10MHz LVDS 差分输出
  • OUT2: 10MHz LVDS 差分输出
  • OUT3: 1PPS 正方形波输出（上升沿对齐 UTC 时间）

3. 配置时钟参数

通过串口命令或 I²C 接口修改时钟参数：

bash
# 示例：使用串口终端配置
echo "SET_FREQ OUT0 200MHz" > /dev/ttyUSB0    # 设置 OUT0 为 200MHz
echo "SET_FMT OUT1 LVDS" > /dev/ttyUSB0       # 设置 OUT1 格式为 LVDS
echo "SAVE_CONFIG" > /dev/ttyUSB0             # 保存配置到 EEPROM

详细命令集请参考 API 文档.

🔬 性能验证

相位噪声测试

在 100MHz 输出端口测得的典型相位噪声：

偏移频率相位噪声 (dBc/Hz)
100 Hz-95
1 kHz-110
10 kHz-125
100 kHz-135
1 MHz-145
10 MHz-150

抖动测试

使用示波器测得 RMS 抖动：0.15ps (12kHz-20MHz 带宽)

频率稳定度

  • 短期稳定度 (ADEV @ 1s): 2×10⁻¹²
  • 长期稳定度 (±0.5ppm/年，配合 TCXO 参考)

🧪 测试运行

bash
# 运行单元测试
ctest --output-on-failure

# 运行集成测试（需要硬件）
python tests/integration/run_hwt_tests.py --board=default

📚 参考资料

🛡️ 许可证

本项目采用 MIT License。详见 LICENSE 文件。

🤝 贡献指南

欢迎提交 Bug Report 和功能请求！

  1. Fork 本仓库
  2. 创建特性分支 (git checkout -b feat/AmazingFeature)
  3. 提交更改 (git commit -m 'Add some AmazingFeature')
  4. 推送到分支 (git push origin feat/AmazingFeature)
  5. 开启 Pull Request

📞 联系方式

如有技术问题或合作意向，请联系：

⚠️ 免责声明

本模块为专业级测试设备，仅供研发和技术人员使用。使用者需具备以下能力：

  • 熟悉射频电路设计和测试仪器操作
  • 理解时钟完整性、EMC/EMI 相关规范
  • 遵守实验室安全操作规程

作者不对因不当使用导致的设备损坏或人身伤害承担责任。

© 2026 CLOCK 项目团队。保留所有权利。

基于 Texas Instruments LMK5B12204 + LMK1C1102 专业时钟芯片方案开发

🎯 为高精度频率测量提供黄金时间基准 🎯

Parts

145
QtyValueFootprintReferences
34100nFCLOCK_CORE:C_0402_1005MetricC1, C2, C3, C10, C11, C13, C15, C19, C21, C26, C31, C32, C34, C35, C37, C38 +18
120CLOCK_CORE:R_0402_1005MetricR24, R31, R32, R33, R34, R35, R36, R37, R38, R40, R41, R53
10KH-IPEX-K501-29CLOCK_CORE:KH-IPEX-K501-29RF1, RF2, RF3, RF4, RF5, RF6, RF7, RF8, RF9, RF10
910uFCLOCK_CORE:C_0402_1005MetricC27, C28, C29, C33, C36, C39, C42, C47, C50
849.9CLOCK_CORE:R_0402_1005MetricR1, R2, R4, R5, R7, R8, R10, R11
7220 ohm@100mhzCLOCK_CORE:L_0603_1608MetricFB1, FB2, FB3, FB4, FB5, FB6, FB7
510uFCLOCK_CORE:C_0603_1608MetricC12, C14, C18, C56, C58
5LEDCLOCK_CORE:LED_0603_1608MetricD1, D2, D3, D4, D5
4100CLOCK_CORE:R_0402_1005MetricR3, R6, R9, R12
422uFCLOCK_CORE:C_0805_2012MetricC16, C17, C23, C24
4MountingHole_PadCLOCK_CORE:MountingHole_3.2mm_M3_PadH2, H3, H4, H5
32.2KCLOCK_CORE:R_0402_1005MetricR42, R43, R46
20CLOCK_CORE:R_0805_2012MetricR19, R20
2100KCLOCK_CORE:R_0402_1005MetricR18, R23
210nFCLOCK_CORE:C_0402_1005MetricC20, C25
212.1KCLOCK_CORE:R_0402_1005MetricR16, R21
21KCLOCK_CORE:R_0402_1005MetricR13, R14
21uFCLOCK_CORE:C_0402_1005MetricC41, C44
23.83KCLOCK_CORE:R_0402_1005MetricR17, R22
24.7KCLOCK_CORE:R_0603_1608MetricR26, R27
2499CLOCK_CORE:R_0402_1005MetricR51, R52
2TPS7A5201RPSRCLOCK_CORE:TPS7A5201RPSRU3, U4
10RCLOCK_CORE:R_0805_2012MetricR39
10RCLOCK_CORE:R_0603_1608MetricR29
10RCLOCK_CORE:R_0402_1005MetricR30
110KCLOCK_CORE:R_0603_1608MetricR25
110RCLOCK_CORE:R_0603_1608MetricR28
11uFCLOCK_CORE:C_0603_1608MetricC57
13296W-1-103_C48997937CLOCK_CORE:3296W-1-103_C48997937R15
1470nFCLOCK_CORE:C_0402_1005MetricC30
1BSMD1206C-1300TCLOCK_CORE:BSMD1206C-1300TF1
1Conn_01x04_SocketCLOCK_CORE:PinHeader_1x04_P2.54mm_VerticalJ3
1Conn_CoaxialCLOCK_CORE:SMA_Amphenol_132134-11_VerticalJ1
1HX_PH254-01-03-Z-L11_5_PCB_PIN_HEADERCLOCK_CORE:HX_PH254-01-03-Z-L11_5_PCB_PIN_HEADERH1
1LAIL-PHC2_54-2P-01-XH-LCLOCK_CORE:LAIL-PHC2_54-2P-01-XH-LCN1
1LMK5B12204CLOCK_CORE:VQFN-48-1EP_7x7mm_P0.5mm_EP5.15x5.15mm_ThermalViasU5
1OCXO_20x20mmCLOCK_CORE:OCXO_20x20mmU1
1OCXO_25.4x25.4mmCLOCK_CORE:DOPFITKR2-10MU2
1REF5040CLOCK_CORE:REF5040U6
1TAJB107M010RNJCLOCK_CORE:TAJB107M010RNJC22
1TestPointCLOCK_CORE:TestPoint_Pad_D1.0mmTP2
1Volt TestPointCLOCK_CORE:TestPoint_Pad_D1.0mmTP1

Questions

How big is the CLOCK CORE PCB?

It measures 70 × 70 mm and has 4 copper layers, 1.62 mm thick.

What parts does the CLOCK CORE use?

145 parts, built around the LMK5B12204RGZ, REF5040ID, KH-IPEX-K501-29 and BSMD1206C-1300T. The full list of its parts is on this page, with links to each part's symbol and footprint where PCBKit's library has them.

Where can I download the CLOCK CORE KiCad files?

From the Han-ZenX/CLOCK repository on GitHub, at the commit this page was made from: the board is hardware/schematic/v1.0/CLOCK_CORE/CLOCK_CORE.kicad_pcb and its schematic hardware/schematic/v1.0/CLOCK/CLOCK.kicad_sch. PCBKit opens the board in the browser, with nothing to install.

Can I use the CLOCK CORE design in my own project?

Its repository states no licence, so its author keeps all rights: ask Han-ZenX before reusing the design.

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