Usb hub

USB-HUB KiCad Packet

This directory is the schematic/layout starting point for the active hub accessory lane.

The packet now includes a first routed board-source pass. It is still a first board, not measured hardware evidence: connector strain, host clearance, and enclosure fit must be validated before the lane moves to secondary variants.

Current Source Files

• usb_hub.kicad_sch — root sheet for the active hub lane
• sheets/usb_and_power.kicad_sch
• sheets/mcu_radio.kicad_sch
• sheets/controls_and_indicators.kicad_sch
• usb_hub.kicad_pcb — stepped USB-A direct-plug first-board pass
• usb_hub.kicad_pro — local KiCad project settings for this packet
• sym-lib-table — local project symbol table for KiCad CLI/library checks
• PowerFinger.kicad_sym — local hub-specific first-board symbols
• fp-lib-table — local project footprint table for KiCad CLI/library checks
• PowerFinger_USB.pretty/ — local footprint library for the direct-plug USB-A connector, first-board ESP32-S3 module land pattern, service pads, clamp holes, and packet-pinned commodity footprints
• FABRICATION-OUTPUTS.md — checked-in note for regenerating and reviewing the local Gerber, drill, POS, active-BOM/POS, and archive outputs
• BOARD-HOUSE-OUTPUT-CONSTRAINTS.md — board-house intake questions tied to the current generated-output state

What Belongs Here Next

• INTERFACE-CONTRACT.md — first-pass native USB and recovery-pin contract
• BRINGUP-SERVICE-MATRIX.md — mandatory recovery access and first-board checks
• CAPTURE-BINDINGS.md — which active BOM lines need stock, vendor, or custom binding
• P0-COMPONENT-LOCKS.md — exact first-board USB and power parts for the active dongle lane
• SCHEMATIC-CAPTURE.md — sheet split, net naming, and capture order
• BOM-BLOCK-MAP.md — map the BOM into the first hub schematic
• RECOMMENDED-FIRST-CAPTURE.md — the recommended first board scope
• ../FIRST-BOARD-CHECKLIST.md — the execution checklist that decides when this packet is allowed to move on to secondary variants

Capture Order

1. Native USB path and VBUS_5V entry from the connector
2. RT9080-33GJ5 5V-to-3.3V regulation, decoupling, and connector-side protection
3. Boot/reset and bring-up access
4. Status LED and any test pads

First Board Reality

• The current PCB outline is stepped: the USB-A nose carries the SOFNG USB-05 shell-tab pads and widens to a 54 x 26 mm module/service body behind the plug. That is more honest than the earlier placeholder, but adjacent-port host clearance is now an explicit mechanical risk to verify.
• R1 is resolved as two 22R 0402 resistors (R1A, R1B) placed at the ESP32-S3 side of the native USB pair. C5 / C6 remain unconnected no-BOM 0402 mechanical placeholders in this pass; shunt capacitors are not part of the clean first-board routing until SI evidence calls for them.
• U1 is rotated so the ESP32-S3 antenna keep-out lands at the rear of the dongle, away from the USB shell and away from service pads.
• SW1 is a pad-actuated BOOT_N service path for this pass; EN, BOOT_N, UART0, power, and ground pads remain probeable along the reopenable seam. USB data continuity is inspected at trace/connector access points rather than dedicated connected USB data service pads in this pass. TP6-TP9 are now explicit no-BOM schematic service pads matching the routed board footprints.
• The schematic now carries the routed board's common ground, EN RC support, status LED path, and local decoupling instead of leaving those as PCB-only drift. The USB shell tabs and ESP32-S3 module ground pads are now explicit schematic pins tied to ground, and PCB footprint metadata matches the locked schematic fields. KiCad CLI verification is active on this packet: the current schematic ERC and PCB DRC pass at error severity with local symbol and footprint libraries loaded, the all-severity schematic ERC reports 0 messages, and the all-severity PCB DRC pass is clean with 0 unconnected items and 0 schematic parity issues. usb_hub.kicad_pro intentionally ignores lib_footprint_mismatch because the first-board footprints are now source-controlled in PowerFinger_USB.pretty/; the remaining blockers are measured hardware evidence, not KiCad ERC/DRC drift.
• Local fabrication-review outputs are generated by scripts/generate-usb-hub-fabrication-review.py under build-kicad/USB-HUB/fabrication-review/. FABRICATION-OUTPUTS.md records the current output hashes and the active-BOM/POS review status; those outputs are reproducible review artifacts, not source-controlled fabrication release proof.

Hard Constraints

• Native USB is load-bearing for the hub. Do not insert an unnecessary USB-UART bridge into the normal data path.
• Treat PLACEMENT-CONSTRAINTS.md as a blocker list.
• Connector mechanical support matters as much as the schematic.
• VREG_3V3 must be generated by the captured board power tree, not borrowed from a hidden dev-board assumption.
• The current P0 path locks J1, U2, and D1; those exact parts are now represented in schematic and PCB source.
• usb_and_power.kicad_sch now contains the locked USB/power symbols plus the R1A / R1B 22R native-USB decision.
• The first PCB source captures connector reinforcement geometry, but that is not a substitute for the retention evidence in ../CONNECTOR-RETENTION-VERIFY.md.
• Close ../FIRST-BOARD-CHECKLIST.md and ../CONNECTOR-RETENTION-VERIFY.md before treating this lane as hardware-ready.