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6 layers172 × 100 mmTestrack carrier, the printed circuit board in 3D

Testrack carrier

esden/redcuttle9

Moved to Codeberg

Size
172 × 100 mm
Copper layers
6
Thickness
1.6 mm
Parts
117
Nets
248
Pads
1,264
Tracks, vias
2,433, 1,171
Pours
30
Routed
Yes
KiCad
KiCad 8.0 (file 20240108)
Created
17 Jul 2022
Updated
19 Jan 2025

Overview

Testrack carrier is an open-source printed circuit board by esden, from the esden/redcuttle repository on GitHub. It is a 6-layer board of 172 × 100 mm with 117 parts on 248 nets, routed with 2,433 tracks and 1,171 vias.

It is built around the STM32G071CBU3, SN74LV1T34DBV and SN74CB3Q3251PW, with the RT9193-33GB, SK6805E-J and MAX4999ETJ among its other parts. Its parts include 47 capacitors, 32 ICs, 11 connectors, 10 diodes and 1 resistor. It belongs with the interfaces and adapters boards and the STM32 boards of this library.

Main components

6

README

README.md

Welcome to RedCuttle.

This project is the hardware and software for a JTAG/SWD/UART port multiplexer and switcher.

This hardware allows the control of multiple debuggers and targets to be connected to one another for development and testing purposes. The original motivation for this is the Hardware In The Loop testing of the Black Magic Debug firmware on Black Magic Probe hardware.

Parts

117
QtyValueFootprintReferences
45100nFmisc.IntLib:0402C1, C2, C3_MUX_GPIO0, C3_MUX_GPIO1, C3_MUX_GPIO2, C10, C11, C12, C13, C14, C15, C16, C17, C18, C19, C20 +29
21SN74CB3Q3251misc.IntLib:TI_RGYU3_MUX_GPIO0, U3_MUX_GPIO1, U3_MUX_GPIO2, U3_MUX_GPIO3, U3_MUX_GPIO4, U3_MUX_GPIO5, U3_MUX_GPIO6, U3_MUX_GPIO7, U3_MUX_JTCK, U3_MUX_JTDI, U3_MUX_JTDO, U3_MUX_JTMS, U3_MUX_MGMT_SCL, U3_MUX_MGMT_SDA, U3_MUX_NRST, U3_MUX_TRACECLK +5
10Lightpipemisc.IntLib:SLP3-150-100-FLP1, LP2, LP3, LP4, LP5, LP6, LP7, LP8, LP9, LP10
10SK6805misc.IntLib:EC15LED1, LED2, LED3, LED4, LED5, LED6, LED7, LED8, LED9, LED10
8LSW_FLGmisc.IntLib:SOT23-5U1_TARGET1, U1_TARGET2, U1_TARGET3, U1_TARGET4, U1_TARGET5, U1_TARGET6, U1_TARGET7, U1_TARGET8
8M.2_Bmisc.IntLib:M.2_BP2_TARGET1, P2_TARGET2, P2_TARGET3, P2_TARGET4, P2_TARGET5, P2_TARGET6, P2_TARGET7, P2_TARGET8
4Mounting_Holemisc.IntLib:WA-SMSI_M2.5MH1, MH2, MH3, MH4
2,
222uFmisc.IntLib:0805C7, C8
110kmisc.IntLib:0402R1
1MAX4999misc.IntLib:MAXIM_T3255+4P4
1PCIE_X1misc.IntLib:PCIE_X1_EDGEP1
1RT9193-33misc.IntLib:SOT23-5U5
1SN74LV1T34misc.IntLib:SOT23-5U4
1STM32G071CBUmisc.IntLib:QFN50P690X710X60_HS-49NU2
1SWD-TC2030misc.IntLib:TC2030-NLP3

Questions

How big is the Testrack carrier PCB?

It measures 172 × 100 mm and has 6 copper layers, 1.6 mm thick.

What parts does the Testrack carrier use?

117 parts, built around the STM32G071CBU3, SN74LV1T34DBV, SN74CB3Q3251PW and RT9193-33GB. The full list of its parts is on this page, with links to each part's symbol and footprint where PCBKit's library has them.

Where can I download the Testrack carrier KiCad files?

From the esden/redcuttle repository on GitHub, at the commit this page was made from: the board is altium_import/testrack_carrier/testrack_carrier.kicad_pcb and its schematic altium_import/testrack_backplane_passive_5u/slot.kicad_sch. PCBKit opens the board in the browser, with nothing to install.

Can I use the Testrack carrier design in my own project?

Its repository states no licence, so its author keeps all rights: ask esden before reusing the design.

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6

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