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2 layers60 × 40 mmMicrosd spi adapter, the printed circuit board in 3D

Microsd spi adapter

embedrapp/deepee2

Open benchmark for evaluating AI agents on embedded firmware, code repair, schematics, and PCB engineering

Size
60 × 40 mm
Copper layers
2
Thickness
1.6 mm
Parts
7
Nets
8
Pads
25
Tracks, vias
8, 0
Routed
Yes
KiCad
KiCad 10.0 (file 20240108)
Created
17 Aug 2026
Updated
22 Oct 2026

Overview

Microsd spi adapter is an open-source printed circuit board by embedrapp, from the embedrapp/deepee repository on GitHub, published under the MIT licence. It is a 2-layer board of 60 × 40 mm with 7 parts on 8 nets, routed with 8 tracks and 0 vias.

Its parts include 3 resistors, 2 capacitors and 2 connectors. It belongs with the interfaces and adapters boards of this library.

README

README.md

DeepEE

DeepEE is a small benchmark for AI agents doing embedded firmware and KiCad engineering. An agent receives a prompt plus starter files, edits a fresh working directory, and submits ordinary source files. An offline verifier checks the result. Conversation quality and screenshots do not count.

Scope

Version 1.2 has 48 tasks: 12 in each engineering category.

CategoryTask IDsTopicsPass gate
Firmwaredeepee-fw-001–012I²C recovery; SHT3x, BME280, MCP9808, INA219, BMP280, ADS1115, DS18B20, SCD4x, PCA9685, and MAX31855 drivers; Modbus CRCProtected API + native C tests + PlatformIO build
Code repairdeepee-repair-001–012Scheduler rollover, ring buffers, ADC scaling, SLIP, MQTT, UTF-8, CBOR, PPP FCS, HTTP chunks, Base64, Modbus CRC, and wrap-safe tick timingProtected API + native C tests
Schematicsdeepee-sch-001–012Power-input repair, MCP9808, INA219, ADS1115, BMP280, AP2112, USB-C sink, RS-485, CAN, I²C level shifting, microSD, and NE555Exact component/pin-net contract + exported netlist + ERC
PCBdeepee-pcb-001–012nRF24L01, MCP9808, and the same ten researched interface circuits used by the schematic setExact footprint/pad/outline contract + fully routed nets + DRC

The tasks are compact adaptations of real bug reports, open-source boards, official KiCad QA material, and published breakout use cases. Provenance is recorded in each task's SOURCE.md and summarized in docs/TASK_SOURCES.md.

The evaluation contract and its limits are documented in docs/VALIDATION_MODEL.md. Contributions must follow CONTRIBUTING.md, including the known-good and mutant release gates.

What is verified

Every task declares public, machine-readable critical requirements. A task score remains binary:

text
all checks pass -> 1
anything fails  -> 0

The primary aggregate is Pass@1: the fraction of tasks passed on an agent's first publishable attempt. Score files also contain each requirement outcome, its engineering layer, leaf evidence, a layer-level score vector, and a stable decision hash. A strong result in one layer cannot mask a failed critical requirement in another.

The verifier checks required parts and pin/pad nets without comparing an entire design to golden geometry. KiCad performs the final ERC/DRC gate. PCB contracts additionally measure declared physical constraints directly from native copper: all named nets use at least 0.25 mm track width, and the USB-C repair constrains routed D+/D− skew to 1.0 mm. The release gate runs a targeted mutant for every critical requirement and must reject all of them.

This is deliberately a KiCad-native benchmark, not a tool-agnostic EDA benchmark. An AI system may be compared if it can produce the required native KiCad 10 artifacts. Altium- or EasyEDA-only outputs are out of scope because silently converting them would weaken the assurance and make the comparison misleading.

Firmware is verified by native behavioral tests and a real target build. Version 1.2 does not claim runtime peripheral, analog, thermal, EMI, or fabrication signoff; those require suitable simulation or hardware-in-the-loop fixtures and are excluded from task claims.

Lightweight local preparation

No VM, Colima instance, Docker image, KiCad install, or PlatformIO install is needed on the development laptop. The repository checks use Python and a host C compiler only:

bash
python3 -m venv .venv
. .venv/bin/activate
pip install -e .
make test

The Dockerfiles and scripts are deployment material for a later x86_64 Ubuntu EC2 run. They are not started by the commands above.

EC2 execution

On an Ubuntu 24.04 x86_64 host:

bash
./scripts/bootstrap-ec2-ubuntu.sh
# Log out and back in once for Docker group membership.
export CODEX_API_KEY='...'
./scripts/run-ec2-baseline.sh --all-tasks

For a ChatGPT subscription-authenticated Codex run, complete codex login --device-auth on the host and use ./scripts/run-ec2-chatgpt-baseline.sh instead.

The deployment builds separate deepee-agent:1.2.0 and deepee-verifier:1.2.0 images. The agent image has KiCad 10.0.4, PlatformIO 6.1.19, compilers, and Codex but no benchmark tasks or verifier code. Agent runs use an internal-only Docker network and one explicit CONNECT-proxy profile: API-key runs permit api.openai.com:443, while ChatGPT-subscription runs additionally permit auth.openai.com:443 and chatgpt.com:443. Both profiles block every other authority and direct internet egress, and the effective profile and allowlist are recorded in the run. Verification runs without any network or agent credentials. Before a baseline starts, the Ubuntu host also proves one private reference submission for every task against that same verifier image. See docs/EC2.md and docs/RUN_PROTOCOL.md.

For a manual external agent that uses KiCad:

bash
deepee benchmark \
  --agent agents/manual-kicad.yaml \
  --task deepee-pcb-001 \
  --prepare-only

deepee verify \
  --container-image deepee-verifier:1.2.0 \
  --task deepee-pcb-001 \
  --run-dir '<printed-run-directory>' \
  --output results/scored/external-pcb-run.json

Manual/external runs record their authoring egress as external_uncontrolled; DeepEE still applies the same offline verifier and never mislabels that external environment as proxy-isolated.

DeepEE's original code and fixtures are MIT licensed. The KiCad-derived schematic starter identified in THIRD_PARTY_NOTICES.md retains its GPLv3 license. Compare leaderboard results only when the benchmark and task hashes match.

Parts

7
QtyValueFootprintReferences
347kResistor_SMD:R_0603_1608MetricR1, R2, R3
1100nFCapacitor_SMD:C_0603_1608MetricC1
110uFCapacitor_SMD:C_0805_2012MetricC2
1Conn_01x06Connector_PinHeader_2.54mm:PinHeader_1x06_P2.54mm_VerticalJ2
1Micro_SD_CardConnector_Card:microSD_HC_Hirose_DM3AT-SF-PEJM5J1

Questions

How big is the Microsd spi adapter PCB?

It measures 60 × 40 mm and has 2 copper layers, 1.6 mm thick.

What parts does the Microsd spi adapter use?

7 parts. The full list of its parts is on this page, with links to each part's symbol and footprint where PCBKit's library has them.

Where can I download the Microsd spi adapter KiCad files?

From the embedrapp/deepee repository on GitHub, at the commit this page was made from: the board is validation/solutions/deepee-pcb-011/artifacts/microsd-spi-adapter.kicad_pcb. PCBKit opens the board in the browser, with nothing to install.

Can I use the Microsd spi adapter design in my own project?

Its repository publishes it under the MIT licence: you may reuse it on that licence's terms (keep the author's notice, and for a copyleft licence share your changes alike).

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