EDL TUE20

1. Purpose of the PCB

The primary purpose of this PCB is to convert a standard 5V/2A USB-C input into three stable, digitally controlled output rails:

1. Variable Positive Rail: 0V to 12V (Single Supply).
2. Dual Tracking Rails: ±12V to ±15V (Dual Supply for Op-Amp biasing).

2. Major Functional Blocks

A. Power Regulation (Boost & Inverting)

• Positive Boost Stage (TPS63700): Efficiently steps up the 5V USB input to the positive rail. It utilizes high-frequency switching to maintain a compact footprint.
• Inverting Buck-Boost Stage (MC34063ADG): Responsible for generating the negative voltage rail. It is configured in an inverting topology to provide the necessary -12V to -15V output.

B. Digital Interface & Feedback

• Digital Potentiometer (MCP4162): Replaces the standard analog feedback resistor. This 10kΩ/100kΩ SPI-controlled wiper allows the STM32 MCU to adjust the output voltage programmatically.
• Microcontroller Interface: Header pins are provided to interface with the STM32F103 control board for SPI communication, ADC voltage monitoring, and Ground reference syncing.

C. Filtering and I/O

• Output Filtering: Low-ESR electrolytic capacitors combined with ceramic bypass capacitors ($100\text{nF}$) are placed close to the regulator outputs to minimize switching ripple.
• Connectors: Screw terminals for final power output and a USB-C breakout for the main 5V input.

3. Detailed Sub-Circuit Analysis

4. Known Issues & Workarounds

0V - 5V Regulation Limitation

• Issue: The supply cannot currently regulate below 5V (specifically the 0-1.25V range).
• Root Cause: The switching regulators (TPS63700/MC34063) have an internal reference voltage ($V_{ref} \approx 1.21\text{V} - 1.25\text{V}$). The output cannot go below this $V_{ref}$ in a standard feedback configuration.
• Workaround: For the current prototype, users should utilize the range from $V_{ref}$ to 12V. Future iterations will include an Op-Amp level shifter in the feedback loop to allow 0V-target regulation.

Switching Noise

• Issue: High-frequency ripple ($\approx 100\text{mV}$) observed on the negative rail.
• Root Cause: High ESR in generic capacitors and tight trace spacing between power and feedback lines.
• Workaround: Implemented software-side ADC averaging (Moving Average Filter) to prevent display jitter. High-quality Tantalum capacitors are recommended for future builds.