Iwand

iWand Electrical

KiCad schematic for the iWand color-identifying wand (Seeed XIAO ESP32S3 + GY-33 color sensor + DFPlayer Mini + AO3400 power gating). See firmware/CLAUDE.md for how the pin assignments here map to the firmware.

Dependencies

• KiCad 7.0 or newer (developed with KiCad 10). The schematic (iwand.kicad_sch) is in the KiCad 7 s-expression format (version 20230121). Older KiCad versions won't open it.

The module symbols (wand_parts:XIAO_ESP32S3, wand_parts:DFPlayer_Mini) are embedded directly in iwand.kicad_sch, so there's no external symbol library to install. ERC warns that the wand_parts library isn't configured and that Device:Q_NMOS_GDS is missing from KiCad's current Device library. Both warnings are harmless, because the embedded copies are used.

Footprints

Project footprints live in iwand.pretty, registered through the project's fp-lib-table as iwand:

Everything else is stock KiCad:

• DIN0207 through-hole resistors, lying flat
• a 3 mm disc capacitor
• a C&K OS102011MA1QN1-style right-angle slide switch
• JST-PH side-entry sockets (J1-J4)
• a JST-PH top-entry socket (J5, B2B-PH-K). It takes the same PHR-2 plug as J1-J4, but a side-entry one doesn't fit between Q2 and SW2.

Board

The board is 75.9 x 22 mm, laid out as a "spine" along the wand. From the rear:

• J4 battery, J2 speaker and J3 button plugs, facing the rear
• the XIAO, with USB-C over the lower long edge; R1-R6 lie flat underneath it
• Q1/Q2 with J5, SW2 and C1
• the DFPlayer
• J1, facing forward to the GY-33

The module sockets are 3M 929870 low-profile strips, 3.8 mm tall, bought as 10-pin strips and cut to length. In them, the XIAO sits about 6.3 mm up (3.8 mm socket + 2.5 mm pin spacer). Its courtyard therefore covers only its socket strips and USB plug, so parts up to about 5 mm tall can go underneath.

For the 3D view:

• Sockets: 3M's STEP model is a 10-pin strip, so the view uses KiCad's 1x7/1x8 socket models scaled to 3.8 mm instead.
• XIAO: Seeed's STEP file (in 3dmodels/), drawn 6.3 mm up. The pin spacer under it isn't modelled.
• DFPlayer: DFRobot's DFR0299 STEP file (in 3dmodels/, drawn in inches, Y-up). It includes the module's own pin header, with its spacer resting on the socket top. Its microSD slot opens toward the front of the board, facing J1.

Do a dry fit before soldering. A standard 6 mm male pin may bottom out in a 3.8 mm socket and ride slightly higher than 6.3 mm.

Mounting and off-board parts

• U1 and U3 plug into female header sockets so they stay removable. Q1/Q2 are AO3400s already soldered to SOT-23 adapter boards, which are mounted flat on their pins.
• The GY-33, speaker, wake button and battery sit off the board on JST-PH connectors:
  • J1 (GY-33): a 4-wire pigtail soldered into the sensor's GND/DR/CT/VCC holes, in that order.
  • J2: speaker.
  • J3: wake button.
  • J4: LiPo.
• JST battery polarity isn't standardised. Check each battery against the board's +/- marks before plugging it in. They're on the front, between J4 and the XIAO socket, and on the back next to BAT.
  • J4 puts + on pin 1, which is the reverse of most LiPo plugs (black/GND on the left). Such a battery needs the two crimps swapped in its JST housing.
  • Boards fabricated before the back-side marks were added only have the small front marks, which the J4 housing hides.
• The XIAO's battery pads are on its underside, not on its headers. J5 takes a short JST-PH pigtail soldered to those BAT+/BAT- pads (pin 1 = BAT+) so the XIAO can run from, and charge, the battery on J4.

Power and charging

• The battery stays in the wand and charges through the XIAO's USB-C (about 100 mA).
• SW2 is the power switch, in the battery + lead (J4 → SW2 → VBAT). Off disconnects everything, including the charger, so the battery only charges with SW2 on.
• The XIAO's charge LED sits next to its USB-C port, so the enclosure needs a window or light pipe there.
• R5/R6 (1M each) divide VBAT by 2 into D10, which is an ADC input. C1 (100 nF) steadies the reading. The divider draws about 2 µA, and nothing when SW2 is off.

Routing and fabrication

• Stack-up: 2 layers, 1.6 mm. Rules: 0.2 mm clearance, 0.5 mm copper to edge. Every connection is routed. DRC and the schematic parity check pass with no errors.
• Net classes:
  • Default: 0.25 mm tracks, 0.6/0.3 mm vias.
  • Power: 0.5 mm tracks, 0.8/0.4 mm vias. Covers VBAT, BAT_IN, GND, SPK1/SPK2, AUDIO_GND and SENSOR_GND. Branches to R5/R6/C1 and the gate resistors use 0.25 mm, since they carry almost no current.
• Module socket pads: 1.6 mm, so a 0.25 mm track can pass between two 2.54 mm-pitch pins.
• Ground: GND pours on both layers, tied together by stitching vias.
• Fab files: fab/iwand-gerbers.zip (copper, mask, silkscreen, edge cuts, and plated and non-plated drill files). Regenerate it with KiCad's Fabrication Outputs, or with kicad-cli pcb export gerbers / export drill, after any board change.