Skip to the content
PCBKitNew board
4 layers54 × 50 mmReworkctf v2, the printed circuit board in 3D

This is a points-based challenge board intended for practicing of PCB rework and circuit editing skills. This is not a circuit debug challenge.

Size
54 × 50 mm
Copper layers
4
Thickness
1.6 mm
Parts
131
Nets
252
Pads
572
Tracks, vias
1,050, 215
Pours
4
Routed
Yes
KiCad
KiCad 9.0 (file 20241229)
Created
23 May 2017
Updated
3 Apr 2026

Overview

Reworkctf v2 is an open-source printed circuit board by azonenberg, from the azonenberg/reworkctf repository on GitHub, published under the BSD-3-Clause licence. It is a 4-layer board of 54 × 50 mm with 131 parts on 252 nets, routed with 1,050 tracks and 215 vias.

It is built around the STM32H750XBH6, ECS-1612MV-250-CN-TR and MI0603J601R-10. Its parts include 53 resistors, 33 capacitors, 17 connectors, 16 diodes and 4 ICs. It belongs with the STM32 boards of this library.

Main components

3

README

README.md

reworkctf

What is it?

This is a points-based challenge board intended for practicing of PCB rework and circuit editing skills. This is not a circuit debug challenge. The defect for each stage is well documented, your task is to correct it so that the circuit functions properly.

This is also not a learn-to-solder kit. If you're not comfortable populating boards with 0402 passives and larger pitch (0.8mm) BGAs, this is probably not a project you want to undertake until you have the basics down first.

That said, the challenges range from very easy to fairly difficult, so it's totally fine to try some of them then put the board on a shelf for a while until your skills improve. Inner layer circuit edits are among the most challenging rework tasks around, there's a reason they're worth the most points!

This is also intended to be a relatively low-cost board so you can practice without the pressure of reworking a production design with a big FPGA and five-digit price tag. If you destroy a couple of these boards then get the hang of things and your third attempt succeeds, great - you've learned something.

And if the board survives, you've got a STM32H750 dev platform with a UART, two PMODs, a SPI flash, and a lot of LEDs to maybe do something useful with.

IMPORTANT NOTE: Read the challenge list before populating the front side of the PCB. Some of the BGA-site challenges have two versions, an "easy" version which can be done on a bare PCB before populating allowing easy access to the BGA footprint, and a "hard" version which requires you populate the board before doing the rework. Unless you want to do the hard version twice, don't populate the board until you've done the easier ones. This does require doing some of the challenges out of order, unless you want to make two boards and do different challenges on each.

Most notably, the following challenges should be done before populating the BGA:

  • Challenge 13

How do I complete a given challenge?

It's up to you, within reason. If you are able to restore the intended electrical connectivity to the point that the firmware lights up the corresponding "complete" LED and you've followed any restrictions listed in the problem text, you've done it. Please follow the spirit of the challenges, many of them can be "cheated" by jumpering adjacent pins on the MCU together or similar but the point of this board is skill development. If you don't actually fix the intended defect you're not learning.

Almost all challenges are electrically testable by the MCU firmware; those that involve soldermask or silkscreen rework can be graded by visual inspection of the board. If those look good, they probably are.

The IPC rework guides are a good starting point for general repair techniques.

If you get really stuck on a specific challenge you can message me on Mastodon at@azonenberg@ioc.exchange but please make a reasonable attempt to plan a solution first.

I still have an old rev board, where's the info for that?

The legacy revision 1 challenge, built around a Spartan-3A FPGA, can be found in the "v1" directory and is being kept there in case anybody has an old board and wants to refer to the design. Anyone building the challenge now should use the v2 design which is based on parts that (as of this writing in early 2026) are readily available and inexpensive.

What tools are required?

A fine point soldering iron, good tweezers, and hot air rework station are a must to attempt any of the challenges. A stereo microscope is strongly recommended.

The silkscreen and solder mask repair challenges require UV or heat cured coating materials and a curing lamp or oven appropriate for the coating chemistry. UV resin allows much more rapid iteration and avoids heat stress on the remainder of the system so we strongly recommend it over heat cure systems.

Surface trace cuts and rerouting require a scalpel or rotary tool/mill with very fine cutters. While the inner layer circuit edits are possible to complete with hand scraping or a handheld rotary tool, we strongly recommend use of a 3-axis mill and microscope for the highest grade results and greatest chance of success.

What are the challenges?

See the list here. Each challenge is marked with silkscreened text on the PCB to make it easy to find.

What is the "Free Play Area"?

A big pile of component footprints and traces not connected to anything else. Invent your own challenges or use it to practice for the official ones.

Parts

131
QtyValueFootprintReferences
250.47 uFazonenberg_pcb:EIA_0402_CAP_NOSILKC1, C10, C11, C12, C13, C14, C15, C16, C17, C18, C19, C20, C21, C22, C23, C24 +9
1633Kazonenberg_pcb:EIA_0402_RES_NOSILKR4, R10, R11, R12, R13, R14, R15, R23, R28, R29, R30, R31, R32, R33, R34, R35
16GREENazonenberg_pcb:EIA_0402_LEDD1, D2, D3, D4, D5, D6, D7, D8, D9, D10, D11, D12, D13, D14, D15, D16
15Razonenberg_pcb:EIA_0402_RES_NOSILKR39, R40, R41, R42, R43, R44, R45, R46, R47, R48, R49, R50, R51, R52, R53
1233azonenberg_pcb:EIA_0402_RES_NOSILKR1, R5, R16, R18, R19, R20, R21, R22, R24, R25, R26, R27
11TESTPOINTazonenberg_pcb:TESTPOINT_SMT_0.5MMJ4, J5, J9, J10, J11, J12, J13, J14, J15, J16, J17
64.7 uFazonenberg_pcb:EIA_0603_CAP_NOSILKC2, C7, C8, C9, C31, C33
4SCREWHOLEazonenberg_pcb:MECHANICAL_CLEARANCEHOLE_4_40M1, M2, M3, M4
310Kazonenberg_pcb:EIA_0402_RES_NOSILKR6, R8, R17
20azonenberg_pcb:EIA_0402_RES_NOSILKR7, R38
22.2 uFazonenberg_pcb:EIA_0603_CAP_NOSILKC5, C6
25.1kazonenberg_pcb:EIA_0402_RES_NOSILKR2, R3
2PMOD_HOSTazonenberg_pcb:CONN_HEADER_2.54MM_2x6_RA_PMOD_HOSTJ7, J8
1100Kazonenberg_pcb:EIA_0402_RES_NOSILKR9
110Kazonenberg_pcb:EIA_0201_RES_NOSILKR36
110Kazonenberg_pcb:EIA_01005_RES_NOSILKR37
11Aazonenberg_pcb:EIA_0402_RES_NOSILKF1
1CONN_01X03azonenberg_pcb:CONN_HEADER_2.54MM_1x3_REFLOWJ6
1CORTEX_DEBUG_ETMazonenberg_pcb:CONN_HEADER_1.27MM_2x10_SMT_SAMTEC_FTSH-110-01-L-DV-KJ2
1DOTazonenberg_pcb:TESTPOINT_SMT_0.5MMJ3
1ECS-1612MV-250-CNazonenberg_pcb:OSCILLATOR_1.6x1.2U3
1LONGTHINGazonenberg_pcb:LONGTHING-1200DPIM6
1MI0603J601R-10azonenberg_pcb:EIA_0603_INDUCTOR_NOSILKFB1
1OSHWw_logo:Logo_silk_OSHW_6x6mmM5
1STM32H750XBH6azonenberg_pcb:BGA_265_14x14_DEPOP_0.8MMU1
1USB_C_Receptacle_USB2.0lain:GCT_USB4500-03-0-AJ1
1W25Q80BVazonenberg_pcb:SOIC_8_5.3MMU4
1ZLDO1117-33azonenberg_pcb:SOT223-4U12

Questions

How big is the Reworkctf v2 PCB?

It measures 54 × 50 mm and has 4 copper layers, 1.6 mm thick.

What parts does the Reworkctf v2 use?

131 parts, built around the STM32H750XBH6, ECS-1612MV-250-CN-TR and MI0603J601R-10. The full list of its parts is on this page, with links to each part's symbol and footprint where PCBKit's library has them.

Where can I download the Reworkctf v2 KiCad files?

From the azonenberg/reworkctf repository on GitHub, at the commit this page was made from: the board is v2/pcb/reworkctf-v2.kicad_pcb and its schematic v2/pcb/free-play.kicad_sch. PCBKit opens the board in the browser, with nothing to install.

Can I use the Reworkctf v2 design in my own project?

Its repository publishes it under the BSD-3-Clause licence: you may reuse it on that licence's terms (keep the author's notice, and for a copyleft licence share your changes alike).

Similar boards

  • 8 layers126 × 117 mmDemo board, the printed circuit board in 3D

    Demo board

    azonenberg/electronics-training

    Training materials for classes etc

    311 parts15
  • 4 layers48 × 45.5 mmStm32h750-expansion, the printed circuit board in 3D

    Stm32h750-expansion

    azonenberg/efinix-tests

    Miscellaneous experiments with Efinix FPGAs

    73 parts1BSD-3-Clause
  • 8 layers145 × 139 mmLatentpink, the printed circuit board in 3D

    Latentpink

    azonenberg/latentpacket

    The LATENTPACKET network infrastructure platform

    841 parts30BSD-3-Clause
  • 10 layers130 × 90 mmMain pcb, the printed circuit board in 3D

    Main pcb

    azonenberg/dumptruck

    FPGA based dumper for flashes and more

    445 parts17BSD-3-Clause
  • 4 layers154.5 × 137 mmKup lulz, the printed circuit board in 3D

    Kup lulz

    azonenberg/misc-devboards

    Miscellaneous prototype hardware that wasn't major enough to warrant a dedicated repo

    384 parts17BSD-3-Clause
  • 10 layers165 × 121 mmTriggercrossbar, the printed circuit board in 3D

    Triggercrossbar

    azonenberg/triggercrossbar

    Rack mountable crossbar matrix for T&M trigger in/out signals, allowing dynamic reconfiguration of an experiment without recabling

    633 parts8BSD-3-Clause
  • 4 layers100 × 70 mmMp2-xc7k test, the printed circuit board in 3D

    Mp2-xc7k test

    azonenberg/stm32mp2-baremetal-tests

    Experimenting with bare metal STM32MP2 development

    351 parts4BSD-3-Clause
  • 4 layers93 × 69 mmLcbringup, the printed circuit board in 3D

    Lcbringup

    azonenberg/latentred

    Open hardware 48x 1000baseT + 2x 25G SFP28 Ethernet switch

    207 parts36BSD-3-Clause