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8 layers127 × 75 mmSlot1-c2mu, the printed circuit board in 3D

FPGA CPU x86 real socket

Size
127 × 75 mm
Copper layers
8
Thickness
1.6 mm
Parts
313
Nets
812
Pads
2,414
Tracks, vias
9,134, 1,644
Pours
13
Routed
Yes
KiCad
KiCad 10.0 (file 20260206)
Created
18 Oct 2026
Updated
7 Nov 2026

Overview

Slot1-c2mu is an open-source printed circuit board by alphaonex86, from the alphaonex86/FPGA-CPU repository on GitHub, published under the GPL-3.0 licence. It is an 8-layer board of 127 × 75 mm with 313 parts on 812 nets, routed with 9,134 tracks and 1,644 vias.

It is built around the CY2309SC-1, FT232HL-REEL and W25Q128JVSIQ, with the TPS62130RGT, TPS54620RHLR and SN74GTL16612DL among its other parts. Its parts include 174 capacitors, 61 resistors, 17 ICs, 7 connectors and 4 inductors. It belongs with the FPGA and CPLD boards of this library.

Main components

9

README

sockets/kicad/README.md

Socket models (KiCad)

ZIF-socket footprints, symbols, STEP models and pin maps copied from FPGAmotherboard. Their generators are only in the operator's full tree, not the public repo: socket3/tools/gen_socket3_footprint.py @a73daf8, socket7/tools/gen_socket7_*.py @e84b442, socket370/tools/gen_pga370_*.py @57f3c94. Socket3_Am5x86_237.step is the one regenerated in FPGAmotherboard on 2026-10-18 (the old one predated the measured lever).

SocketZIF footprintCPU pins / holesPin map (source)SymbolZIF body + lever
3Socket3_Am5x86_237168 / 241am5x86_pga168.csv (AMD 19751C)none yetphoto-scaled off the operator's MB-8433UUD-A, ±0.6 mm; top face 7.3 ±0.4 mm (photo, 2026-10-31; STEP still 8.0), hole depth 5 mm (caliper)
7Socket7_P55C_296296 / 320socket7_p55c.csv (Intel 243185-004)CPU_Intel_Socket7assumed (PGA370 envelope), not measured
370PGA370_Socket_ZIF370 / 370pga370_coppermine.csv (Intel 245264-008)CPU_Intel_PGA370Intel 244410-002 Fig. 1/2a

Interposer base

python3 tools/gen_base.py builds, per socket, the interposer's CPU-side pins: a Mill-Max PGA header soldered under the board (catalog in ../parts/mill-max_catalog_metric.pdf, p.140 pins, p.137 insulator).

SocketFootprint3D model (built, not in git)Check board (base on the ZIF)HeaderDrill / padBoard above socket
3Interposer.pretty/Socket3_Base_PGA1683dmodels/Socket3_Base_PGA168.stepsocket3-base-check.kicad_pcb551, pin #55030.90 / 1.50 mm6.40 mm
7Interposer.pretty/Socket7_Base_PGA2963dmodels/Socket7_Base_PGA296.stepsocket7-base-check.kicad_pcb550, pin #50120.80 / 1.25 mm3.99 mm
370Interposer.pretty/Socket370_Base_PGA3703dmodels/Socket370_Base_PGA370.stepsocket370-base-check.kicad_pcb550, pin #50120.80 / 1.25 mm3.99 mm
  • Pin positions come from the ZIF footprints (socket top view = interposer top view), so the base goes unmirrored on the interposer's F.Cu; the generator fails unless they match the pin map exactly.
  • Male pin 0.48 x 3.91 mm (CPU: 0.43-0.51 x 3.05-3.30 mm); tails stand 1.6 mm (551) / 2.57 mm (550) above a 1.6 mm board. F.CrtYd is the tail ring, B.CrtYd the header insulator; F.Fab shows the original CPU package.
  • Footprints load their 3D models from ${KIPRJMOD}/3dmodels/; the check boards live here so that resolves.
  • Not measured yet (see plan/interposers.md M1-M3): Socket 3/7 ZIF height (the STEPs use 8.0 mm), free space around each socket, header seating depth.

Parts

313
QtyValueFootprintReferences
54100nFC_0402_1005MetricC100, C101, C102, C103, C104, C105, C106, C107, C108, C109, C110, C111, C112, C113, C114, C115 +38
3556RR_Array_Convex_4x0402RN1, RN2, RN10, RN11, RN12, RN13, RN14, RN15, RN16, RN17, RN18, RN19, RN20, RN21, RN22, RN23 +19
234.7uFC_0603_1608MetricC66, C67, C68, C69, C70, C71, C74, C75, C76, C77, C78, C83, C84, C85, C140, C143 +7
22470nFC_0402_P1.00C22, C23, C24, C25, C26, C27, C28, C29, C30, C31, C32, C33, C34, C35, C36, C37 +6
16220nFC_0402_1005MetricC153, C154, C155, C156, C157, C158, C159, C160, C161, C162, C163, C164, C165, C166, C167, C168
11100nFC_0402_P1.00C53, C54, C55, C56, C57, C58, C59, C60, C61, C62, C63
1110kR_0402_1005MetricR4, R25, R26, R27, R28, R29, R44, R45, R47, R56, R57
9100kR_0402_1005MetricR2, R5, R7, R8, R10, R11, R13, R48, R49
9470nFC_0402_1005MetricC39, C40, C46, C47, C48, C49, C50, C51, C52
822RR_0402_1005MetricR30, R31, R32, R33, R34, R35, R36, R37
7SN74GTL16612TSSOP-56_6.1x14mm_P0.5mmU3, U4, U5, U6, U7, U8, U9
647uF/6.3VC_1210_3225MetricC72, C73, C79, C80, C81, C82
510uF/25VC_1210_3225MetricC2, C3, C10, C14, C18
54.7kR_0402_1005MetricR38, R39, R42, R46, R52
40RR_0402_1005MetricR21, R22, R23, R24
41uFC_0402_1005MetricC125, C126, C129, C130
433RR_0402_1005MetricR58, R59, R60, R61
31kR_0402_1005MetricR20, R41, R53
32.2uH XFL4020-222L_Coilcraft_XxL4020L2, L3, L4
322uF/6.3VC_0805_2012MetricC11, C15, C19
33.3nFC_0402_1005MetricC13, C17, C21
3TPS62130RGTVQFN-16-1EP_3x3mm_P0.5mm_EP1.68x1.68mmPS2, PS3, PS4
2100uF/6.3VC_1210_3225MetricC64, C65
21nFC_0402_1005MetricC128, C132
22.2uFC_0402_1005MetricC127, C131
222uFC_0805_2012MetricC144, C145
222uF/10VC_1206_3216MetricC5, C6
227pFC_0402_1005MetricC173, C174
22N7002SOT-23Q1, Q2
2330RR_0402_1005MetricR40, R54
2MountingHole_PadStandoff_SMT_M2_D5.56_H6.6H1, H2
2TPS74801VSON-10-1EP_3x3mm_P0.5mm_EP1.65x2.4mmU13, U14
2USBLC6-2SC6SOT-23-6U15, U17
11.00kR_0402_1005MetricR18
11.13k 1%R_0402_1005MetricR14
11.1AFuse_1206_3216MetricF2
11.33kR_0402_1005MetricR1
1100RR_0402_1005MetricR50
1100R 1%R_0402_1005MetricR43
1100uF/25VCP_Elec_6.3x5.4C1
110nFC_0402_1005MetricC8
110pFC_0402_1005MetricC152
110uFC_0805_2012MetricC172
1124kR_0402_1005MetricR9
112MHzCrystal_SMD_3225-4Pin_3.2x2.5mmY1
112k 1%R_0402_1005MetricR55
12.00kR_0402_1005MetricR19
12.49k 1%R_0402_1005MetricR16
121.5kR_0402_1005MetricR51
124.9kR_0402_1005MetricR6
127nFC_0402_1005MetricC9
1316kR_0402_1005MetricR12
14.53k 1%R_0402_1005MetricR15
14.7uF/25VC_0805_2012MetricC4
14.99k 1%R_0402_1005MetricR17
150MHzOscillator_SMD_SeikoEpson_SG210-4Pin_2.5x2.0mmU12
152.3kR_0402_1005MetricR3
15AFuse_1812_4532MetricF1
16.8uH FXL1040-6R8L_Changjiang_FXL1040L1
1600R@100MHzL_0603_1608MetricFB1
1B5819WSD_SOD-323D2
1Barrel_JackBarrelJack_CUI_PJ-063AH_HorizontalJ3
1CMOS cellMolex_PicoBlade_53261-0271_1x02-1MP_P1.25mm_HorizontalJ8
1CY2309SOIC-16_3.9x9.9mm_P1.27mmU10
1Conn_01x03PinHeader_1x03_P2.54mm_VerticalJ7
1Conn_01x04JST_PH_B4B-PH-K_1x04_P2.00mm_VerticalJ5
1Conn_02x07_Odd_EvenPinHeader_2x07_P2.00mm_VerticalJ1
1FPGA_Artix7_XC7A100T_FGG484FPGA_Artix7_XC7A100T_FGG484_BGAU1
1FT232HL-REELLQFP-48_7x7mm_P0.5mmU16
1Intel_SC242_CardEdgeSC242_CardEdge_242U2
1LattePanda_Mu_SODIMM260LattePanda_Mu_LOTES_ADDR0110_9.2HJ4
1PWRSW_Push_1P1T_XKB_TS-1187ASW1
1TPS54620RHLTI_RHL0014APS1
1USB 2.0 x2 headerPinHeader_2x05_P2.54mm_VerticalJ6
1W25Q128JVSIQSOIC-8_5.3x5.3mm_P1.27mmU11
1greenLED_0603_1608MetricD1

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Questions

How big is the Slot1-c2mu PCB?

It measures 127 × 75 mm and has 8 copper layers, 1.6 mm thick.

What parts does the Slot1-c2mu use?

313 parts, built around the CY2309SC-1, FT232HL-REEL, W25Q128JVSIQ and TPS62130RGT. The full list of its parts is on this page, with links to each part's symbol and footprint where PCBKit's library has them.

Where can I download the Slot1-c2mu KiCad files?

From the alphaonex86/FPGA-CPU repository on GitHub, at the commit this page was made from: the board is hw/slot1-c2mu/slot1-c2mu.kicad_pcb and its schematic hw/slot1-c2cart/slot1-c2cart.kicad_sch. PCBKit opens the board in the browser, with nothing to install.

Can I use the Slot1-c2mu design in my own project?

Its repository publishes it under the GPL-3.0 licence: you may reuse it on that licence's terms (keep the author's notice, and for a copyleft licence share your changes alike).