

RailCortex
RailCortex is a dual-mode Cyber-Physical System modernizing railway infrastructure. In Normal Mode, it acts as a Level 4 Digital Twin, using mathematical optimization to predict and prevent cascading delays. During disasters, our custom IoT edge node triggers an autonomous LangGraph AI swarm to route emergency vehicles with zero human latency.
- Copper layers
- 2
- Thickness
- 1.6 mm
- Parts
- 23
- Nets
- 45
- Pads
- 138
- Tracks, vias
- 141, 9
- Routed
- Yes
- KiCad
- KiCad 10.0 (file 20260206)
- Created
- 12 Jun 2026
- Updated
- 14 Jun 2026
Overview
RailCortex is an open-source printed circuit board by ThePrabhnoor, from the ThePrabhnoor/RailCortex repository on GitHub, published under the MIT licence. It is a 2-layer board with 23 parts on 45 nets, routed with 141 tracks and 9 vias.
It is built around the ESP32-WROOM-32 and AMS1117-3.3. Its parts include 7 resistors, 5 capacitors, 5 connectors, 2 ICs and 2 diodes. It belongs with the ESP32 boards of this library.
Main components
2ESP32-WROOM-32
SMD,18x25.5mm-40℃~+85℃ -98dBm 2.4GHz 2.7V~3.6V 20dBm Bluetooth4.2 ESP32-DOWDQ6 UART、SDIO、SPI、I2C、GPIO、PWM、ADC、DAC SMD,25.5x18mm WiFi Modules ROHSEspressif SystemsWiFi ModulesAMS1117-3.3
SOT-223-40℃~+125℃ 0.003%Vout 1 1.1V@(800mA) 15V 1A 3.3V 5mA 72dB@(120Hz) Fixed Over Current Protection、Short Circuit Protection、Thermal shutdown Positive SOT-223 Voltage Regulators - Linear, Low Drop Out (LDO) Regulators ROHSAdvanced Monolithic SystemsVoltage Regulators - Linear, Low Drop Out (LDO) Regulators
README
README.md🚄 RailCortex
Watch Demo Video | View Pitch Deck (PPT)
RailCortex is an autonomous, dual-mode Cyber-Physical System (CPS) engineered to modernize transit operations. It replaces passive tracking with an active cognitive network, bridging the gap between deterministic mathematical optimization, custom physical hardware, and Agentic AI.
In its primary state, RailCortex operates as a Level 4 Digital Twin. Powered by a high-performance WebGL rendering engine, it visualizes spatial datasets at 60fps. Rather than relying on human dispatchers to resolve platform conflicts, the system ingests live edge telemetry and utilizes Mixed-Integer Linear Programming (MILP) via PuLP to deterministically reroute trains, absorbing localized delays before they cascade across the grid.
When a physical disaster strikes, RailCortex’s custom-engineered IoT edge node—equipped with an MPU6050 accelerometer, NEO-6M GPS, and environmental sensors—detects the kinetic anomaly and instantly overrides the network. The system transitions into Emergency Response Mode, deploying a rigid, deterministic LangGraph Multi-Agent Swarm.
🧭 Dual-Mode Capabilities
1. Normal Operations: The Digital Twin
A high-performance WebGL spatial dashboard that functions as a Level 4 digital twin of the physical railway infrastructure.
- Live Telemetry Ingestion: Continuously tracks real-time train movement, velocity, and track congestion parameters via WebSockets.
- Mathematical Rerouting: Utilizes Mixed-Integer Linear Programming (MILP) to autonomously calculate platform reallocations and prevent network gridlock during extreme weather anomalies or track blockages.
- GPU-Accelerated Rendering: Leverages
deck.glto render massive spatial datasets (dynamic agents, stations, meteorological overlays) at 60fps without browser latency.
2. Emergency Response: The Multi-Agent Swarm
Upon detection of a catastrophic event (e.g., derailment) via the custom IoT hardware edge node, the system interrupts standard optimization protocols and deploys an autonomous LangGraph agent swarm.
- Zero-Latency Orchestration: Agents autonomously calculate incident severity based on raw G-force telemetry.
- Spatial Discovery: Executes Overpass QL to programmatically query OpenStreetMap (OSM) for the precise GPS bounding boxes of adjacent medical infrastructure.
- Heavy-Vehicle CAD Routing: Interfaces with Mappls/Google Routes REST APIs to dispatch emergency medical services utilizing traffic-aware, heavy-vehicle optimal trajectories.
🛠️ Technology Stack
This project strictly avoids simplistic API wrapper methodologies, demonstrating comprehensive engineering execution across hardware, frontend visualization, and algorithmic routing.
Frontend (Visualization & Interactivity)
- Frameworks: React.js (Vite) + Tailwind CSS + Framer Motion.
- Geospatial:
deck.gl(WebGL2 / WebGPU spatial rendering framework) +react-map-gl(Mapbox GL JS base maps). - State Management: Zustand (for reactive, global dashboard state).
- Animations: Anime.js (for SVG architecture flows) + Framer Motion (for spring-physics layout reveals).
Backend (Cognitive & Routing Engine)
- Core: Python 3.11 + FastAPI + WebSockets (for continuous bidirectional telemetry streaming).
- Mathematical Optimization: PuLP (Python-based MILP solver for deterministic routing).
- Agentic Framework: LangGraph + LangChain (Strict state-machine agent orchestration).
- LLMs: OpenAI GPT-4o / GPT-4o-mini (for unstructured parsing and heuristic judgment).
Hardware Edge Node (IoT)
- Microcontroller: ESP32-WROOM-32.
- Sensors: MPU6050 (Accelerometer/Gyroscope) + NEO-6M (GPS) + BME280 (Meteorological Sensor) + VL53L0X (LiDAR/Time-of-Flight).
- Hardware Engineering: Custom schematics and Gerber files designed in KiCad 8.0.
- CAD Enclosure: 3D-printed housing parametrically modeled in Autodesk Fusion 360.
(Note: Hardware schematics, Gerber files, and CAD deliverables are located in the
/Hardwaredirectory).
📐 Engineering Principles and Deterministic Architecture
RailCortex was engineered utilizing deterministic mathematics to ensure the safe management of physical infrastructure:
- Deterministic Optimization Constraints: Train platform reallocation and collision avoidance are managed by strict Linear Algebra equations and bounds, explicitly preventing stochastic LLMs from hallucinating physical routes.
- Graph-Based Agent State Management: LangGraph was selected over standard conversational frameworks (e.g., AutoGen, CrewAI) to enforce a rigid, deterministic execution loop during critical emergencies, mathematically guaranteeing fallback protocols if an external API fails.
- Hardware-in-the-Loop Integration: Physical severity and infrastructure degradation models (Kinetic Energy & Weibull Degradation) are calculated directly from physical IoT sensor payloads, eliminating reliance on simulated mock data for critical triggers.
⚙️ Local Setup Instructions
1. Repository Configuration
Clone the repository and enter the directory:
git clone https://github.com/PrabhnoorSingh-IITM/RailCortex.git
cd RailCortex2. Backend Configuration (FastAPI)
cd backend
python3 -m venv venv
source venv/bin/activate # On Windows use: venv\Scripts\activate
pip install -r requirements.txtCreate a .env file within the /backend directory:
OPENAI_API_KEY=your_openai_key
MAPPLS_API_KEY=your_routing_key
MAPBOX_ACCESS_TOKEN=your_mapbox_keyInitialize the ASGI server:
uvicorn app.main:app --reload --port 80003. Frontend Configuration (React/Vite)
In a new terminal window:
cd frontend
npm install
npm run devNavigate to http://localhost:5173 to access the Digital Twin interface.
4. Hardware Node Deployment
Navigate to /Hardware/firmware/RailCortex.ino and flash the compiled binary to the ESP32 via the Arduino IDE. Modify the Wi-Fi credentials and target WebSocket IP address within the source code to establish a connection with the local FastAPI instance.
Parts
23| Qty | Value | Footprint | References |
|---|---|---|---|
| 4 | Conn_Socket | Connector_PinSocket_2.54mm:PinSocket_1x04_P2.54mm_Vertical | J2, J3, J4, J5 |
| 2 | 0.1 uF | Capacitor_SMD:C_0805_2012Metric | C2, C4 |
| 2 | 1 k | Resistor_SMD:R_0805_2012Metric | R3, R5 |
| 2 | 10 uF | Capacitor_SMD:C_0805_2012Metric | C1, C3 |
| 2 | 4.7 k | Resistor_SMD:R_0805_2012Metric | R6, R7 |
| 2 | 5.1 k | Resistor_SMD:R_0805_2012Metric | R1, R2 |
| 2 | LED | LED_SMD:LED_0805_2012Metric | D1, D2 |
| 2 | SW_Push | Button_Switch_THT:SW_PUSH_6mm | SW1, SW2 |
| 1 | 1 uF | Capacitor_SMD:C_0805_2012Metric | C5 |
| 1 | 10 k | Resistor_SMD:R_0805_2012Metric | R4 |
| 1 | AMS1117-3.3 | Package_TO_SOT_SMD:SOT-223-3_TabPin2 | U2 |
| 1 | ESP32-WROOM-32 | RF_Module:ESP32-WROOM-32 | U1 |
| 1 | USB_C_Receptacle_USB2.0_14P | Connector_USB:USB_C_Receptacle_HRO_TYPE-C-31-M-12 | J1 |
Similar boards
- 2 layers90 × 76.5 mm

- 2 layers85 × 56 mm

- 2 layers62.2 × 30.5 mm

WLED ESP32 Controller
Hasenpups/WLED_ESP32_Controller
This work is licensed under a [Creative Commons Attribution-NonCommercial-ShareAlike 4.0 International License][cc-by-nc-sa].
24 parts44 - 2 layers150 × 50 mm

- 2 layers40 × 68 mm

MULTIGW
nuclearcat/ESP32ETH
Simple ESP32 with native ethernet using LAN8720 phy, Arduino compatible
32 parts30LGPL-2.1 - 2 layers259.5 × 60.7 mm

1512hh control
larryqiann/AP1512HH-ESP32
Coway AP1512HH Main Board replacement with ESP32
71 parts29CERN-OHL-P-2.0 - 2 layers64.6 × 87.1 mm

- 2 layers139.7 × 88.9 mm

Questions
What parts does the RailCortex use?
23 parts, built around the ESP32-WROOM-32 and AMS1117-3.3. The full list of its parts is on this page, with links to each part's symbol and footprint where PCBKit's library has them.
Where can I download the RailCortex KiCad files?
From the ThePrabhnoor/RailCortex repository on GitHub, at the commit this page was made from: the board is Hardware/pcb/RailCortex.kicad_pcb and its schematic Hardware/pcb/RailCortex.kicad_sch. PCBKit opens the board in the browser, with nothing to install.
Can I use the RailCortex design in my own project?
Its repository publishes it under the MIT licence: you may reuse it on that licence's terms (keep the author's notice, and for a copyleft licence share your changes alike).