Analog PID Controller

Analog PID Controller

An all-hardware Proportional-Integral-Derivative (PID) controller built entirely from op-amps, resistors, and capacitors — no microcontroller, no code. Designed and simulated in Proteus, hand-built on a proto-board, and laid out as a two-layer PCB in KiCad.

Analog Circuit Course (BECE206L) project — School of Electronics Engineering, VIT Chennai.

Overview

Digital PID controllers dominate modern practice, but analog controllers still have a place where continuous-time response, zero sampling delay, and simplicity matter. This project implements the classic PID control law directly in hardware using LM358 op-amps:

• Proportional stage — inverting amplifier with a variable-resistor gain
• Integral stage — op-amp integrator (capacitor in the feedback path)
• Derivative stage — practical differentiator (capacitor at the input, resistor in feedback)
• Summing amplifier — combines P, I, and D outputs into the final control signal
• Power supply / virtual ground — a buffered voltage divider lets every stage run from a single +12V rail

The design was validated at three levels: theoretical modeling, Proteus simulation, and hardware prototyping — followed by a proper two-layer PCB layout in KiCad.

System Architecture

The input error signal is fed in parallel to the proportional, integral, and derivative stages. Each stage produces its own control voltage, and a summing amplifier combines them into the final output, exactly as in the classical PID equation.

Vout = Kp·Vin + Ki∫Vin dt + Kd·dVin/dt

Circuit Design

Full schematic

Proportional stage — inverting amp, gain set by potentiometer RV1:

Vprop = -(RV1 / R2) · Vin = -Kp · Vin

Integral stage — op-amp integrator, R = RV2, C1 = 4.7 µF (with a parallel resistor to prevent saturation drift):

Vint = -(1 / RV2·C1) ∫ Vin dt = -Ki ∫ Vin dt

Derivative stage — practical differentiator, C2 = 0.1 µF, R = R5 ∥ RV3 (extra resistors limit high-frequency noise gain):

Vdiff = -(Req·C2) · dVin/dt = -Kd · dVin/dt

Summing amplifier — inverting summer that combines all three stages:

Vout = Kp·Vin + Ki∫Vin dt + Kd·dVin/dt

Component selection

Power supply & virtual ground: a +12 V single-rail supply is split by two 10 kΩ resistors into a 6 V midpoint, buffered by an LM358 voltage-follower to hold a stable virtual ground under load — this is what lets every op-amp stage handle bipolar signals from a single supply.

PCB Design

Two-layer board designed in KiCad. Front layer carries the active components (U1–U4 op-amps, R1–R18, C1–C10, tuning pots RV1–RV4); back layer is largely ground plane and power routing, stitched together with vias to keep the analog signal paths low-noise.

Front layer	Back layer

3D render of the finished board:

Noise reduction techniques used:

• Electrolytic decoupling caps (10–100 µF) for low-frequency ripple, ceramic 0.1 µF caps right at the op-amp supply pins for high-frequency noise
• Dedicated ground plane on the back layer with generous stitching vias
• Short, direct signal routing to minimize parasitic pickup

Gerbers and native KiCad project files are included in PCB Design/.

Simulation (Proteus)

Each stage (P, I, D) was verified independently before being combined through the summing amplifier.

Set-point and feedback potentiometers were swept to observe the controller's response under different gain conditions:

The yellow trace shows the instantaneous error signal; the blue trace shows the controller's driving output as it reacts to that error. Sweeping Kp, Ki, and Kd this way surfaced two real issues that were fixed before moving to hardware: excessive high-frequency noise gain in the derivative stage (fixed by re-tuning the differentiator capacitor for a mild low-pass effect) and op-amp saturation from mismatched resistor ratios.

Hardware Prototype

The power supply and virtual ground were built and verified first, then each PID stage was built and tested individually before being tied together with the summing amplifier.

Front	Back

Assembled and running:

Experimental Setup

The board was powered from a regulated +12 V supply, with an oscilloscope and multimeter monitoring the outputs while the set-point/feedback potentiometers and the Kp/Ki/Kd trim pots were adjusted.

Results

• Hardware behavior closely tracked the Proteus simulation, with only minor deviations from component tolerances, op-amp non-idealities, and wiring noise.
• The integrator showed slight drift from leakage current; the differentiator was sensitive to high-frequency noise — both mitigated with parallel resistors and small filtering capacitors.
• The buffered virtual ground kept single-supply operation stable across all three stages.
• The PCB layout (vs. the proto-board) further improved signal integrity by shortening traces and tightening the ground plane.

Overall, the controller reduced steady-state error, improved rise time, and stayed stable across the tested range of Kp/Ki/Kd settings — confirming that a fully analog, code-free PID implementation is viable for real-time, low-latency control.

Applications

• Motor speed control — fast proportional response, zero steady-state error, low overshoot
• Temperature control (e.g. industrial heaters) — integral action removes long-term offset, derivative action limits overshoot
• Position control (robot arms, servos) — precise, low-oscillation positioning
• Any low-cost, real-time embedded application where digital sampling delay is undesirable

Repository Structure

.
├── Analog Circuit_Project_Report.docx   # Full project report
├── PCB Design/
│   ├── Analog_PID_Controller.kicad_pro
│   ├── Analog_PID_Controller.kicad_sch  # Schematic
│   ├── Analog_PID_Controller.kicad_pcb  # PCB layout
│   └── Gerbers/                         # Fabrication files (Gerbers + drill files)
└── images/                              # Figures used in this README

Tools Used

• Proteus — circuit simulation
• KiCad — PCB schematic capture, layout, and Gerber export

Bill of Materials (key parts)

• 4× LM358 dual op-amps
• Resistors: 1 kΩ – 1 MΩ (various, for gain/stability tuning)
• Capacitors: 0.1 µF – 4.7 µF (integration/differentiation), 10 µF – 100 µF (supply filtering)
• 4× potentiometers (RV1–RV4) for Kp / Ki / Kd / set-point tuning
• Regulated ±12 V or +12 V single-rail power supply
• Proto-board (for the initial build) / custom PCB (see PCB Design/)

Authors

• Manas Mishra (24BLC1157)
• Panchigar Dishan Chiragbhai (24BLC1217)
• Taraksh Pratap Singh (24BLC1149)

Course project under Dr. Raju Patel, School of Electronics Engineering, VIT Chennai — April 2026.

References

See the full report for the complete bibliography, including foundational PID texts (Åström & Hägglund, Ogata, Visioli) and recent literature on analog vs. digital and adaptive PID implementations.