4 layers36.4 × 15 mm
Ovrdrive
o7-machinehum/phantomdrive
Seemingly normal USB drive with a hidden security feature
57 parts1kMIT
CH569W
WCH (Nanjing Qinheng Microelectronics)Extended
-20℃~+85℃ 120MHz 2.3V~3.6V 32 Bit 448KB 49 Built-in+External FLASH Others Power-on reset (POR)、Undervoltage detection (BOR/LVD/LVR/LVI)、Watchdog reset、Software reset、External pin reset (NRST)、Built-in general-purpose timer QFN-68-EP(8x8) Microcontrollers (MCU/MPU/SOC) ROHS
- Part id
- wch/CH569W
- Category
- Microcontrollers (MCU, MPU, SOC)
- Package
- QFN-68-EP(8x8)
- Pins
- 69
- In stock
- 0 at JLCPCB (C2857462)
- Used on
- 4 open-source boards
Overview
The CH569W is a microcontroller made by WCH (Nanjing Qinheng Microelectronics) in a QFN-68-EP(8x8) package with 69 pins. -20℃~+85℃ 120MHz 2.3V~3.6V 32 Bit 448KB 49 Built-in+External FLASH Others Power-on reset (POR)、Undervoltage detection (BOR/LVD/LVR/LVI)、Watchdog reset、Software reset、External pin reset (NRST)、Built-in general-purpose timer QFN-68-EP(8x8) Microcontrollers (MCU/MPU/SOC) ROHS.
PCBKit's library has its KiCad symbol (EasyEDA_Cloud:CH569W, from EasyEDA) and its footprint (EasyEDA_Cloud:QFN-68_L8.0-W8.0-P0.40-BL-EP5.5, from EasyEDA), ready for a KiCad board. JLCPCB lists it (part C2857462). 4 open-source boards in 4 repositories on GitHub use it.
Symbol
Footprint
From the datasheet
15- Supply, least
- 1.15 V · V12CORE, recommended operating min · p. 117
- Supply, most
- 1.3 V · V12CORE, recommended operating max · p. 117
- Supply, least
- 2.3 V · VDDLDO, recommended operating min · p. 117
- Supply, most
- 3.6 V · VDDLDO, recommended operating max · p. 117
- Supply, least
- 3.15 V · V33USB, recommended operating min · p. 117
- Supply, most
- 3.5 V · V33USB, recommended operating max · p. 117
- Supply, least
- 3 V · V33GX, recommended operating min · p. 117
- Supply, absolute maximum
- 1.5 V · V12CORE, absolute max · p. 117
- Supply, absolute maximum
- 4.2 V · VDDLDO, absolute max · p. 117
- Works from
- -20 °C · Ambient operating min, stated supply conditions · p. 117
- Works up to
- 85 °C · Ambient operating max, stated supply conditions · p. 117
- Takes working
- 37 mA · Total operating current typical, Fsys=80MHz, TA=25℃ · p. 117
- Takes asleep
- 26 mA · Idle current typical, Fsys=80MHz, all peripheral clocks enabled · p. 117
- Takes asleep
- 5 mA · Pause-mode current typical, I/O unloaded or input pull-up · p. 117
- Takes asleep
- 1.3 mA · Sleep-mode current typical, I/O unloaded or input pull-up · p. 117
What it is and has
25- Core
- RISC-V3A, RV32IMAC · p. 1
- System clock
- 120MHz maximum · p. 1
- CodeFlash
- 448KB user application storage · p. 1
- DataFlash
- 32KB · p. 1
- BootLoader
- 24KB · p. 1
- InfoFlash
- 8KB · p. 1
- RAMX
- 32/64/96KB configurable, 128-bit wide · p. 1
- RAMS
- 16KB, 32-bit wide · p. 1
- USB3.0
- Host/Device, OTG, integrated PHY · p. 1
- USB2.0
- Host/Device, integrated PHY · p. 1
- Ethernet interfaces
- RGMII and RMII, external PHY · p. 1
- Ethernet rates
- 10/100/1000Mbps via PHY · p. 1
- Timers
- 3, 26-bit · p. 1
- PWM
- 4 extended outputs, adjustable duty cycle · p. 1
- UART
- 4, up to 7.5Mbps, 16C550 compatible · p. 1
- SPI
- 2, master/slave · p. 1
- GPIO
- 49; 8 configurable for level or edge interrupts · p. 1
- GPIO voltage
- 3.3V or 2.5V · p. 1
- HSPI
- 8/16/32-bit configurable data width · p. 1
- HSPI throughput
- Approximately 3.8Gbps at 32-bit, 120MHz · p. 1
- Encryption
- AES/SM4, 8 combined encryption/decryption modes · p. 1
- EMMC data interface
- 1/4/8 data lines, up to 96MHz communication clock · p. 1
- Parallel bus
- 8-bit data, 15-bit address · p. 1
- Unique ID
- 64-bit · p. 1
- Package
- QFN68 · p. 1
Specifications
63| Parameter | Conditions | As printed | Page |
|---|---|---|---|
| 工作时的环境温度 TA | VDDLDO=VDDIO=3.3V, V33USB=V33GX=3.3V, V12USB=V12CORE=1.2V | min -20 · max 85 ℃ | 117 |
| 存储时的环境温度 TS | min -55 · max 125 ℃ | 117 | |
| 系统内核电压 V12CORE | min -0.3 · max 1.5 V | 117 | |
| 系统电源电压 VDDLDO | min -0.4 · max 4.2 V | 117 | |
| GPIO 端口电压 VDDIO | min -0.4 · max 4.2 V | 117 | |
| USB PHY 信号引脚电压 V12USB | min -0.3 · max 1.5 V | 117 | |
| USB PHY 电源电压 V33USB | min -0.4 · max 4.2 V | 117 | |
| SerDes PHY 电源电压 V33GX | min -0.4 · max 4.2 V | 117 | |
| 系统内核电压 V12CORE | TA=25℃, VDDLDO=VDDIO=V33USB=V33GX=3.3V, V12CORE=V12USB=1.2V, Fsys=80MHz | min 1.15 · typ 1.2 · max 1.3 V | 117 |
| 内部 LDO 输入电源电压 VDDLDO | TA=25℃, Fsys=80MHz | min 2.3 · typ 3.3 · max 3.6 V | 117 |
| GPIO 端口电压 VDDIO | TA=25℃, Fsys=80MHz | min 2.3 · typ 3.3 · max 3.6 V | 117 |
| USB PHY 低压电源电压 V12USB | TA=25℃, Fsys=80MHz | min 1.15 · typ 1.2 · max 1.3 V | 117 |
| USB PHY 电源电压 V33USB | TA=25℃, Fsys=80MHz | min 3.15 · typ 3.3 · max 3.5 V | 117 |
| SerDes PHY 电源电压 V33GX | TA=25℃, Fsys=80MHz | min 3 · typ 3.3 · max 3.6 V | 117 |
| 工作时的总电源电流，常规测试条件 ICC | TA=25℃, VDDLDO=VDDIO=V33USB=V33GX=3.3V, V12CORE=V12USB=1.2V, Fsys=80MHz | typ 37 mA | 117 |
| 低功耗状态的电源电流 ISLP | 空闲模式 Fsys=80MHz; 外设时钟都开启; I/O 引脚输出无负载或输入上拉; TA=25℃, VDDLDO=VDDIO=V33USB=V33GX=3.3V, V12CORE=V12USB=1.2V | typ 26 mA | 117 |
| 低功耗状态的电源电流 ISLP | 暂停模式; I/O 引脚输出无负载或输入上拉; TA=25℃, VDDLDO=VDDIO=V33USB=V33GX=3.3V, V12CORE=V12USB=1.2V | typ 5 mA | 117 |
| 低功耗状态的电源电流 ISLP | 睡眠模式; I/O 引脚输出无负载或输入上拉; TA=25℃, VDDLDO=VDDIO=V33USB=V33GX=3.3V, V12CORE=V12USB=1.2V | typ 1.3 mA | 117 |
| V33GX 端低压复位阈值电压 Vlvr | TA=25℃, Fsys=80MHz | min 2.6 · typ 2.8 · max 3 V | 117 |
| 输入低电平电压 VIL | VDDIO=3.3V | max 0.8 V | 117 |
| 输入高电平电压 VIH | VDDIO=3.3V | min 2 V | 117 |
| 施密特触发输入负向到阈值 Vt- | min 0.8 · typ 1.1 V | 117 | |
| 施密特触发输入正向到阈值 Vt+ | typ 1.6 · max 2 V | 117 | |
| 输出低电平电压 VOL | 8/16mA 吸入电流 | max 0.4 V | 117 |
| 输出高电平电压 VOH | 8/16mA 输出电流 | min 2.4 V | 117 |
| 输入上拉电阻 RPU | min 40 · typ 75 · max 190 kΩ | 118 | |
| 输入下拉电阻 RPD | min 30 · typ 75 · max 190 kΩ | 118 | |
| 输入漏电流 Iin | typ 1 · max 10 uA | 118 | |
| 输入电容 CIN | VDDIO=2.5V 或 3.3V | min 1.5 · typ 2.5 · max 3.5 pF | 118 |
| ETH | Fsys=96M; TA=25℃, VDDLDO=VDDIO=V33USB=V33GX=3.3V, V12CORE=V12USB=1.2V | typ 2 mA | 118 |
| USBHS 传输 | TA=25℃, VDDLDO=VDDIO=V33USB=V33GX=3.3V, V12CORE=V12USB=1.2V | typ 28 mA | 118 |
| USBSS 传输 | TA=25℃, VDDLDO=VDDIO=V33USB=V33GX=3.3V, V12CORE=V12USB=1.2V | typ 110 mA | 118 |
| HSPI | Fsys=30M; TA=25℃, VDDLDO=VDDIO=V33USB=V33GX=3.3V, V12CORE=V12USB=1.2V | typ 2 mA | 118 |
| HSPI | Fsys=60M; TA=25℃, VDDLDO=VDDIO=V33USB=V33GX=3.3V, V12CORE=V12USB=1.2V | typ 5 mA | 118 |
| HSPI | Fsys=80M; TA=25℃, VDDLDO=VDDIO=V33USB=V33GX=3.3V, V12CORE=V12USB=1.2V | typ 6 mA | 118 |
| HSPI | Fsys=96M; TA=25℃, VDDLDO=VDDIO=V33USB=V33GX=3.3V, V12CORE=V12USB=1.2V | typ 6 mA | 118 |
| HSPI | Fsys=120M; TA=25℃, VDDLDO=VDDIO=V33USB=V33GX=3.3V, V12CORE=V12USB=1.2V | typ 7 mA | 118 |
| SerDes-1.2Gbps | RX/TX 同时打开; TA=25℃, VDDLDO=VDDIO=V33USB=V33GX=3.3V, V12CORE=V12USB=1.2V | typ 60 mA | 118 |
| ECDC-240MHz | Fsys=30M; TA=25℃, VDDLDO=VDDIO=V33USB=V33GX=3.3V, V12CORE=V12USB=1.2V | typ 2.2 mA | 118 |
| ECDC-240MHz | Fsys=60M; TA=25℃, VDDLDO=VDDIO=V33USB=V33GX=3.3V, V12CORE=V12USB=1.2V | typ 2.7 mA | 118 |
| ECDC-240MHz | Fsys=80M; TA=25℃, VDDLDO=VDDIO=V33USB=V33GX=3.3V, V12CORE=V12USB=1.2V | typ 2.9 mA | 118 |
| ECDC-240MHz | Fsys=96M; TA=25℃, VDDLDO=VDDIO=V33USB=V33GX=3.3V, V12CORE=V12USB=1.2V | typ 3.2 mA | 118 |
| ECDC-240MHz | Fsys=120M; TA=25℃, VDDLDO=VDDIO=V33USB=V33GX=3.3V, V12CORE=V12USB=1.2V | typ 3.7 mA | 118 |
| ECDC-160MHz | Fsys=30M; TA=25℃, VDDLDO=VDDIO=V33USB=V33GX=3.3V, V12CORE=V12USB=1.2V | typ 0.6 mA | 118 |
| ECDC-160MHz | Fsys=60M; TA=25℃, VDDLDO=VDDIO=V33USB=V33GX=3.3V, V12CORE=V12USB=1.2V | typ 1.1 mA | 118 |
| ECDC-160MHz | Fsys=80M; TA=25℃, VDDLDO=VDDIO=V33USB=V33GX=3.3V, V12CORE=V12USB=1.2V | typ 1.4 mA | 118 |
| ECDC-160MHz | Fsys=96M; TA=25℃, VDDLDO=VDDIO=V33USB=V33GX=3.3V, V12CORE=V12USB=1.2V | typ 1.6 mA | 118 |
| ECDC-160MHz | Fsys=120M; TA=25℃, VDDLDO=VDDIO=V33USB=V33GX=3.3V, V12CORE=V12USB=1.2V | typ 2.2 mA | 118 |
| TMR+UART+SPI+PWMX | Fsys=30M; TA=25℃, VDDLDO=VDDIO=V33USB=V33GX=3.3V, V12CORE=V12USB=1.2V | typ 1.8 mA | 118 |
| TMR+UART+SPI+PWMX | Fsys=60M; TA=25℃, VDDLDO=VDDIO=V33USB=V33GX=3.3V, V12CORE=V12USB=1.2V | typ 3.5 mA | 118 |
| TMR+UART+SPI+PWMX | Fsys=80M; TA=25℃, VDDLDO=VDDIO=V33USB=V33GX=3.3V, V12CORE=V12USB=1.2V | typ 4 mA | 118 |
| TMR+UART+SPI+PWMX | Fsys=96M; TA=25℃, VDDLDO=VDDIO=V33USB=V33GX=3.3V, V12CORE=V12USB=1.2V | typ 6 mA | 118 |
| TMR+UART+SPI+PWMX | Fsys=120M; TA=25℃, VDDLDO=VDDIO=V33USB=V33GX=3.3V, V12CORE=V12USB=1.2V | typ 7.5 mA | 118 |
| Core+BUS8+DMA+SRAM | Fsys=30M; TA=25℃, VDDLDO=VDDIO=V33USB=V33GX=3.3V, V12CORE=V12USB=1.2V | typ 4 mA | 118 |
| Core+BUS8+DMA+SRAM | Fsys=60M; TA=25℃, VDDLDO=VDDIO=V33USB=V33GX=3.3V, V12CORE=V12USB=1.2V | typ 8 mA | 118 |
| Core+BUS8+DMA+SRAM | Fsys=80M; TA=25℃, VDDLDO=VDDIO=V33USB=V33GX=3.3V, V12CORE=V12USB=1.2V | typ 10.7 mA | 118 |
| Core+BUS8+DMA+SRAM | Fsys=96M; TA=25℃, VDDLDO=VDDIO=V33USB=V33GX=3.3V, V12CORE=V12USB=1.2V | typ 12.7 mA | 118 |
| Core+BUS8+DMA+SRAM | Fsys=120M; TA=25℃, VDDLDO=VDDIO=V33USB=V33GX=3.3V, V12CORE=V12USB=1.2V | typ 15.9 mA | 118 |
| 外部复位输入 RST#有效信号宽度 Trst | TA=25℃, VDDLDO=VDDIO=V33USB=V33GX=3.3V, V12CORE=V12USB=1.2V | min 50 ns | 118 |
| 上电复位后的复位延时+加载时间 Tmr | TA=25℃, VDDLDO=VDDIO=V33USB=V33GX=3.3V, V12CORE=V12USB=1.2V | min 15 · typ 27 · max 35 ms | 118 |
| 外部/软件复位输入后的复位延时+加载时间 Tsro | TA=25℃, VDDLDO=VDDIO=V33USB=V33GX=3.3V, V12CORE=V12USB=1.2V | min 3 · typ 4.4 · max 6 ms | 118 |
| 从低功耗状态退出的唤醒时间 TWAK | 空闲模式; Fsys=80MHz; TA=25℃, VDDLDO=VDDIO=V33USB=V33GX=3.3V, V12CORE=V12USB=1.2V | min 0.3 · typ 0.5 · max 1.5 us | 118 |
| 从低功耗状态退出的唤醒时间 TWAK | 暂停模式; Fsys=80MHz; TA=25℃, VDDLDO=VDDIO=V33USB=V33GX=3.3V, V12CORE=V12USB=1.2V | min 20 · typ 27 · max 40 us | 118 |
Open-source boards using it
4- 4 layers50 × 70 mm
- 4 layers105 × 72 mm
- 4 layers47.3 × 49.6 mm
Parts like it
2
CH565W
QFN-68(8X8)-20℃~+85℃ 120MHz 2.3V~3.6V 32 Bit 448KB 49 Built-in+External FLASH Others Power-on reset (POR)、Watchdog reset、Software reset、External pin reset (NRST)、Built-in general-purpose timer QFN-68(8X8) Microcontrollers (MCU/MPU/SOC) ROHSWCH (Nanjing Qinheng Microelectronics)Microcontrollers (MCU/MPU/SOC)LT268C
QFN-68QFN-68 Microcontrollers (MCU/MPU/SOC) ROHSLevetopMicrocontrollers (MCU/MPU/SOC)
Questions
Is there a KiCad symbol and footprint for the CH569W?
Yes. The symbol is EasyEDA_Cloud:CH569W and the footprint EasyEDA_Cloud:QFN-68_L8.0-W8.0-P0.40-BL-EP5.5, both drawn on this page. PCBKit places them on a board for you when you design with it.
What package is the CH569W?
QFN-68-EP(8x8), with 69 pins. Its footprint is drawn on this page.
Where is the CH569W datasheet?
WCH (Nanjing Qinheng Microelectronics) publishes it: the Datasheet link on this page opens it.
Where can I order the CH569W?
JLCPCB lists it as part C2857462, with 0 in stock; the sellers' links on this page open their listings.
What can replace the CH569W?
Parts like it in the library: the CH565W by WCH (Nanjing Qinheng Microelectronics) and the LT268C by Levetop. Check their datasheets: a part that fits the footprint may still differ in its ratings.
Which open-source boards use the CH569W?
4 boards in 4 repositories on GitHub; the most starred are listed on this page, with their KiCad files.