
Circuit board design
ImperialSpaceSociety/Project-Mach-1
This is the code and hardware designs for the high powered rocketry project at the Imperial College Space Society
Vishay IntertechnologyExtended
-55℃~+150℃ 1.22nF 13.5mΩ@4.5V 180pF 18nC@4.5V 1V 2 N-Channel 20V 23W 25A 80pF N-Channel PowerPAK1212-8 MOSFETs ROHS
The SI7232DN is a MOSFET made by Vishay Intertechnology in a PowerPAK1212-8 package with 6 pins. -55℃~+150℃ 1.22nF 13.5mΩ@4.5V 180pF 18nC@4.5V 1V 2 N-Channel 20V 23W 25A 80pF N-Channel PowerPAK1212-8 MOSFETs ROHS.
PCBKit's library has its KiCad symbol (Transistors:SI7232DN, from CERN's library) and its footprint (ICs And Semiconductors SMD:VISHAY_POWERPAK-1212-8-DUAL, from CERN's library), ready for a KiCad board. JLCPCB lists it (part C144854). 8 open-source boards in 6 repositories on GitHub use it.
| Parameter | Conditions | As printed | Page |
|---|---|---|---|
| Drain-Source Voltage VDS | TA = 25 °C | max 20 V | 1 |
| Gate-Source Voltage VGS | TA = 25 °C | min -8 · max 8 V | 1 |
| Continuous Drain Current (TJ = 150 °C) ID | TC = 25 °C; package limited | max 25 A | 1 |
| Continuous Drain Current (TJ = 150 °C) ID | TC = 70 °C | max 23.8 A | 1 |
| Continuous Drain Current (TJ = 150 °C) ID | TA = 25 °C; surface mounted on 1 inch square FR4 board; t = 10 s | max 10 A | 1 |
| Continuous Drain Current (TJ = 150 °C) ID | TA = 70 °C; surface mounted on 1 inch square FR4 board; t = 10 s | max 8 A | 1 |
| Pulsed Drain Current IDM | TA = 25 °C | max 40 A | 1 |
| Continuous Source-Drain Diode Current IS | TC = 25 °C | max 19 A | 1 |
| Continuous Source-Drain Diode Current IS | TA = 25 °C; surface mounted on 1 inch square FR4 board; t = 10 s | max 2.2 A | 1 |
| Single Pulse Avalanche Current IAS | L = 0.1 mH | max 15 A | 1 |
| Single Pulse Avalanche Energy EAS | L = 0.1 mH | max 11 mJ | 1 |
| Maximum Power Dissipation PD | TC = 25 °C | max 23 W | 1 |
| Maximum Power Dissipation PD | TC = 70 °C | max 14.8 W | 1 |
| Maximum Power Dissipation PD | TA = 25 °C; surface mounted on 1 inch square FR4 board; t = 10 s | max 2.6 W | 1 |
| Maximum Power Dissipation PD | TA = 70 °C; surface mounted on 1 inch square FR4 board; t = 10 s | max 1.7 W | 1 |
| Operating Junction and Storage Temperature Range TJ, Tstg | min -55 · max 150 °C | 1 | |
| Soldering Recommendations (Peak Temperature) | See solder profile; manual soldering with a soldering iron is not recommended | max 260 °C | 1 |
| Maximum Junction-to-Ambient RthJA | PowerPAK 1212-8 Dual; t ≤ 10 s; surface mounted on 1 inch square FR4 board | typ 38 · max 48 °C/W | 1 |
| Maximum Junction-to-Ambient RthJA | PowerPAK 1212-8 Dual; steady state; surface mounted on 1 inch square FR4 board | max 94 °C/W | 1 |
| Maximum Junction-to-Case (Drain) RthJC | PowerPAK 1212-8 Dual; Steady State | typ 4.3 · max 5.4 °C/W | 1 |
| Drain-Source Breakdown Voltage VDS | VGS = 0 V, ID = 250 uA | min 20 V | 2 |
| VDS Temperature Coefficient VDS/TJ | ID = 250 uA | typ 22 mV/°C | 2 |
| VGS(th) Temperature Coefficient VGS(th)/TJ | ID = 250 uA | typ -3 mV/°C | 2 |
| Gate-Source Threshold Voltage VGS(th) | VDS = VGS , ID = 250 uA | min 0.4 · max 1 V | 2 |
| Gate-Source Leakage IGSS | VDS = 0 V, VGS = ± 8 V; maximum magnitude ±100 nA | max 100 nA | 2 |
| Zero Gate Voltage Drain Current IDSS | VDS = 20 V, VGS = 0 V | max 1 uA | 2 |
| Zero Gate Voltage Drain Current IDSS | VDS = 20 V, VGS = 0 V, TJ = 55 °C | max 10 uA | 2 |
| On-State Drain Current ID(on) | VDS ≥ 5 V, VGS = 10 V; pulse width ≤ 300 us, duty cycle ≤ 2 % | min 20 A | 2 |
| Drain-Source On-State Resistance RDS(on) | VGS = 4.5 V, ID = 10 A; pulse width ≤ 300 us, duty cycle ≤ 2 % | typ 0.0135 · max 0.0164 | 2 |
| Drain-Source On-State Resistance RDS(on) | VGS = 2.5 V, ID = 9 A; pulse width ≤ 300 us, duty cycle ≤ 2 % | typ 0.016 · max 0.02 | 2 |
| Drain-Source On-State Resistance RDS(on) | VGS = 1.8 V, ID = 8.2 A; pulse width ≤ 300 us, duty cycle ≤ 2 % | typ 0.019 · max 0.024 | 2 |
| Forward Transconductance gfs | VDS = 10 V, ID = 10 A; pulse width ≤ 300 us, duty cycle ≤ 2 % | typ 47 S | 2 |
| Input Capacitance Ciss | VDS = 10 V, VGS = 0 V, f = 1 MHz; guaranteed by design | typ 1220 pF | 2 |
| Output Capacitance Coss | VDS = 10 V, VGS = 0 V, f = 1 MHz; guaranteed by design | typ 180 pF | 2 |
| Reverse Transfer Capacitance Crss | VDS = 10 V, VGS = 0 V, f = 1 MHz; guaranteed by design | typ 80 pF | 2 |
| Total Gate Charge Qg | VDS = 15 V, VGS = 8 V, ID = 10 A; guaranteed by design | typ 21 · max 32 nC | 2 |
| Total Gate Charge Qg | VDS = 15 V, VGS = 4.5 V, ID = 10 A; guaranteed by design | typ 12 · max 18 nC | 2 |
| Gate-Source Charge Qgs | VDS = 15 V, VGS = 4.5 V, ID = 10 A; guaranteed by design | typ 2 nC | 2 |
| Gate-Drain Charge Qgd | VDS = 15 V, VGS = 4.5 V, ID = 10 A; guaranteed by design | typ 1.3 nC | 2 |
| Gate Resistance Rg | f = 1 MHz; guaranteed by design | typ 1.8 · max 3.6 | 2 |
| Turn-On Delay Time td(on) | VDD = 10 V, RL = 1.25 , ID ≅ 8 A, VGEN = 4.5 V, Rg = 1 ; guaranteed by design | typ 10 · max 15 ns | 2 |
| Rise Time tr | VDD = 10 V, RL = 1.25 , ID ≅ 8 A, VGEN = 4.5 V, Rg = 1 ; guaranteed by design | typ 10 · max 15 ns | 2 |
| Turn-Off Delay Time td(off) | VDD = 10 V, RL = 1.25 , ID ≅ 8 A, VGEN = 4.5 V, Rg = 1 ; guaranteed by design | typ 35 · max 55 ns | 2 |
| Fall Time tf | VDD = 10 V, RL = 1.25 , ID ≅ 8 A, VGEN = 4.5 V, Rg = 1 ; guaranteed by design | typ 10 · max 15 ns | 2 |
| Turn-On Delay Time td(on) | VDD = 10 V, RL = 1.25 , ID ≅ 8 A, VGEN = 8 V, Rg = 1 ; guaranteed by design | typ 10 · max 15 ns | 2 |
| Rise Time tr | VDD = 10 V, RL = 1.25 , ID ≅ 8 A, VGEN = 8 V, Rg = 1 ; guaranteed by design | typ 10 · max 15 ns | 2 |
| Turn-Off Delay Time td(off) | VDD = 10 V, RL = 1.25 , ID ≅ 8 A, VGEN = 8 V, Rg = 1 ; guaranteed by design | typ 25 · max 40 ns | 2 |
| Fall Time tf | VDD = 10 V, RL = 1.25 , ID ≅ 8 A, VGEN = 8 V, Rg = 1 ; guaranteed by design | typ 10 · max 15 ns | 2 |
| Continuous Source-Drain Diode Current IS | TC = 25 °C | max 19 A | 2 |
| Pulse Diode Forward Current ISM | TJ = 25 °C | max 40 A | 2 |
| Body Diode Voltage VSD | IS = 8 A, VGS = 0 V | typ 0.81 · max 1.2 V | 2 |
| Body Diode Reverse Recovery Time trr | IF = 8 A, dI/dt = 100 A/us, TJ = 25 °C | typ 20 · max 30 ns | 2 |
| Body Diode Reverse Recovery Charge Qrr | IF = 8 A, dI/dt = 100 A/us, TJ = 25 °C | typ 15 · max 25 nC | 2 |
| Reverse Recovery Fall Time ta | IF = 8 A, dI/dt = 100 A/us, TJ = 25 °C | typ 12.5 ns | 2 |
| Reverse Recovery Rise Time tb | IF = 8 A, dI/dt = 100 A/us, TJ = 25 °C | typ 7.5 ns | 2 |

ImperialSpaceSociety/Project-Mach-1
This is the code and hardware designs for the high powered rocketry project at the Imperial College Space Society


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Terrapin-Rocket-Team/SRAD-Avionics
Code and PCBs for the avionics subteam for the SRAD flight computer and side projects

ImperialSpaceSociety/Project-Mach-1
This is the code and hardware designs for the high powered rocketry project at the Imperial College Space Society
Yes. The symbol is Transistors:SI7232DN and the footprint ICs And Semiconductors SMD:VISHAY_POWERPAK-1212-8-DUAL, both drawn on this page. PCBKit places them on a board for you when you design with it.
PowerPAK1212-8, with 6 pins. Its footprint is drawn on this page.
Vishay Intertechnology publishes it: the Datasheet link on this page opens it.
JLCPCB lists it as part C144854, with 0 in stock; the sellers' links on this page open their listings.
8 boards in 6 repositories on GitHub; the most starred are listed on this page, with their KiCad files.