TPS3430WDRC

Texas InstrumentsExtended

VSON-10-EP(3x3) Timers / Counters ROHS

Part id: ti/TPS3430WDRC
Category: Timers, Counters
Package: VSON-10-EP(3x3)
Pins: 11
In stock: 363 at JLCPCB (C2870545)
Used on: 2 open-source boards

Overview

The TPS3430WDRC is a timers, Counter made by Texas Instruments in a VSON-10-EP(3x3) package with 11 pins. VSON-10-EP(3x3) Timers / Counters ROHS.

PCBKit's library has its KiCad symbol (Power_Supervisor:TPS3430WDRC, from KiCad's library) and its footprint (Package_SON:VSON-10-1EP_3x3mm_P0.5mm_EP1.65x2.4mm, from KiCad's library), ready for a KiCad board. 363 are in stock at JLCPCB (part C2870545). 2 open-source boards in 1 repository on GitHub use it.

Symbol

Power_Supervisor:TPS3430WDRCFrom KiCad's library

Footprint

Package_SON:VSON-10-1EP_3x3mm_P0.5mm_EP1.65x2.4mmFrom KiCad's library

From the datasheet

Supply, least: 1.6 V · VDD1, VDD2, recommended operating min · p. 4
Supply, most: 6.5 V · VDD1, VDD2, recommended operating max · p. 4
Supply, absolute maximum: 7 V · VDD1, VDD2, absolute max · p. 4
Junction, hottest: 150 °C · Operating junction temperature absolute max · p. 4
Takes working: 10 µA · IDD, operating supply current typical · p. 5
Takes at most: 19 µA · IDD, operating supply current max · p. 5
A pin gives at most: 20 mA · WDO source or sink absolute max · p. 4
Junction to air (DRC (VSON)): 50.9 K/W · Junction-to-ambient thermal resistance · p. 5
Junction to board (DRC (VSON)): 25.4 K/W · Junction-to-board thermal resistance · p. 5
Junction to case (DRC (VSON)): 50.6 K/W · Junction-to-case top thermal resistance · p. 5

What it is and has

Function: Window watchdog timer with programmable reset delay · p. 1
Watchdog disable: Supported · p. 1
Watchdog timeout: User-programmable · p. 1
Watchdog reset delay: User-programmable · p. 1
Output: Open-drain · p. 1
Package: 3-mm × 3-mm, 10-Pin VSON · p. 1

Around it

cap 0.1-µF: between VDD1 and GND; Bypass capacitor recommended for noisy systems. · p. 3
res 1-kΩ to 100-kΩ: between WDO and VDD or another power supply; Pull-up for the open-drain active-low watchdog output. · p. 3
res 10-kΩ: between CWD and VDD; Required when selecting factory-programmed timing using a pull-up. · p. 14
res 10-kΩ: between CRST and VDD; Optional factory-programmed watchdog reset delay selection. · p. 16
cap 100 pF to 1 µF: between CWD and GND; Adjustable watchdog timeout; ceramic COG dielectric recommended for greatest timing accuracy. · p. 18
cap 100 pF to 1 µF: between CRST and GND; Programs reset delay; use high-quality ceramic COG, X5R, or X7R dielectric and minimize parasitic board capacitance. · p. 16

Specifications

Parameter	Conditions	As printed	Page
Supply voltage range	VDD1, VDD2; over operating free-air temperature range	min -0.3 · max 7 V	4
Output voltage range	WDO; over operating free-air temperature range	min -0.3 · max 7 V	4
Voltage ranges	SET0, SET1, WDI	min -0.3 · max 7 V	4
Voltage ranges	CWD, CRST; maximum VDD + 0.3 V or 7.0 V, whichever is smaller	min -0.3 V	4
Output pin current	WDO; ±20 mA	min -20 · max 20 mA	4
Input current (all pins)	±20 mA	min -20 · max 20 mA	4
Temperature TJ	Operating junction	min -40 · max 150 °C	4
Temperature TA	Operating free-air temperature	min -40 · max 150 °C	4
Temperature Tstg	Storage	min -65 · max 150 °C	4
Electrostatic discharge V(ESD)	Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001; ±4000 V	min -4000 · max 4000 V	4
Electrostatic discharge V(ESD)	Charged-device model (CDM), per JEDEC specification JESD22-C101; ±1000 V	min -1000 · max 1000 V	4
Supply pin voltage VDD1, VDD2	Over operating free-air temperature range	min 1.6 · max 6.5 V	4
SET0 pin voltage VSET0	Over operating free-air temperature range	min 0 · max 6.5 V	4
SET1 pin voltage VSET1	Over operating free-air temperature range	min 0 · max 6.5 V	4
WD reset delay capacitor CCRST		min 0.1 · max 1000 nF	4
Pull-up resistor to VDD RCRST	NOM column represented by typ	min 9 · typ 10 · max 11 kΩ	4
Watchdog timing capacitor CCWD		min 0.1 · max 1000 nF	4
Pull-up resistor to VDD CWD	NOM column represented by typ	min 9 · typ 10 · max 11 kΩ	4
Pull-up resistor, WDO RPU	NOM column represented by typ	min 1 · typ 10 · max 100 kΩ	4
Watchdog output current IWDO		max 10 mA	4
Junction Temperature TJ		min -40 · max 125 °C	4
Junction-to-ambient thermal resistance RθJA	TPS3430; DRC (VSON), 10 PINS	typ 50.9 °C/W	5
Junction-to-case (top) thermal resistance RθJC(top)	TPS3430; DRC (VSON), 10 PINS	typ 50.6 °C/W	5
Junction-to-board thermal resistance RθJB	TPS3430; DRC (VSON), 10 PINS	typ 25.4 °C/W	5
Junction-to-top characterization parameter ψJT	TPS3430; DRC (VSON), 10 PINS	typ 1.2 °C/W	5
Junction-to-board characterization parameter ψJB	TPS3430; DRC (VSON), 10 PINS	typ 25.5 °C/W	5
Junction-to-case (bottom) thermal resistance RθJC(bot)	TPS3430; DRC (VSON), 10 PINS	typ 7.3 °C/W	5
Supply voltage VDD1,VDD2	−40°C ≤ TJ ≤ +125°C; typical values at TJ = 25°C	min 1.6 · max 6.5 V	5
Supply current IDD	1.6 V ≤ VDD ≤ 6.5 V; −40°C ≤ TJ ≤ +125°C; typical at TJ = 25°C	typ 10 · max 19 uA	5
Power-on reset voltage VPOR	VOL(MAX) = 0.25 V	max 0.8 V	5
CRST pin charge current ICRST	CRST = 0.5 V	min 337 · typ 375 · max 413 nA	5
CRST pin threshold voltage VCRST	1.6 V ≤ VDD ≤ 6.5 V; −40°C ≤ TJ ≤ +125°C; typical at TJ = 25°C	min 1.192 · typ 1.21 · max 1.228 V	5
CWD pin charge current ICWD	CWD = 0.5 V	min 347 · typ 375 · max 403 nA	5
CWD pin threshold voltage VCWD	1.6 V ≤ VDD ≤ 6.5 V; −40°C ≤ TJ ≤ +125°C; typical at TJ = 25°C	min 1.196 · typ 1.21 · max 1.224 V	5
WDO output low VOL	VDD = 5 V, ISINK = 3 mA	max 0.4 V	5
WDO output leakage current ID	VDD = 1.6 V, VWDO = 6.5 V	max 1 uA	5
Low-level input voltage (SET0, SET1) VIL		max 0.25 V	5
High-level input voltage (SET0, SET1) VIH		min 0.8 V	5
WDO DELAY TIME (tRST) tRST	CRST = NC	min 170 · typ 200 · max 230 ms	16
WDO DELAY TIME (tRST) tRST	CRST = 10 kΩ to VDD	min 8.5 · typ 10 · max 11.5 ms	16
WDO DELAY TIME (tRST) tRST	CCRST = 100 pF; ideal capacitor	min 0.61 · typ 0.7 · max 0.8 ms	17
WDO DELAY TIME (tRST) tRST	CCRST = 1 nF; ideal capacitor	min 3.21 · typ 3.61 · max 4.08 ms	17
WDO DELAY TIME (tRST) tRST	CCRST = 10 nF; ideal capacitor	min 29.2 · typ 32.6 · max 36.8 ms	17
WDO DELAY TIME (tRST) tRST	CCRST = 100 nF; ideal capacitor	min 289 · typ 323 · max 364 ms	17
WDO DELAY TIME (tRST) tRST	CCRST = 1 uF; ideal capacitor	min 2886 · typ 3227 · max 3644 ms	17
WATCHDOG LOWER BOUNDARY (tWDL) tWDL	CWD = NC; SET0 = 0; SET1 = 0	min 19.1 · typ 22.5 · max 25.9 ms	18
WATCHDOG UPPER BOUNDARY (tWDU) tWDU	CWD = NC; SET0 = 0; SET1 = 0	min 46.8 · typ 55 · max 63.3 ms	18
WATCHDOG LOWER BOUNDARY (tWDL) tWDL	CWD = NC; SET0 = 0; SET1 = 1	min 1.48 · typ 1.85 · max 2.22 ms	18
WATCHDOG UPPER BOUNDARY (tWDU) tWDU	CWD = NC; SET0 = 0; SET1 = 1	min 23.375 · typ 27.5 · max 31.625 ms	18
WATCHDOG LOWER BOUNDARY (tWDL) tWDL	CWD = NC; SET0 = 1; SET1 = 1	min 680 · typ 800 · max 920 ms	18
WATCHDOG UPPER BOUNDARY (tWDU) tWDU	CWD = NC; SET0 = 1; SET1 = 1	min 1360 · typ 1600 · max 1840 ms	18
WATCHDOG LOWER BOUNDARY (tWDL) tWDL	CWD = 10 kΩ to VDD; SET0 = 0; SET1 = 0	min 7.65 · typ 9 · max 10.35 ms	18
WATCHDOG UPPER BOUNDARY (tWDU) tWDU	CWD = 10 kΩ to VDD; SET0 = 0; SET1 = 0	min 92.7 · typ 109 · max 125.4 ms	18
WATCHDOG LOWER BOUNDARY (tWDL) tWDL	CWD = 10 kΩ to VDD; SET0 = 0; SET1 = 1	min 7.65 · typ 9 · max 10.35 ms	18
WATCHDOG UPPER BOUNDARY (tWDU) tWDU	CWD = 10 kΩ to VDD; SET0 = 0; SET1 = 1	min 165.8 · typ 195 · max 224.3 ms	18
WATCHDOG LOWER BOUNDARY (tWDL) tWDL	CWD = 10 kΩ to VDD; SET0 = 1; SET1 = 1	min 1.48 · typ 1.85 · max 2.22 ms	18
WATCHDOG UPPER BOUNDARY (tWDU) tWDU	CWD = 10 kΩ to VDD; SET0 = 1; SET1 = 1	min 9.35 · typ 11 · max 12.65 ms	18
WATCHDOG UPPER BOUNDARY (tWDU) tWDU	CCWD = 100 pF; ideal capacitor	min 56.77 · typ 62.74 · max 68.7 ms	18
WATCHDOG UPPER BOUNDARY (tWDU) tWDU	CCWD = 1 nF; ideal capacitor	min 119.82 · typ 132.4 · max 144.98 ms	18
WATCHDOG UPPER BOUNDARY (tWDU) tWDU	CCWD = 10 nF; ideal capacitor	min 750 · typ 829 · max 908 ms	18
WATCHDOG UPPER BOUNDARY (tWDU) tWDU	CCWD = 100 nF; ideal capacitor	min 7054 · typ 7795 · max 8536 ms	18
WATCHDOG UPPER BOUNDARY (tWDU) tWDU	CCWD = 1 uF; ideal capacitor	min 70096 · typ 77455 · max 84814 ms	18

Pins, by the datasheet

1 VDD1: Supply voltage pin; a 0.1-uF bypass capacitor is recommended for noisy systems. · p. 3
2 CWD: Programmable watchdog timeout input; connect a capacitor to ground, a 10-kΩ resistor to VDD, or leave unconnected to select timing options. · p. 3
3 SET0: Logic input; with SET1 and CWD selects watchdog window ratios, timeouts, and watchdog disable. · p. 3
4 CRST: Programmable watchdog reset delay; connect a capacitor to GND, a 10-kΩ pull-up to VDD, or leave unconnected for timing options. · p. 3
5 GND: Ground pin. · p. 3
6 SET1: Logic input; with SET0 and CWD selects watchdog window ratios, timeouts, and watchdog disable. · p. 3
7 WDI: Watchdog input triggered by a falling edge within the watchdog window; drive to VDD or GND when the watchdog is disabled. · p. 3
8 WDO: Active-low watchdog output; asserts for the programmed reset delay on a watchdog timeout; connect a 1-kΩ to 100-kΩ pull-up to VDD or another supply. · p. 3
9 NC: No-connect; must be left floating. · p. 3
10 VDD2: Must be externally connected to VDD1 for proper operation. · p. 3
Thermal pad Thermal pad: Internally connected to GND; connect to a large-area ground plane. · p. 3

Parameters

Current - Supply: 10uA
Current - Supply(Max): 19uA
Features: Watchdog timer
Junction Temperature(Max): 150℃
Operating Temperature: -40℃~+125℃
Output Current per Pin(Max): 20mA
Programmable: Yes
Thermal Resistance(Junction to Ambient): 50.9℃/W
Thermal Resistance(Junction to Board): 25.4℃/W
Thermal Resistance(Junction to Case): 50.6℃/W
Timer Number: 1
Voltage - Supply: 1.6V~6.5V
Voltage - Supply(Absolute Max): 7V

Order codes

TPS3430WDRCRLCSC C2870545

Pinout

The pins of the TPS3430WDRC
Pin	Name	Type
1	VDD1	Power in
2	CWD	Passive
3	SET0	Input
4	CRST	Passive
5	GND	Power in
6	SET1	Input
7	WDI	Input
8	WDO	Open collector
9	NC	Not connected
10	VDD2	Power in
11	GND	Passive

Show this part on your page

<iframe src="https://pcbkit.io/embed/parts/ti/TPS3430WDRC" title="TPS3430WDRC in PCBKit" width="100%" height="480" style="border:0;border-radius:12px" allow="fullscreen" loading="lazy"></iframe>

For any web page: the part itself, turned and zoomed by the reader.

Open-source boards using it

2 layers65 × 56 mm
PIHAT
JMUWRobotics/AMADEE-27

29 parts1MIT
2 layers128.5 × 56 mm
PIHAT rounded
JMUWRobotics/AMADEE-27

79 parts1MIT

Questions

Is there a KiCad symbol and footprint for the TPS3430WDRC?

Yes. The symbol is Power_Supervisor:TPS3430WDRC and the footprint Package_SON:VSON-10-1EP_3x3mm_P0.5mm_EP1.65x2.4mm, both drawn on this page. PCBKit places them on a board for you when you design with it.

What package is the TPS3430WDRC?

VSON-10-EP(3x3), with 11 pins. Its footprint is drawn on this page.

Where is the TPS3430WDRC datasheet?

Texas Instruments publishes it: the Datasheet link on this page opens it.

Where can I order the TPS3430WDRC?

JLCPCB lists it as part C2870545, with 363 in stock; the sellers' links on this page open their listings.

Which open-source boards use the TPS3430WDRC?

2 boards in 1 repository on GitHub; the most starred are listed on this page, with their KiCad files.