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TLV9004ID, in 3D

TLV9004ID

Texas Instruments

-2.75V~-900mV、900mV~2.75V -40℃~+125℃ 1.8V~5.5V 1MHz 27nV/√Hz@1kHz 2V/us 2pA 4 400uV 40mA 5pA 600nV/℃ 60uA 86dB EMI filtering/RF suppression Rail-to-Rail Input, Rail-to-Rail Output SOIC-14 Operational Amplifier ROHS

Extended
Category
Operational Amplifier
Package
SOIC-14
Pins
14

Overview

The TLV9004ID is an operational Amplifier made by Texas Instruments in a SOIC-14 package with 14 pins. -2.75V~-900mV、900mV~2.75V -40℃~+125℃ 1.8V~5.5V 1MHz 27nV/√Hz@1kHz 2V/us 2pA 4 400uV 40mA 5pA 600nV/℃ 60uA 86dB EMI filtering/RF suppression Rail-to-Rail Input, Rail-to-Rail Output SOIC-14 Operational Amplifier ROHS.

PCBKit's library has its KiCad symbol (EasyEDA_Cloud:AD8544ARUZ-REEL-TUDI, from EasyEDA) and its footprint (Package_SO:SOIC-14_3.9x8.7mm_P1.27mm, from KiCad's library), ready for a KiCad board. 2,827 are in stock at JLCPCB (part C2058000). 2 open-source boards in 2 repositories on GitHub use it.

Symbol

IN1-2IN1+3V-11OUT11V+4
EasyEDA_Cloud:AD8544ARUZ-REEL-TUDIFrom EasyEDA

Footprint

1234567891011121314
Package_SO:SOIC-14_3.9x8.7mm_P1.27mmFrom KiCad's library

From the datasheet

10
Supply, least
1.8 V · V+ – V–, recommended operating minimum · p. 14
Supply, most
5.5 V · V+ – V–, recommended operating maximum · p. 14
Supply, absolute maximum
7 V · V+ – V–, absolute maximum · p. 14
Works from
-40 °C · Specified operating ambient minimum · p. 14
Works up to
125 °C · Specified operating ambient maximum · p. 14
Junction, hottest
150 °C · Junction absolute maximum · p. 14
Junction to air (D (SOIC))
102.1 K/W · Junction-to-ambient thermal resistance · p. 16
Junction to case (D (SOIC))
56.8 K/W · Junction-to-case (top) thermal resistance · p. 16
Junction to board (D (SOIC))
58.5 K/W · Junction-to-board thermal resistance · p. 16
Takes working
60 µA · typical quiescent current per amplifier, IO = 0 mA, VS = 5.5 V · p. 18

What it is and has

6
Input and output
Rail-to-rail · p. 1
Unity-gain bandwidth
1 MHz · p. 1
Unity-gain stable
Yes · p. 1
Filter
Internal RFI and EMI filter · p. 1
Input bias current
5 pA · p. 1
Stability
Unity-gain stable · p. 1

Around it

3
cap 0.1 µF
between V+ and GND; Low-ESR ceramic, placed close to the supply pin; adequate alone for single-supply operation. · p. 35
res 57.6 kΩ
between OUT and IN–; RF in the example low-side current-sensing circuit, providing gain 49 V/V with RG = 1.2 kΩ. · p. 29
res 1.2 kΩ
between IN– and GND; RG in the example low-side current-sensing circuit, providing gain 49 V/V with RF = 57.6 kΩ. · p. 29

Specifications

57
ParameterConditionsAs printedPage
Supply voltage (V+) – (V–)Over operating temperature rangemax 7 V14
Signal input pins CurrentInput pins are diode-clamped to the power-supply railsmin -10 · max 10 mA14
Operating, TA TAmin -55 · max 150 °C14
Junction, TJ TJmax 150 °C14
Storage, Tstg Tstgmin -65 · max 150 °C14
Electrostatic discharge V(ESD)All other packages; human-body model (HBM), per ANSI/ESDA/JEDEC JS-001; rating ±2000 Vmax 2000 V14
Electrostatic discharge V(ESD)All other packages; charged-device model (CDM), per JEDEC specification JESD22-C101; rating ±1000 Vmax 1000 V14
Supply voltage VSOver operating temperature rangemin 1.8 · max 5.5 V14
Specified temperature TAmin -40 · max 125 °C14
Junction-to-ambient thermal resistance RθJATLV9004, D (SOIC), 14 pinstyp 102.1 °C/W16
Junction-to-case (top) thermal resistance RθJC(top)TLV9004, D (SOIC), 14 pinstyp 56.8 °C/W16
Junction-to-board thermal resistance RθJBTLV9004, D (SOIC), 14 pinstyp 58.5 °C/W16
Junction-to-top characterization parameter ψJTTLV9004, D (SOIC), 14 pinstyp 20.5 °C/W16
Junction-to-board characterization parameter ψJBTLV9004, D (SOIC), 14 pinstyp 58.1 °C/W16
Input offset voltage VOSVS = 5 V; typical and maximum are ± valuestyp 0.4 · max 1.6 mV17
Input offset voltage VOSVS = 5 V, TA = –40°C to 125°C; maximum ±2 mVmax 2 mV17
VOS vs temperature dVOS/dTTA = –40°C to 125°C; typical ±0.6 uV/°Ctyp 0.6 uV/°C17
Power-supply rejection ratio PSRRVS = 1.8 to 5.5 V, VCM = (V–)min 80 · typ 105 dB17
Common-mode rejection ratio CMRRVS = 1.8 V, (V–) – 0.1 V < VCM < (V+) – 1.4 V, TA = –40°C to 125°Ctyp 86 dB17
Common-mode rejection ratio CMRRVS = 5.5 V, (V–) – 0.1 V < VCM < (V+) – 1.4 V, TA = –40°C to 125°Ctyp 95 dB17
Common-mode rejection ratio CMRRVS = 5.5 V, (V–) – 0.1 V < VCM < (V+) + 0.1 V, TA = –40°C to 125°Cmin 63 · typ 77 dB17
Common-mode rejection ratio CMRRVS = 1.8 V, (V–) – 0.1 V < VCM < (V+) + 0.1 V, TA = –40°C to 125°Ctyp 68 dB17
Input bias current IBVS = 5 V; typical ±5 pAtyp 5 pA17
Input offset current IOSTypical ±2 pAtyp 2 pA17
Input voltage noise (peak-to-peak) Enƒ = 0.1 Hz to 10 Hz, VS = 5 Vtyp 4.7 uVPP17
Input voltage noise density enƒ = 1 kHz, VS = 5 Vtyp 30 nV/√ Hz17
Input voltage noise density enƒ = 10 kHz, VS = 5 Vtyp 27 nV/√ Hz17
Input current noise density inƒ = 1 kHz, VS = 5 Vtyp 23 fA/√ Hz17
Differential CIDInput capacitancetyp 1.5 pF17
Common-mode CICInput capacitancetyp 5 pF17
Open-loop voltage gain AOLVS = 5.5 V, (V–) + 0.05 V < VO < (V+) – 0.05 V, RL = 10 kΩmin 104 · typ 117 dB17
Open-loop voltage gain AOLVS = 1.8 V, (V–) + 0.04 V < VO < (V+) – 0.04 V, RL = 10 kΩtyp 100 dB17
Open-loop voltage gain AOLVS = 1.8 V, (V–) + 0.1 V < VO < (V+) – 0.1 V, RL = 2 kΩtyp 115 dB17
Open-loop voltage gain AOLVS = 5.5 V, (V–) + 0.15 V < VO < (V+) – 0.15 V, RL = 2 kΩtyp 130 dB17
Gain-bandwidth product GBWVS = 5 Vtyp 1 MHz17
Phase margin φmVS = 5.5 V, G = 1typ 78 °17
Slew rate SRVS = 5 Vtyp 2 V/us17
Settling time tSTo 0.1%, VS = 5 V, 2-V step, G = +1, CL = 100 pFtyp 2.5 us17
Settling time tSTo 0.01%, VS = 5 V, 2-V step, G = +1, CL = 100 pFtyp 3 us17
Overload recovery time tORVS = 5 V, VIN × gain > VStyp 0.85 us17
Total harmonic distortion + noise THD+NVS = 5.5 V, VCM = 2.5 V, VO = 1 VRMS, G = +1, ƒ = 1 kHz, 80-kHz measurement BWtyp 0.004 %17
Voltage output swing from supply rails VOVS = 5.5 V, RL = 10 kΩtyp 10 · max 20 mV17
Voltage output swing from supply rails VOVS = 5.5 V, RL = 2 kΩtyp 35 · max 55 mV17
Short-circuit current ISCVS = 5.5 V; typical ±40 mAtyp 40 mA17
Open-loop output impedance ZOVS = 5 V, ƒ = 1 MHztyp 1200 Ω17
Specified voltage range VSTotal supply; equivalent split supply ±0.9 V to ±2.75 Vmin 1.8 · max 5.5 V18
Quiescent current per amplifier IQTLV9004; IO = 0 mA, VS = 5.5 Vtyp 60 · max 75 uA18
Quiescent current per amplifier IQTLV9004; IO = 0 mA, VS = 5.5 V, TA = –40°C to 125°Cmax 85 uA18
Input offset voltage VOSVS = 5 V, TA = 25°Ctyp 0.4 · max 1.6 mV17
Input offset voltage VOSVS = 5 V, TA = –40°C to 125°C; limits are ±max 2 mV17
VOS vs temperature dVOS/dTTA = –40°C to 125°C; typical is ±typ 0.6 uV/°C17
Input bias current IBVS = 5 V; typical is ±typ 5 pA17
Input offset current IOSTA = 25°C; typical is ±typ 2 pA17
Short-circuit current ISCVS = 5.5 V; typical is ±typ 40 mA17
Specified voltage range VSSingle supply; equivalent split supply ±0.9 V to ±2.75 Vmin 1.8 · max 5.5 V18
Quiescent current per amplifier IQTLV9004, IO = 0 mA, VS = 5.5 V, TA = 25°Ctyp 60 · max 75 uA18
Quiescent current per amplifier IQTLV9004, IO = 0 mA, VS = 5.5 V, TA = –40°C to 125°Cmax 85 uA18

Parameters

22
Common Mode Rejection Ratio(CMRR)
86dB
Current - Supply
60uA
Dual Supply
900mV~2.75V
Features
EMI filtering/RF suppression
Gain Bandwidth Product
1MHz
Ib - Input Bias Current
5pA
Input Offset Current(Ios)
2pA
Input Offset Voltage Drift(Vos TC)
600nV/℃
Input Voltage Noise Density
27nV/√Hz@1kHz
Junction Temperature(Max)
150℃
Number of Channels
4
Operating Temperature
-40℃~+125℃
Output Current
40mA
Quiescent Current
60uA
Rail to Rail
Rail-to-Rail Input, Rail-to-Rail Output
Single supply
1.8V~5.5V
Slew Rate
2V/us
Thermal Resistance(Junction to Ambient)
102.1℃/W
Thermal Resistance(Junction to Board)
58.5℃/W
Thermal Resistance(Junction to Case)
56.8℃/W
Voltage - Supply(Absolute Max)
7V
Vos - Input Offset Voltage
400uV

Order codes

1

Pinout

14
The pins of the TLV9004ID
PinNameType
1OUT1Output
2IN1-Unspecified
3IN1+Unspecified
4V+Unspecified
5IN2+Unspecified
6IN2-Unspecified
7OUT2Output
8OUT3Output
9IN3-Unspecified
10IN3+Unspecified
11V-Unspecified
12IN4+Unspecified
13IN4-Unspecified
14OUT4Output

Open-source boards using it

All 2
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Questions

Is there a KiCad symbol and footprint for the TLV9004ID?

Yes. The symbol is EasyEDA_Cloud:AD8544ARUZ-REEL-TUDI and the footprint Package_SO:SOIC-14_3.9x8.7mm_P1.27mm, both drawn on this page. PCBKit places them on a board for you when you design with it.

What package is the TLV9004ID?

SOIC-14, with 14 pins. Its footprint is drawn on this page.

Where is the TLV9004ID datasheet?

Texas Instruments publishes it: the Datasheet link on this page opens it.

Where can I order the TLV9004ID?

JLCPCB lists it as part C2058000, with 2,827 in stock; the sellers' links on this page open their listings.

What can replace the TLV9004ID?

Parts like it in the library: the LM324D by onsemi, the LM2902DT by STMicroelectronics, the LM324DT by STMicroelectronics and the LMV324ID by Texas Instruments. Check their datasheets: a part that fits the footprint may still differ in its ratings.

Which open-source boards use the TLV9004ID?

2 boards in 2 repositories on GitHub; the most starred are listed on this page, with their KiCad files.

Parts like it

8