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TLV75530PDBV

Texas InstrumentsExtended

-40℃~+125℃@(Tj) 1 238mV@(500mA) 25uA 3V 46dB@(100kHz) 5.5V 500mA Fixed Over Current Protection、Short Circuit Protection、Thermal shutdown、Enable control、Input under-voltage protection、Output discharge、Built-in soft-start Positive SOT-23-5 Voltage Regulators - Linear, Low Drop Out (LDO) Regulators ROHS

Part id
ti/TLV75530PDBV
Category
Voltage Regulators, Linear, Low Drop Out (LDO) Regulators
Package
SOT-23-5
Pins
5
In stock
3,638 at JLCPCB (C507268)
Used on
3 open-source boards

Overview

The TLV75530PDBV is a voltage Regulators, Linear, Low Drop Out (LDO) Regulator made by Texas Instruments in a SOT-23-5 package with 5 pins. -40℃~+125℃@(Tj) 1 238mV@(500mA) 25uA 3V 46dB@(100kHz) 5.5V 500mA Fixed Over Current Protection、Short Circuit Protection、Thermal shutdown、Enable control、Input under-voltage protection、Output discharge、Built-in soft-start Positive SOT-23-5 Voltage Regulators - Linear, Low Drop Out (LDO) Regulators ROHS.

PCBKit's library has its KiCad symbol (Regulator_Linear:TLV75530PDBV, from KiCad's library) and its footprint (Package_TO_SOT_SMD:SOT-23-5, from KiCad's library), ready for a KiCad board. 3,638 are in stock at JLCPCB (part C507268). 3 open-source boards in 3 repositories on GitHub use it.

Symbol

IN1GND2EN3OUT5
Regulator_Linear:TLV75530PDBVFrom KiCad's library

Footprint

12345
Package_TO_SOT_SMD:SOT-23-5From KiCad's library

From the datasheet

13
Supply, least
1.45 V · VIN, recommended operating min · p. 4
Supply, most
5.5 V · VIN, recommended operating max · p. 4
Supply, absolute maximum
6 V · VIN, absolute max · p. 4
Junction, hottest
150 °C · junction temperature absolute max · p. 4
Takes working
25 µA · IGND typical, TJ = 25°C, IOUT = 0mA · p. 5
Takes asleep
100 nA · shutdown typical, VEN ≤ 0.4V · p. 5
Gives
500 mA · continuous output current max · p. 4
Current limit
720 mA · output current limit typical, 1.5V < VOUT ≤ 4.5V · p. 5
Dropout
250 mV · typical at 500mA, −40°C ≤ TJ ≤ +85°C, 2.5V ≤ VOUT < 3.3V · p. 6
Junction to air (DBV)
100.8 K/W · junction to ambient, EVM · p. 5
Junction to air (DBV)
231.1 K/W · junction to ambient, JEDEC · p. 5
Junction to board (DBV)
64.4 K/W · junction to board, JEDEC · p. 5
Junction to case (DBV)
118.4 K/W · junction to case top, JEDEC · p. 5

What it is and has

3
Output discharge
Active · p. 1
Current limit
Foldback · p. 1
Soft start
Internal, monotonic VOUT rise · p. 1

Around it

2
cap 1µF or larger
between IN and GND; Required input capacitor; effective capacitance at the pin must exceed 0.47uF. · p. 3
cap 1µF or larger
between OUT and GND; Required output capacitor; effective capacitance at the pin must exceed 0.47uF. · p. 3

Specifications

47
ParameterConditionsAs printedPage
Supply voltage VINover operating free-air temperature rangemin -0.3 · max 6 V4
Enable voltage VENover operating free-air temperature rangemin -0.3 · max 6 V4
Output voltage VOUTMaximum is VIN + 0.3 V or 6.0 V, whichever is smaller.min -0.3 V4
Operating junction temperature TJmin -40 · max 150 °C4
Storage temperature Tstgmin -65 · max 150 °C4
Electrostatic discharge V(ESD)Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001; rating ±1000 Vmax 1000 V4
Electrostatic discharge V(ESD)Charged-device model (CDM), per JEDEC specification JESD22-C101; rating ±500 Vmax 500 V4
Input voltage VINmin 1.45 · max 5.5 V4
Output voltage VOUTFamily output voltage rangemin 0.6 · max 5 V4
Enable voltage VENmin 0 · max 5.5 V4
Output current IOUTmin 0 · max 500 mA4
Input capacitor CINmin 1 uF4
Output capacitor COUTmin 1 · max 200 uF4
Enable toggle frequency fENmax 10 kHz4
Junction temperature TJmin -40 · max 125 °C4
Junction-to-ambient thermal resistance RθJADBV (SOT-23-5), 5 PINS, EVMtyp 100.8 °C/W5
Junction-to-top characterization parameter ψJTDBV (SOT-23-5), 5 PINS, EVMtyp 23.3 °C/W5
Junction-to-board characterization parameter ψJBDBV (SOT-23-5), 5 PINS, EVMtyp 67.8 °C/W5
Junction-to-ambient thermal resistance RθJADBV (SOT-23-5), 5 PINS, JEDECtyp 231.1 °C/W5
Junction-to-case (top) thermal resistance RθJC(top)DBV (SOT-23-5), 5 PINS, JEDECtyp 118.4 °C/W5
Junction-to-board thermal resistance RθJBDBV (SOT-23-5), 5 PINS, JEDECtyp 64.4 °C/W5
Junction-to-top characterization parameter ψJTDBV (SOT-23-5), 5 PINS, JEDECtyp 28.4 °C/W5
Junction-to-board characterization parameter ψJBDBV (SOT-23-5), 5 PINS, JEDECtyp 63.8 °C/W5
Output accuracy−40°C ≤ TJ ≤ +85°C, DBV packagemin -1 · max 1 %5
Output accuracyVOUT ≥ 1V; TJ = −40°C to 125°Cmin -1.5 · max 1.5 %5
Line regulation (ΔVOUT)ΔVINVOUT + 0.5V ≤ VIN ≤ 5.5V, VOUT > 1.5Vtyp 2 mV5
Load regulation ΔVOUT/ΔIOUT0.1mA ≤ IOUT ≤ 500mA, DBV packagetyp 0.06 V/A5
Ground current IGNDTJ = 25°C, IOUT = 0mAmin 14 · typ 25 · max 31 uA5
Ground current IGND−40°C ≤ TJ ≤ +85°C, IOUT = 0mAmax 33 uA5
Ground current IGND−40°C ≤ TJ ≤ +125°C, IOUT = 0mAmax 40 uA5
Shutdown current ISHDNVEN ≤ 0.4V, 1.4V ≤ VIN ≤ 5.5V, −40°C ≤ TJ ≤ +125°Ctyp 0.1 · max 1 uA5
Output current limit ICLVIN = VOUT + VDO(MAX) + 0.25V; VOUT = 0.9 x VOUT, 1.5V < VOUT ≤ 4.5Vmin 560 · typ 720 · max 865 mA5
Short-circuit current limit ISCVOUT = 0Vtyp 355 mA5
Dropout voltage VDODBV; IOUT = 500mA, −40°C ≤ TJ ≤ +85°C; 2.5V ≤ VOUT < 3.3Vtyp 250 · max 300 mV6
Dropout voltage VDODBV; IOUT = 500mA, −40°C ≤ TJ ≤ +125°C; 2.5V ≤ VOUT < 3.3Vmax 325 mV6
Power-supply rejection ratio PSRRf = 1kHz, VIN = VOUT + 1V, IOUT = 50mAtyp 52 dB6
Power-supply rejection ratio PSRRf = 100kHz, VIN = VOUT + 1V, IOUT = 50mAtyp 46 dB6
Power-supply rejection ratio PSRRf = 1MHz, VIN = VOUT + 1 V, IOUT = 50mAtyp 52 dB6
Undervoltage lockout VUVLOVIN risingmin 1.21 · typ 1.3 · max 1.44 V6
Undervoltage lockout hysteresis VUVLO,HYSTVIN fallingtyp 40 mV6
Startup time tSTRtyp 550 us6
EN pin high voltage (enabled) VHImin 1 V6
EN pin low voltage (enabled) VLOmax 0.3 V6
Enable pin current IENEN = 5.5Vtyp 10 nA6
Thermal shutdown TSDShutdown, temperature increasingtyp 165 °C6
Thermal shutdown TSDReset, temperature decreasingtyp 155 °C6
Pulldown resistance RPULLDOWNVIN = 5.5Vtyp 120 Ω6

Pins, by the datasheet

5
1 IN
Input supply; connect a capacitor of 1uF or larger to ground. · p. 3
2 GND
Ground pin. · p. 3
3 EN
Drive above VHI to enable the regulator or below VLO for shutdown. · p. 3
4 NC
No internal connection. · p. 3
5 OUT
Regulated output; connect a capacitor of 1uF or larger to ground. · p. 3

Open-source boards using it

3
  • 4 layers190 × 145 mmMotor izleme karti, the printed circuit board in 3D

    Motor izleme karti

    melikeatilgan/asenkron-motor-bakim

    15 kW asenkron motor için arıza ağacı analizi, aylık bakım formu ve KiCad'de tasarlanmış üç izleme kartı

    191 parts1
  • 2 layers77 × 59.4 mmSpeed Limit Display v2, the printed circuit board in 3D

    Speed Limit Display v2

    phreakhcker/Speed-Limit-Display

    Simple speed limit display with esp32 tracked with gps board and api to show speed while driving on any road.

    29 parts1Apache-2.0
  • 2 layers87.6 × 25.4 mmLis3dh board, the printed circuit board in 3D

    Lis3dh board

    explora26/tablet_sensor_board

    25 parts

Parts like it

8

Questions

Is there a KiCad symbol and footprint for the TLV75530PDBV?

Yes. The symbol is Regulator_Linear:TLV75530PDBV and the footprint Package_TO_SOT_SMD:SOT-23-5, both drawn on this page. PCBKit places them on a board for you when you design with it.

What package is the TLV75530PDBV?

SOT-23-5, with 5 pins. Its footprint is drawn on this page.

Where is the TLV75530PDBV datasheet?

Texas Instruments publishes it: the Datasheet link on this page opens it.

Where can I order the TLV75530PDBV?

JLCPCB lists it as part C507268, with 3,638 in stock; the sellers' links on this page open their listings.

What can replace the TLV75530PDBV?

Parts like it in the library: the TPRT9013-30GB by TECH PUBLIC, the ME6211C30M5G-N by MICRONE, the RT9080-30GJ5 by Richtek Tech and the DS8562-30S5 by DSTECH. Check their datasheets: a part that fits the footprint may still differ in its ratings.

Which open-source boards use the TLV75530PDBV?

3 boards in 3 repositories on GitHub; the most starred are listed on this page, with their KiCad files.