2 layers93.6 × 55 mm
Overview
The TLC555CD is a timers , Counter made by Texas Instruments in a SOIC-8 package with 8 pins. 0℃~+70℃ 2.1MHz 2V~15V 360uA SOIC-8 555 Timers / Counters ROHS.
PCBKit's library has its KiCad symbol (Timer:TLC555xD, from KiCad's library) and its footprint (Package_SO:SOIC-8_3.9x4.9mm_P1.27mm, from KiCad's library), ready for a KiCad board. 73,228 are in stock at JLCPCB (part C6986). 6 open-source boards in 6 repositories on GitHub use it.
Symbol
Footprint
From the datasheet
12- Supply, least
- 2 V · VDD, recommended operating min, TLC555C · p. 6
- Supply, most
- 15 V · VDD, recommended operating max, TLC555C · p. 6
- Supply, absolute maximum
- 18 V · VDD, absolute maximum · p. 6
- Works from
- 0 °C · Operating free-air temperature min, TLC555C · p. 6
- Works up to
- 70 °C · Operating free-air temperature max, TLC555C · p. 6
- Takes working
- 170 µA · VDD supply current typical, VDD = 5 V, 25°C, THRES connected to DISCH or TRIG · p. 9
- A pin gives at most
- 150 mA · Discharge or output sink current, absolute maximum · p. 6
- A pin gives at most
- 15 mA · Output source current, absolute maximum · p. 6
- Junction to air (D (SOIC))
- 113 K/W · Junction-to-ambient thermal resistance · p. 6
- Junction to case (D (SOIC))
- 58 K/W · Junction-to-case (top) thermal resistance · p. 6
- Junction to board (D (SOIC))
- 55 K/W · Junction-to-board thermal resistance · p. 6
- Takes working
- 360 µA · VDD = 15 V, 25°C, typical supply current · p. 10
What it is and has
7- Output
- Rail-to-rail CMOS output · p. 1
- Logic compatibility
- CMOS, TTL and MOS · p. 1
- Output sink current
- 100 mA typical · p. 1
- Output source current
- 10 mA typical · p. 1
- Typical output sink current
- 100 mA · p. 1
- Typical output source current
- 10 mA · p. 1
- Output compatibility
- CMOS, TTL and MOS · p. 1
Around it
2- cap 0.1-μF
- between VDD and GND; Minimum recommended ceramic bypass capacitor; parallel with 1-uF electrolytic. Place close to the TLC555 and minimize trace length. · p. 26
- cap 1-μF
- between VDD and GND; Minimum recommended electrolytic bypass capacitor; parallel with 0.1-uF ceramic. Place close to the TLC555 and minimize trace length. · p. 26
Specifications
90| Parameter | Conditions | As printed | Page |
|---|---|---|---|
| Supply, VDD VDD | All voltage values with respect to GND | min -0.3 · max 18 V | 6 |
| Input, any input | Maximum input voltage is VDD; voltages with respect to GND | min -0.3 V | 6 |
| Discharge | Voltage with respect to GND | min -0.3 · max 18 V | 6 |
| Sink, discharge or output | max 150 mA | 6 | |
| Source, output, IO IO | max 15 mA | 6 | |
| Operating, TA TA | C-suffix | min 0 · max 70 °C | 6 |
| Storage, Tstg Tstg | min -65 · max 150 °C | 6 | |
| Supply voltage, VDD VDD | TLC555C | min 2 · max 15 V | 6 |
| Operating free-air temperature, TA TA | TLC555C | min 0 · max 70 °C | 6 |
| Junction-to-ambient thermal resistance RθJA | D (SOIC), 8 pins | typ 113 °C/W | 6 |
| Junction-to-case (top) thermal resistance RθJC(top) | D (SOIC), 8 pins | typ 58 °C/W | 6 |
| Junction-to-board thermal resistance RθJB | D (SOIC), 8 pins | typ 55 °C/W | 6 |
| Junction-to-top characterization parameter ψJT | D (SOIC), 8 pins | typ 11 °C/W | 6 |
| Junction-to-board characterization parameter ψJB | D (SOIC), 8 pins | typ 54 °C/W | 6 |
| Threshold voltage VIT | TLC555C, VDD = 2 V, 25°C | min 0.95 · typ 1.33 · max 1.65 V | 7 |
| Threshold voltage VIT | TLC555C, VDD = 2 V, Full range | min 0.85 · max 1.75 V | 7 |
| Threshold current IIT | TLC555C, VDD = 2 V, 25°C | typ 10 pA | 7 |
| Threshold current IIT | TLC555C, VDD = 2 V, Max operating temperature | typ 75 pA | 7 |
| Trigger voltage VI(TRIG) | TLC555C, VDD = 2 V, 25°C | min 0.4 · typ 0.67 · max 0.95 V | 7 |
| Trigger voltage VI(TRIG) | TLC555C, VDD = 2 V, Full range | min 0.3 · max 1.05 V | 7 |
| Trigger current II(TRIG) | TLC555C, VDD = 2 V, 25°C | typ 10 pA | 7 |
| Trigger current II(TRIG) | TLC555C, VDD = 2 V, Max operating temperature | typ 75 pA | 7 |
| Reset voltage VI(RESET) | TLC555C, VDD = 2 V, 25°C | min 0.4 · typ 1.1 · max 1.5 V | 7 |
| Reset voltage VI(RESET) | TLC555C, VDD = 2 V, Full range | min 0.3 · max 2 V | 7 |
| Control voltage (open-circuit) as a percentage of supply voltage | TLC555C, VDD = 2 V, Max operating temperature | typ 66.7 % | 7 |
| Discharge switch on-stage voltage | TLC555C, VDD = 2 V, IOL = 1 mA, 25°C | typ 0.03 · max 0.2 V | 7 |
| Discharge switch on-stage voltage | TLC555C, VDD = 2 V, IOL = 1 mA, Full range | max 0.25 V | 7 |
| Discharge switch off-stage current | TLC555C, VDD = 2 V, 25°C | typ 0.1 nA | 7 |
| Discharge switch off-stage current | TLC555C, VDD = 2 V, Max operating temperature | typ 0.5 nA | 7 |
| High-level output voltage VOH | TLC555C, VDD = 2 V, IOH = –300 uA, 25°C | min 1.5 · typ 1.9 V | 7 |
| High-level output voltage VOH | TLC555C, VDD = 2 V, IOH = –300 uA, Full range | min 1.5 V | 7 |
| Low-level output voltage VOL | TLC555C, VDD = 2 V, IOL = 1 mA, 25°C | typ 0.07 · max 0.3 V | 7 |
| Low-level output voltage VOL | TLC555C, VDD = 2 V, IOL = 1 mA, Full range | max 0.35 V | 7 |
| Supply current IDD | TLC555C, VDD = 2 V, 25°C; THRES connected directly to DISCH or TRIG | max 250 uA | 7 |
| Supply current IDD | TLC555C, VDD = 2 V, Full range; THRES connected directly to DISCH or TRIG | max 400 uA | 7 |
| Power dissipation capacitance CPD | TLC555C, VDD = 2 V, 25°C | typ 80 pF | 7 |
| Threshold voltage VIT | TLC555C, 25°C | min 2.8 · typ 3.3 · max 3.8 V | 8 |
| Threshold voltage VIT | TLC555C, Full range | min 2.7 · max 3.9 V | 8 |
| Threshold current IIT | TLC555C, 25°C | typ 10 pA | 8 |
| Threshold current IIT | TLC555C, Max operating temperature | typ 75 pA | 8 |
| Trigger voltage VI(TRIG) | TLC555C, 25°C | min 1.36 · typ 1.66 · max 1.96 V | 8 |
| Trigger voltage VI(TRIG) | TLC555C, Full range | min 1.26 · max 2.06 V | 8 |
| Trigger current II(TRIG) | TLC555C, 25°C | typ 10 pA | 8 |
| Trigger current II(TRIG) | TLC555C, Max operating temperature | typ 75 pA | 8 |
| Trigger, threshold capacitance (each pin) CI | TLC555C, 25°C | typ 2.1 pF | 8 |
| Reset voltage VI(RESET) | TLC555C, 25°C | min 0.4 · typ 1.1 · max 1.5 V | 8 |
| Reset voltage VI(RESET) | TLC555C, Full range | min 0.3 · max 1.8 V | 8 |
| Reset current II(RESET) | TLC555C, 25°C | typ 10 pA | 8 |
| Reset current II(RESET) | TLC555C, Max operating temperature | typ 75 pA | 8 |
| Control voltage (open circuit) as a percentage of supply voltage | TLC555C, Max operating temperature | typ 66.7 % | 8 |
| Discharge switch on-stage voltage | TLC555C, IOL = 10 mA, 25°C | typ 0.14 · max 0.5 V | 8 |
| Discharge switch on-stage voltage | TLC555C, IOL = 10 mA, Full range | max 0.6 V | 8 |
| Discharge switch off-stage current | TLC555C, 25°C | typ 0.1 nA | 8 |
| Discharge switch off-stage current | TLC555C, Max operating temperature | typ 0.5 nA | 8 |
| High-level output voltage VOH | TLC555C, IOH = –1 mA, 25°C | min 4.1 · typ 4.8 V | 8 |
| High-level output voltage VOH | TLC555C, IOH = –1 mA, Full range | min 4.1 V | 8 |
| Low-level output voltage VOL | TLC555C, IOL = 8 mA, 25°C | typ 0.21 · max 0.4 V | 8 |
| Low-level output voltage VOL | TLC555C, IOL = 8 mA, Full range | max 0.5 V | 8 |
| Low-level output voltage VOL | TLC555C, IOL = 5 mA, 25°C | typ 0.13 · max 0.3 V | 9 |
| Low-level output voltage VOL | TLC555C, IOL = 5 mA, Full range | max 0.4 V | 9 |
| Low-level output voltage VOL | TLC555C, IOL = 3.2 mA, 25°C | typ 0.08 · max 0.3 V | 9 |
| Low-level output voltage VOL | TLC555C, IOL = 3.2 mA, Full range | max 0.35 V | 9 |
| Supply current IDD | TLC555C, 25°C; THRES connected directly to DISCH or TRIG | typ 170 · max 350 uA | 9 |
| Supply current IDD | TLC555C, Full range; THRES connected directly to DISCH or TRIG | max 500 uA | 9 |
| Power dissipation capacitance CPD | TLC555C, 25°C | typ 115 pF | 9 |
| Threshold voltage VIT | TLC555C, 25°C | min 9.45 · typ 10 · max 10.55 V | 9 |
| Threshold voltage VIT | TLC555C, Full range | min 9.35 · max 10.65 V | 9 |
| Trigger voltage VI(TRIG) | TLC555C, 25°C | min 4.65 · typ 5 · max 5.35 V | 9 |
| Trigger voltage VI(TRIG) | TLC555C, Full range | min 4.55 · max 5.45 V | 9 |
| Trigger, threshold capacitance (each pin) CI | TLC555C, 25°C | typ 1.8 pF | 9 |
| Control voltage (open circuit) as a percentage of supply voltage | TLC555C; Max | typ 66.7 % | 10 |
| Discharge switch on-stage voltage | TLC555C; IOL = 100 mA, 25°C | typ 0.77 · max 1.7 V | 10 |
| Discharge switch on-stage voltage | TLC555C; IOL = 100 mA, Full range | max 1.8 V | 10 |
| Discharge switch off-stage current | TLC555C; 25°C | typ 0.1 nA | 10 |
| Discharge switch off-stage current | TLC555C; Max | typ 0.5 nA | 10 |
| High-level output voltage VOH | TLC555C; IOH = –10 mA, 25°C | min 12.5 · typ 14.2 V | 10 |
| High-level output voltage VOH | TLC555C; IOH = –10 mA, Full range | min 12.5 V | 10 |
| High-level output voltage VOH | TLC555C; IOH = –5 mA, 25°C | min 13.5 · typ 14.6 V | 10 |
| High-level output voltage VOH | TLC555C; IOH = –5 mA, Full range | min 13.5 V | 10 |
| High-level output voltage VOH | TLC555C; IOH = –1 mA, 25°C | min 14.2 · typ 14.9 V | 10 |
| High-level output voltage VOH | TLC555C; IOH = –1 mA, Full range | min 14.2 V | 10 |
| Low-level output voltage VOL | TLC555C; IOL = 100 mA, 25°C | typ 1.28 · max 3.2 V | 10 |
| Low-level output voltage VOL | TLC555C; IOL = 100 mA, Full range | max 3.6 V | 10 |
| Low-level output voltage VOL | TLC555C; IOL = 50 mA, 25°C | typ 0.63 · max 1 V | 10 |
| Low-level output voltage VOL | TLC555C; IOL = 50 mA, Full range | max 1.3 V | 10 |
| Low-level output voltage VOL | TLC555C; IOL = 10 mA, 25°C | typ 0.12 · max 0.3 V | 10 |
| Low-level output voltage VOL | TLC555C; IOL = 10 mA, Full range | max 0.4 V | 10 |
| Supply current (2) IDD | TLC555C; 25°C; THRES connected directly to DISCH or TRIG | typ 360 · max 600 uA | 10 |
| Supply current (2) IDD | TLC555C; Full range; THRES connected directly to DISCH or TRIG | max 800 uA | 10 |
| Power dissipation capacitance (3) (4) CPD | TLC555C; 25°C | typ 140 pF | 10 |
Pins, by the datasheet
8- 1 GND
- Ground. · p. 4
- 2 TRIG
- Start of timing input. TRIG < 1/2 CONT sets output high and discharge open. · p. 4
- 3 OUT
- High current timer output signal. · p. 4
- 4 RESET
- Active low reset input forces output and discharge low. · p. 4
- 5 CONT
- Controls comparator thresholds. Outputs 2/3 VDD and allows bypass capacitor connection. · p. 4
- 6 THRES
- End of timing input. THRES > CONT sets output low and discharge low. · p. 4
- 7 DISCH
- Open collector output to discharge timing capacitor. · p. 4
- 8 VDD
- Power-supply voltage. · p. 4
Parameters
14- Current - Supply
- 360μA
- Features
- Reset function
- Frequency
- 2.1MHz
- Operating Temperature
- 0℃~+70℃
- Output Current
- 100mA
- Output Current per Pin(Max)
- 150mA
- Supply Current
- 170uA
- Thermal Resistance(Junction to Ambient)
- 113℃/W
- Thermal Resistance(Junction to Board)
- 55℃/W
- Thermal Resistance(Junction to Case)
- 58℃/W
- Timer Number
- 1
- Type
- 555 Type，计时器/振荡器(单路)
- Voltage - Supply
- 2V~15V
- Voltage - Supply(Absolute Max)
- 18V
Order codes
2- TLC555CDLCSC C1520195
- TLC555CDRLCSC C6986
Pinout
8| Pin | Name | Type |
|---|---|---|
| 1 | GND | Power in |
| 2 | TRIG | Input |
| 3 | OUT | Output |
| 4 | RST | Input |
| 5 | CONT | Passive |
| 6 | THRES | Input |
| 7 | DISCH | Input |
| 8 | VCC | Power in |
Open-source boards using it
All 6- 2 layers84 × 89 mm
14MHz Accelerator V2 2
Mathesar/14mhz-accelerator
14MHz 68000 accelerator with 1MB fast ram for amiga 500
42 parts78 - 2 layers33.5 × 78.3 mm
Lrima main
LRIMa-Qc/iot_obj-sicro-sensor
All in one smart IoT greenhouse monitoring and managing system
41 partsCC-BY-4.0 - 2 layers100 × 100 mm
Contact Monitor Board
niwa-yamaguchi/Contact-Monitor-Board
スキャン出力が H になると、その ch の LED 側と MOSFET 側が同時にアクティブになります。 外部接点が閉じていれば電流が流れて LED が点灯し、開いていれば経路が切れて消灯します。 出力が L の間はゲートも L なので MOSFET が OFF になり、その ch は完全に切り離されます。
83 partsCERN-OHL-P-2.0 - 2 layers22 × 109 mm
Capacitive soil sensor
SolderedElectronics/Capacitive-soil-sensor-hardware-design
Hardware design, BOM, gerbers and 3D files for Capacitive-soil-sensor designed by Soldered Electronics.
40 parts3 - 2 layers36.8 × 21.6 mm
AudioOx Filter
dolson14/k7arx
Circuit and PCB Designs, anything else related to radio and electronics
21 parts
Show this part on your page
<iframe src="https://pcbkit.io/embed/parts/ti/TLC555CD" title="TLC555CD in PCBKit" width="100%" height="480" style="border:0;border-radius:12px" allow="fullscreen" loading="lazy"></iframe><img src="https://pcbkit.io/embed/parts/ti/TLC555CD.jpg" alt="TLC555CD" width="1200" height="900">[](https://pcbkit.io/parts/ti/TLC555CD)Questions
Is there a KiCad symbol and footprint for the TLC555CD?
Yes. The symbol is Timer:TLC555xD and the footprint Package_SO:SOIC-8_3.9x4.9mm_P1.27mm, both drawn on this page. PCBKit places them on a board for you when you design with it.
What package is the TLC555CD?
SOIC-8, with 8 pins. Its footprint is drawn on this page.
Where is the TLC555CD datasheet?
Texas Instruments publishes it: the Datasheet link on this page opens it.
Where can I order the TLC555CD?
JLCPCB lists it as part C6986, with 73,228 in stock; the sellers' links on this page open their listings.
What can replace the TLC555CD?
Parts like it in the library: the TLC555ID by Texas Instruments. Check their datasheets: a part that fits the footprint may still differ in its ratings.
Which open-source boards use the TLC555CD?
6 boards in 6 repositories on GitHub; the most starred are listed on this page, with their KiCad files.
