4 layers54.7 × 75.8 mm
TAS5805MPWP
Texas Instruments
-25℃~+85℃ 0.03% 107dB 16.5mA 2-Channel 23W×2@8Ω 4.5V~26.4V 72dB Class D Overvoltage protection、Digitally programmable gain、Built-in audio processing HTSSOP-28-EP Audio Amplifiers ROHS
Extended
- Category
- Audio Amplifiers
- Package
- HTSSOP-28-EP
- Pins
- 29
Overview
The TAS5805MPWP is an audio Amplifier made by Texas Instruments in a HTSSOP-28-EP package with 29 pins. -25℃~+85℃ 0.03% 107dB 16.5mA 2-Channel 23W×2@8Ω 4.5V~26.4V 72dB Class D Overvoltage protection、Digitally programmable gain、Built-in audio processing HTSSOP-28-EP Audio Amplifiers ROHS.
PCBKit's library has its KiCad symbol (Amplifier_Audio:TAS5805MPWP, from KiCad's library) and its footprint (Package_SO:TSSOP-28-1EP_4.4x9.7mm_P0.65mm_EP3.4x9.7mm_Mask3.1x4.05mm, from KiCad's library), ready for a KiCad board. 3,303 are in stock at JLCPCB (part C478472). 11 open-source boards in 8 repositories on GitHub use it.
Symbol
Footprint
From the datasheet
14- Supply, least
- 1.62 V · DVDD, recommended operating min · p. 7
- Supply, most
- 3.63 V · DVDD, recommended operating max · p. 7
- Supply, least
- 4.5 V · PVDD, recommended operating min · p. 7
- Supply, most
- 26.4 V · PVDD, recommended operating max · p. 7
- Supply, absolute maximum
- 3.9 V · DVDD, absolute max · p. 7
- Supply, absolute maximum
- 30 V · PVDD, absolute max · p. 7
- Works from
- -25 °C · Ambient operating temperature min · p. 7
- Works up to
- 85 °C · Ambient operating temperature max · p. 7
- Takes working
- 34.5 mA · sum of DVDD and PVDD typical quiescent currents, Play mode, Hybrid modulation · p. 8
- Takes asleep
- 12.7 µA · sum of DVDD and PVDD typical shutdown currents, PDN=0V · p. 8
- Junction to air (TSSOP (PWP))
- 29.1 K/W · JEDEC standard 4-layer PCB · p. 7
- Junction to air (TSSOP (PWP))
- 24 K/W · TAS5805MEVM-4 4-layer PCB · p. 7
- Junction to case (TSSOP (PWP))
- 21.8 K/W · Junction-to-case top, JEDEC standard 4-layer PCB · p. 7
- Junction to board (TSSOP (PWP))
- 8.2 K/W · Junction-to-board, JEDEC standard 4-layer PCB · p. 7
What it is and has
14- Audio interfaces
- I2S, LJ, RJ, TDM; three-wire digital audio without MCLK · p. 1
- Sampling rates
- 32, 44.1, 48, 88.2, 96 kHz · p. 1
- Biquad filters
- 2 × 15 · p. 1
- Audio processing
- Multiband advanced DRC and AGL · p. 1
- Audio processing
- Thermal foldback and DC blocking · p. 1
- Audio routing
- Input mixer and output crossbar · p. 1
- Protection
- Overcurrent error · p. 1
- Protection
- Overtemperature warning · p. 1
- Protection
- Overtemperature error · p. 1
- Protection
- Undervoltage and overvoltage lockout · p. 1
- Control interface
- I2C software control · p. 1
- Package
- TSSOP (28) PWP, 9.7 mm × 4.4 mm nominal · p. 1
- Stereo output power
- 2 × 23 W at 8 Ω, 21 V, THD+N = 1% · p. 1
- Mono output power
- 45 W at 4 Ω, 21 V, THD+N = 1% · p. 1
Around it
1- cap small
- between BST_A+ and OUT_A+; Ceramic bootstrap capacitor; place close to associated pins. · p. 30
Specifications
72| Parameter | Conditions | As printed | Page |
|---|---|---|---|
| Low-voltage digital supply DVDD | Free-air room temperature 25°C | min -0.3 · max 3.9 V | 7 |
| PVDD supply PVDD | Free-air room temperature 25°C | min -0.3 · max 30 V | 7 |
| DVDD referenced digital inputs VI(DigIn) | Maximum VDVDD + 0.5 V | min -0.5 V | 7 |
| Voltage at speaker output pins VI(SPK_OUTxx) | Free-air room temperature 25°C | min -0.3 · max 32 V | 7 |
| Ambient operating temperature TA | min -25 · max 85 °C | 7 | |
| Storage temperature Tstg | min -40 · max 125 °C | 7 | |
| Power supply inputs V(POWER) | DVDD | min 1.62 · max 3.63 V | 7 |
| Power supply inputs V(POWER) | PVDD | min 4.5 · max 26.4 V | 7 |
| Minimum inductor value in LC filter under short-circuit condition LOUT | Nominal 4.7 uH | min 1 uH | 7 |
| Junction-to-ambient thermal resistance RθJA | TSSOP (PWP), 28 pins; JEDEC standard 4-layer PCB | typ 29.1 °C/W | 7 |
| Junction-to-ambient thermal resistance RθJA | TSSOP (PWP), 28 pins; TAS5805MEVM-4 4-layer PCB | typ 24 °C/W | 7 |
| Junction-to-case (top) thermal resistance RθJC(top) | TSSOP (PWP), 28 pins; JEDEC standard 4-layer PCB | typ 21.8 °C/W | 7 |
| Junction-to-board thermal resistance RθJB | TSSOP (PWP), 28 pins; JEDEC standard 4-layer PCB | typ 8.2 °C/W | 7 |
| Junction-to-top characterization parameter ψJT | TSSOP (PWP), 28 pins; JEDEC standard 4-layer PCB | typ 0.3 °C/W | 7 |
| Junction-to-top characterization parameter ψJT | TSSOP (PWP), 28 pins; TAS5805MEVM-4 4-layer PCB | typ 1.5 °C/W | 7 |
| Junction-to-board characterization parameter ψJB | TSSOP (PWP), 28 pins; JEDEC standard 4-layer PCB | typ 8.1 °C/W | 7 |
| Junction-to-board characterization parameter ψJB | TSSOP (PWP), 28 pins; TAS5805MEVM-4 4-layer PCB | typ 7.6 °C/W | 7 |
| Junction-to-case (bottom) thermal resistance RθJC(bot) | TSSOP (PWP), 28 pins; JEDEC standard 4-layer PCB | typ 2.2 °C/W | 7 |
| Input logic high current level for DVDD referenced digital input pins |IIH| | VIN(DigIn) = VDVDD | max 10 uA | 8 |
| Input logic low current level for DVDD referenced digital input pins |IIL| | VIN(DigIn) = 0 V | max -10 uA | 8 |
| Input logic high threshold for DVDD referenced digital inputs VIH(Digin) | min 70 % VDVDD | 8 | |
| Input logic low threshold for DVDD referenced digital inputs VIL(Digin) | max 30 % VDVDD | 8 | |
| Output logic high voltage level VOH(Digin) | IOH = 2 mA | min 80 % VDVDD | 8 |
| Output logic low voltage level VOL(Digin) | IOH = –2 mA | max 20 % VDVDD | 8 |
| Allowable load capacitance for each I2C line CL(I2C) | max 400 pF | 8 | |
| Support SCL frequency fSCL(fast) | No wait states, fast mode | max 400 kHz | 8 |
| Support SCL frequency fSCL(slow) | No wait states, slow mode | max 100 kHz | 8 |
| Required LRCLK/FS to SCLK rising edge delay tDLY | min 5 ns | 8 | |
| Allowable SCLK duty cycle DSCLK | min 40 · max 60 % | 8 | |
| Supported input sample rates fS | min 32 · max 96 kHz | 8 | |
| Supported SCLK frequencies fSCLK | min 32 · max 64 fS | 8 | |
| SCLK frequency fSCLK | max 24.576 MHz | 8 | |
| Quiescent supply current on DVDD Icc | PDN=2V, DVDD=3.3V, Play mode | typ 18 mA | 8 |
| Quiescent supply current on DVDD Icc | PDN=2V, DVDD=3.3V, Sleep mode | typ 0.75 mA | 8 |
| Quiescent supply current on DVDD Icc | PDN=2V, DVDD=3.3V, Deep Sleep mode | typ 0.75 mA | 8 |
| Quiescent supply current on DVDD Icc | PDN=0V, DVDD=3.3V, Shutdown mode | typ 5.5 uA | 8 |
| Quiescent supply current on PVDD Icc | PDN=2V, PVDD=13.5V, LC filter=10uH+0.68uF, Fsw=768kHz, BD Modulation, Play mode | typ 32.5 mA | 8 |
| Quiescent supply current on PVDD Icc | PDN=2V, PVDD=13.5V, LC filter=22uH+0.68uF, Fsw=384kHz, Hybrid Modulation, Play mode | typ 16.5 mA | 8 |
| Quiescent supply current on PVDD Icc | PDN=2V, PVDD=13.5V, Output Hiz Mode | typ 10.4 mA | 8 |
| Quiescent supply current on PVDD Icc | PDN=2V, PVDD=13.5V, Sleep Mode | typ 7.2 mA | 8 |
| Quiescent supply current on PVDD Icc | PDN=2V, PVDD=13.5V, Deep Sleep Mode | typ 120 uA | 8 |
| Quiescent supply current on PVDD Icc | PDN=0V, PVDD=13.5V, Shutdown Mode | typ 7.2 uA | 8 |
| Turn-off Time toff | Excluding volume ramp | max 10 ms | 8 |
| Programmable Gain AV(SPK_AMP) | Peak voltage disregarding clipping due to lower PVDD; measured at 0 dB input(1FS) | min 4.87 · max 29.5 V | 8 |
| Amplifier gain error ΔAV(SPK_AMP) | Gain = 29.5 Vp/FS | typ 0.5 dB | 8 |
| Switching frequency of the speaker amplifier fSPK_AMP | typ 384 kHz | 8 | |
| Switching frequency of the speaker amplifier fSPK_AMP | typ 768 kHz | 8 | |
| Drain-to-source on resistance of the individual output MOSFETs RDS(on) | FET + Metallization | typ 180 mΩ | 9 |
| Over-Current Error Threshold OCETHRES | OUTxx Overcurrent Error Threshold | typ 5 A | 9 |
| PVDD over voltage error threshold OVETHRES(PVDD | typ 28 V | 9 | |
| PVDD under voltage error threshold UVETHRES(PVDD | typ 4.2 V | 9 | |
| Over temperature error threshold OTETHRES | typ 160 °C | 9 | |
| Over temperature error hysteresis OTEHystersis | typ 10 °C | 9 | |
| Over temperature warning level OTWTHRES | Read by register 0x73 bit3 | typ 135 °C | 9 |
| Amplifier offset voltage |VOS| | STEREO BTL; measured differentially with zero input data, programmable gain 29.5 Vp, VPVDD = 12 V, BD Mode | min -6.5 · max 6.5 mV | 9 |
| Continuous Output power (per channel) PO(SPK) | STEREO BTL; VPVDD = 21V, SPK_GAIN = 24.8 Vp/FS, RSPK = 8 Ω, f = 1 kHz, THD+N = 1%, 1SPW Mode | typ 23 W | 9 |
| Continuous Output power (per channel) PO(SPK) | STEREO BTL; VPVDD = 21 V, SPK_GAIN = 24.8 Vp/FS, RSPK = 8 Ω, f = 1 kHz, THD+N = 10%, 1SPW Mode | typ 27.5 W | 9 |
| Continuous Output power (per channel) PO(SPK) | STEREO BTL; VPVDD = 18 V, SPK_GAIN = 20.8 Vp/FS, RSPK = 6 Ω, f = 1 kHz, THD+N = 1%, BD Mode | typ 21 W | 9 |
| Continuous Output power (per channel) PO(SPK) | STEREO BTL; VPVDD = 18 V, SPK_GAIN = 20.8 Vp/FS, RSPK = 6 Ω, f = 1 kHz, THD+N = 10%, BD Mode | typ 25 W | 9 |
| Continuous Output power (per channel) PO(SPK) | STEREO BTL; VPVDD = 12 V, SPK_GAIN = 13.9 Vp/FS, RSPK = 6 Ω, f = 1 kHz THD+N = 1%, BD Mode | typ 9.9 W | 9 |
| Continuous Output power (per channel) PO(SPK) | STEREO BTL; VPVDD = 12 V, SPK_GAIN = 13.9 Vp/FS, RSPK = 6 Ω, f = 1 kHz THD+N = 10%, BD Mode | typ 12 W | 9 |
| Continuous Output power (per channel) PO(SPK) | STEREO BTL; VPVDD = 13.5 V, SPK_GAIN = 15.6 Vp/FS, RSPK = 6 Ω, f = 1 kHz THD+N = 1%, BD Mode | typ 12 W | 9 |
| Continuous Output power (per channel) PO(SPK) | STEREO BTL; VPVDD = 13.5 V, SPK_GAIN = 15.6 Vp/FS, RSPK = 6 Ω, f = 1 kHz THD+N = 10%, BD Mode | typ 15 W | 9 |
| Total harmonic distortion and noise (PO = 1 W, f = 1 KHz, RSPK = 6 Ω) THD+NSPK | STEREO BTL; VPVDD = 12 V, Fsw=768kHz, SPK_GAIN = 13.9 Vp/FS, LC-filter, BD Mode | typ 0.03 % | 9 |
| Total harmonic distortion and noise (PO = 1 W, f = 1 KHz, RSPK = 6 Ω) THD+NSPK | STEREO BTL; VPVDD = 18 V, Fsw=768kHz, SPK_GAIN = 20.8 Vp/FS, LC-filter, BD Mode | typ 0.03 % | 9 |
| Idle channel noise(A-weighted) ICN(SPK) | STEREO BTL; VPVDD = 12 V, Fsw=768kHz, LC-filter, Load=6 Ω | typ 37 uVrms | 9 |
| Idle channel noise(A-weighted) ICN(SPK) | STEREO BTL; VPVDD = 18 V, Fsw=768kHz, LC-filter, Load=6 Ω | typ 38 uVrms | 9 |
| Dynamic range DR | STEREO BTL; A-Weighted, -60 dBFS method. PVDD = 24 V, SPK_GAIN = 29.5 Vp/FS | typ 106 dB | 9 |
| Signal-to-noise ratio SNR | STEREO BTL; A-Weighted, referenced to 1% THD+N output level, PVDD=24V | typ 111 dB | 9 |
| Signal-to-noise ratio SNR | STEREO BTL; A-Weighted, referenced to 1% THD+N output level, PVDD=13.5V | typ 107.5 dB | 9 |
| Power supply rejection ratio KSVR | STEREO BTL; Injected Noise = 1 KHz, 1 Vrms, PVDD = 12 V, input audio signal = digital zero | typ 72 dB | 9 |
| Cross-talk (worst case between left-to-right and right-to-left coupling) X-talkSPK | STEREO BTL; f = 1 kHz | typ 100 dB | 9 |
Pins, by the datasheet
29- 1 DGND
- Digital ground. · p. 5
- 2 DVDD
- 3.3-V or 1.8-V digital power supply. · p. 5
- 3 ADR/ FAULT
- Pull-up resistor to DVDD selects the I2C address; configurable as FAULT after power-up. · p. 5
- 4 VR_DIG
- Internally regulated 1.5-V digital supply; must not drive external devices. · p. 5
- 5 DGND
- Digital ground. · p. 5
- 6 LRCLK
- Serial audio word-select clock; left/right boundary in I2S, LJ and RJ, or frame sync in TDM. · p. 5
- 7 SCLK
- Serial audio input bit clock. · p. 5
- 8 SDIN
- Serial audio input data. · p. 5
- 9 SDOUT
- Serial audio data output, selectable from pre-DSP or post-DSP data. · p. 5
- 10 SDA
- I2C serial control data input/output. · p. 5
- 11 SCL
- I2C serial control clock input. · p. 5
- 12 PDN
- Active-low power down; low shuts down the amplifier and internal regulators, high enables the device. · p. 5
- 13 AVDD
- Internally regulated 5-V analog supply; must not drive external devices. · p. 5
- 14 AGND
- Analog ground. · p. 5
- 15 PVDD
- PVDD voltage input. · p. 5
- 16 PVDD
- PVDD voltage input. · p. 5
- 17 OUT_B+
- Positive differential speaker amplifier output B+. · p. 6
- 18 BST_B+
- Bootstrap capacitor connection for the OUT_B+ high-side gate drive supply. · p. 6
- 19 PGND
- Power circuitry ground reference; connect to system ground. · p. 5
- 20 OUT_B-
- Negative differential speaker amplifier output B. · p. 6
- 21 BST_B-
- Bootstrap capacitor connection for the OUT_B- high-side gate drive supply. · p. 6
- 22 BST_A-
- Bootstrap capacitor connection for the OUT_A- high-side gate drive supply. · p. 6
- 23 OUT_A-
- Negative differential speaker amplifier output A-. · p. 5
- 24 PGND
- Power circuitry ground reference; connect to system ground. · p. 5
- 25 BST_A+
- Bootstrap capacitor connection for the OUT_A+ high-side gate drive supply. · p. 5
- 26 OUT_A+
- Positive differential speaker amplifier output A+. · p. 5
- 27 PVDD
- PVDD voltage input. · p. 5
- 28 PVDD
- PVDD voltage input. · p. 5
- PowerPAD™ PowerPAD™
- Connect to system ground. · p. 6
Ordering codes, by the datasheet
4- TAS5805MPWP
- HTSSOP (PWP) | 28 · 50 units, tube; operating temperature -25 to 85 °C · p. 94
- TAS5805MPWP.A
- HTSSOP (PWP) | 28 · 50 units, tube; operating temperature -25 to 85 °C · p. 94
- TAS5805MPWPR
- HTSSOP (PWP) | 28 · 2000 units, large tape and reel; operating temperature -25 to 85 °C · p. 94
- TAS5805MPWPR.A
- HTSSOP (PWP) | 28 · 2000 units, large tape and reel; operating temperature -25 to 85 °C · p. 94
Parameters
16- Class
- Class D
- Current - Supply
- 34.5mA
- Features
- Overvoltage Protection
- Operating Temperature
- -25℃~+85℃
- Output Power
- 23W×2@8Ω
- Power Supply Rejection Ratio (PSRR)
- 72dB
- Quiescent Current
- 16.5mA
- Signal-to-Noise Ratio
- 107dB
- Speaker Channels
- 2-Channel
- Standby Current
- 12.7uA
- Thermal Resistance(Junction to Ambient)
- 29.1℃/W
- Thermal Resistance(Junction to Board)
- 8.2℃/W
- Thermal Resistance(Junction to Case)
- 21.8℃/W
- Total Harmonic Distortion + Noise (THD+N)
- 0.03%
- Voltage - Supply
- 1.62V~26.4V
- Voltage - Supply(Absolute Max)
- 3.9V
Order codes
1- TAS5805MPWPRLCSC C478472
Pinout
29| Pin | Name | Type |
|---|---|---|
| 1 | DGND | Power in |
| 2 | DVDD | Power in |
| 3 | ADR/FAULT | Input/output |
| 4 | VR_DIG | Power out |
| 5 | DGND | Passive |
| 6 | LRCLK | Input |
| 7 | SCLK | Input |
| 8 | SDIN | Input |
| 9 | SDOUT | Output |
| 10 | SDA | Input/output |
| 11 | SCL | Input |
| 12 | PDN | Input |
| 13 | AVDD | Power out |
| 14 | AGND | Power in |
| 15 | PVDD | Power in |
| 16 | PVDD | Passive |
| 17 | OUT_B+ | Output |
| 18 | BST_B+ | Passive |
| 19 | PGND | Power in |
| 20 | OUT_B- | Output |
| 21 | BST_B- | Passive |
| 22 | BST_A- | Passive |
| 23 | OUT_A- | Output |
| 24 | PGND | Passive |
| 25 | BST_A+ | Passive |
| 26 | OUT_A+ | Output |
| 27 | PVDD | Passive |
| 28 | PVDD | Passive |
| 29 | EP | Passive |
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Is there a KiCad symbol and footprint for the TAS5805MPWP?
Yes. The symbol is Amplifier_Audio:TAS5805MPWP and the footprint Package_SO:TSSOP-28-1EP_4.4x9.7mm_P0.65mm_EP3.4x9.7mm_Mask3.1x4.05mm, both drawn on this page. PCBKit places them on a board for you when you design with it.
What package is the TAS5805MPWP?
HTSSOP-28-EP, with 29 pins. Its footprint is drawn on this page.
Where is the TAS5805MPWP datasheet?
Texas Instruments publishes it: the Datasheet link on this page opens it.
Where can I order the TAS5805MPWP?
JLCPCB lists it as part C478472, with 3,303 in stock; the sellers' links on this page open their listings.
Which open-source boards use the TAS5805MPWP?
11 boards in 8 repositories on GitHub; the most starred are listed on this page, with their KiCad files.