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SN74LVC574APW

Texas InstrumentsExtended

-40℃~+125℃ 1 1.5ns 1.65V~3.6V 10uA 150MHz 24mA 24mA 2ns 4pF 6.8ns@3.3V,50pF 74LVC Series 8 D-Type Enable Rising Edge Tri-State TSSOP-20 Flip Flops ROHS

Part id
ti/SN74LVC574APW
Category
Flip Flops
Package
TSSOP-20
Pins
20
In stock
285 at JLCPCB (C7672)

Overview

The SN74LVC574APW is a flip Flop made by Texas Instruments in a TSSOP-20 package with 20 pins. -40℃~+125℃ 1 1.5ns 1.65V~3.6V 10uA 150MHz 24mA 24mA 2ns 4pF 6.8ns@3.3V,50pF 74LVC Series 8 D-Type Enable Rising Edge Tri-State TSSOP-20 Flip Flops ROHS.

PCBKit's library has its KiCad symbol (74xx:74LS574, from KiCad's library) and its footprint (Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm, from KiCad's library), ready for a KiCad board. 285 are in stock at JLCPCB (part C7672).

Symbol

1OE2D03D14D25D36D47D58D69D710GND11Cp12Q713Q614Q515Q416Q317Q218Q119Q020VCC
74xx:74LS574From KiCad's library

Footprint

1234567891011121314151617181920
Package_SO:TSSOP-20_4.4x6.5mm_P0.65mmFrom KiCad's library

From the datasheet

8
Supply, least
1.65 V · VCC, recommended operating min · p. 4
Supply, most
3.6 V · VCC, recommended operating max · p. 4
Supply, absolute maximum
6.5 V · VCC, absolute max · p. 3
Works from
-40 °C · PW operating free-air temperature min · p. 2
Works up to
125 °C · PW operating free-air temperature max · p. 2
Takes working
10 µA · VCC supply current max, 3.6 V, IO = 0, inputs at VCC or GND · p. 6
A pin gives at most
50 mA · continuous output current absolute max magnitude · p. 3
Junction to air (PW)
83 K/W · junction-to-ambient package thermal impedance · p. 3

What it is and has

3
Outputs
3-state · p. 1
Input voltage tolerance
5.5 V · p. 1
Partial-power-down protection
Ioff circuitry disables outputs to prevent current backflow when powered down · p. 1

Around it

1
res not specified
between OE and VCC; Pull-up ensures high-impedance outputs during power up or power down; minimum resistance depends on the driver's current-sinking capability. · p. 2

Specifications

86
ParameterConditionsAs printedPage
Supply voltage range VCCmin -0.5 · max 6.5 V3
Input voltage range VIsee Note 1min -0.5 · max 6.5 V3
Voltage range applied to any output in the high-impedance or power-off state VOsee Note 1min -0.5 · max 6.5 V3
Voltage range applied to any output in the high or low state VOMaximum = VCC + 0.5 V; see Notes 1 and 2min -0.5 V3
Input clamp current IIKVI < 0min -50 mA3
Output clamp current IOKVO < 0min -50 mA3
Continuous output current IO±50 mAmin -50 · max 50 mA3
Continuous current through VCC or GND±100 mAmin -100 · max 100 mA3
Package thermal impedance θJAPW package; see Note 3max 83 °C/W3
Storage temperature range Tstgmin -65 · max 150 °C3
Power dissipation PtotTA = −40°C to 125°C; see Notes 5 and 6max 500 mW3
Supply voltage VCCSN74LVC574A; operating; −40 TO 125°Cmin 1.65 · max 3.6 V4
Supply voltage VCCSN74LVC574A; data retention only; −40 TO 125°Cmin 1.5 V4
High-level input voltage VIHSN74LVC574A; −40 TO 125°C; VCC = 2.3 V to 2.7 Vmin 1.7 V4
High-level input voltage VIHSN74LVC574A; −40 TO 125°C; VCC = 2.7 V to 3.6 Vmin 2 V4
Low-level input voltage VILSN74LVC574A; −40 TO 125°C; VCC = 2.3 V to 2.7 Vmax 0.7 V4
Low-level input voltage VILSN74LVC574A; −40 TO 125°C; VCC = 2.7 V to 3.6 Vmax 0.8 V4
Input voltage VISN74LVC574A; −40 TO 125°Cmin 0 · max 5.5 V4
Output voltage VOSN74LVC574A; −40 TO 125°C; high or low state; maximum = VCCmin 0 V4
Output voltage VOSN74LVC574A; −40 TO 125°C; 3−statemin 0 · max 5.5 V4
High-level output current IOHSN74LVC574A; −40 TO 125°C; VCC = 1.65 Vmax -4 mA4
High-level output current IOHSN74LVC574A; −40 TO 125°C; VCC = 2.3 Vmax -8 mA4
High-level output current IOHSN74LVC574A; −40 TO 125°C; VCC = 2.7 Vmax -12 mA4
High-level output current IOHSN74LVC574A; −40 TO 125°C; VCC = 3 Vmax -24 mA4
Low-level output current IOLSN74LVC574A; −40 TO 125°C; VCC = 1.65 Vmax 4 mA4
Low-level output current IOLSN74LVC574A; −40 TO 125°C; VCC = 2.3 Vmax 8 mA4
Low-level output current IOLSN74LVC574A; −40 TO 125°C; VCC = 2.7 Vmax 12 mA4
Low-level output current IOLSN74LVC574A; −40 TO 125°C; VCC = 3 Vmax 24 mA4
Input transition rise or fall rate Δt/ΔvSN74LVC574A; −40 TO 125°Cmax 6 ns/V4
VOH VOHSN74LVC574A; −40 TO 125°C; IOH = −4 mA; VCC = 1.65 Vmin 1.2 V6
VOH VOHSN74LVC574A; −40 TO 125°C; IOH = −8 mA; VCC = 2.3 Vmin 1.7 V6
VOH VOHSN74LVC574A; −40 TO 125°C; IOH = −12 mA; VCC = 2.7 Vmin 2.2 V6
VOH VOHSN74LVC574A; −40 TO 125°C; IOH = −12 mA; VCC = 3 Vmin 2.4 V6
VOH VOHSN74LVC574A; −40 TO 125°C; IOH = −24 mA; VCC = 3 Vmin 2.2 V6
VOL VOLSN74LVC574A; −40 TO 125°C; IOL = 100 uA; VCC = 1.65 V to 3.6 Vmax 0.2 V6
VOL VOLSN74LVC574A; −40 TO 125°C; IOL = 4 mA; VCC = 1.65 Vmax 0.45 V6
VOL VOLSN74LVC574A; −40 TO 125°C; IOL = 8 mA; VCC = 2.3 Vmax 0.7 V6
VOL VOLSN74LVC574A; −40 TO 125°C; IOL = 12 mA; VCC = 2.7 Vmax 0.4 V6
VOL VOLSN74LVC574A; −40 TO 125°C; IOL = 24 mA; VCC = 3 Vmax 0.55 V6
II IISN74LVC574A; −40 TO 125°C; VI = 5.5 V or GND; VCC = 3.6 V; ±5 uAmin -5 · max 5 uA6
Ioff IoffSN74LVC574A; −40 TO 125°C; VI or VO = 5.5 V; VCC = 0; ±10 uAmin -10 · max 10 uA6
IOZ IOZSN74LVC574A; −40 TO 125°C; VI = 0 to 5.5 V; VCC = 3.6 V; ±10 uAmin -10 · max 10 uA6
ICC ICCSN74LVC574A; −40 TO 125°C; VI = VCC or GND; IO = 0; VCC = 3.6 Vmax 10 uA6
ICC ICCSN74LVC574A; −40 TO 125°C; 3.6 V ≤ VI ≤ 5.5 V; disabled state only; IO = 0; VCC = 3.6 Vmax 10 uA6
ΔICC ΔICCSN74LVC574A; −40 TO 125°C; one input at VCC − 0.6 V, other inputs at VCC or GND; VCC = 2.7 V to 3.6 Vmax 500 uA6
Ci CiSN74LVC574A; TA = 25°C; VI = VCC or GND; VCC = 3.3 Vtyp 4 pF6
Co CoSN74LVC574A; TA = 25°C; VO = VCC or GND; VCC = 3.3 Vtyp 5.5 pF6
Clock frequency fclockSN74LVC574A; −40 TO 125°C; VCC = 1.8 V ± 0.15 Vmax 40 MHz7
Clock frequency fclockSN74LVC574A; −40 TO 125°C; VCC = 2.5 V ± 0.2 Vmax 80 MHz7
Clock frequency fclockSN74LVC574A; −40 TO 125°C; VCC = 2.7 Vmax 150 MHz7
Clock frequency fclockSN74LVC574A; −40 TO 125°C; VCC = 3.3 V ± 0.3 Vmax 150 MHz7
Pulse duration, CLK high or low twSN74LVC574A; −40 TO 125°C; VCC = 1.8 V ± 0.15 Vmin 9 ns7
Pulse duration, CLK high or low twSN74LVC574A; −40 TO 125°C; VCC = 2.5 V ± 0.2 Vmin 4 ns7
Pulse duration, CLK high or low twSN74LVC574A; −40 TO 125°C; VCC = 2.7 Vmin 3.3 ns7
Pulse duration, CLK high or low twSN74LVC574A; −40 TO 125°C; VCC = 3.3 V ± 0.3 Vmin 3.3 ns7
Setup time, data before CLK↑ tsuSN74LVC574A; −40 TO 125°C; VCC = 1.8 V ± 0.15 Vmin 6 ns7
Setup time, data before CLK↑ tsuSN74LVC574A; −40 TO 125°C; VCC = 2.5 V ± 0.2 Vmin 4 ns7
Setup time, data before CLK↑ tsuSN74LVC574A; −40 TO 125°C; VCC = 2.7 Vmin 2 ns7
Setup time, data before CLK↑ tsuSN74LVC574A; −40 TO 125°C; VCC = 3.3 V ± 0.3 Vmin 2 ns7
Hold time, data after CLK↑ thSN74LVC574A; −40 TO 125°C; VCC = 1.8 V ± 0.15 Vmin 4 ns7
Hold time, data after CLK↑ thSN74LVC574A; −40 TO 125°C; VCC = 2.5 V ± 0.2 Vmin 2 ns7
Hold time, data after CLK↑ thSN74LVC574A; −40 TO 125°C; VCC = 2.7 Vmin 1.5 ns7
Hold time, data after CLK↑ thSN74LVC574A; −40 TO 125°C; VCC = 3.3 V ± 0.3 Vmin 1.5 ns7
fmax fmaxSN74LVC574A; −40 TO 125°C; VCC = 1.8 V ± 0.15 Vmin 40 MHz8
fmax fmaxSN74LVC574A; −40 TO 125°C; VCC = 2.5 V ± 02 Vmin 80 MHz8
fmax fmaxSN74LVC574A; −40 TO 125°C; VCC = 2.7 Vmin 150 MHz8
fmax fmaxSN74LVC574A; −40 TO 125°C; VCC = 3.3 V ± 0.3 Vmin 150 MHz8
tpd tpdSN74LVC574A; −40 TO 125°C; CLK to Q; VCC = 1.8 V ± 0.15 Vmin 1 · max 21.6 ns8
tpd tpdSN74LVC574A; −40 TO 125°C; CLK to Q; VCC = 2.5 V ± 0.2 Vmin 1 · max 10.5 ns8
tpd tpdSN74LVC574A; −40 TO 125°C; CLK to Q; VCC = 2.7 Vmin 1 · max 8 ns8
tpd tpdSN74LVC574A; −40 TO 125°C; CLK to Q; VCC = 3.3 V ± 0.3 Vmin 2.2 · max 7 ns8
ten tenSN74LVC574A; −40 TO 125°C; OE to Q; VCC = 1.8 V ± 0.15 Vmin 1 · max 19.5 ns8
ten tenSN74LVC574A; −40 TO 125°C; OE to Q; VCC = 2.5 V ± 0.2 Vmin 1 · max 10.5 ns8
ten tenSN74LVC574A; −40 TO 125°C; OE to Q; VCC = 2.7 Vmin 1 · max 8.5 ns8
ten tenSN74LVC574A; −40 TO 125°C; OE to Q; VCC = 3.3 V ± 0.3 Vmin 1.5 · max 7.5 ns8
tdis tdisSN74LVC574A; −40 TO 125°C; OE to Q; VCC = 1.8 V ± 0.15 Vmin 1 · max 18.8 ns8
tdis tdisSN74LVC574A; −40 TO 125°C; OE to Q; VCC = 2.5 V ± 0.2 Vmin 1 · max 7.8 ns8
tdis tdisSN74LVC574A; −40 TO 125°C; OE to Q; VCC = 2.7 Vmin 1 · max 7.3 ns8
tdis tdisSN74LVC574A; −40 TO 125°C; OE to Q; VCC = 3.3 V ± 0.3 Vmin 1.7 · max 6.6 ns8
tsk(o) tsk(o)SN74LVC574A; −40 TO 125°C; VCC = 3.3 V ± 0.3 Vmax 1 ns8
Power dissipation capacitance per flip−flop CpdOutputs enabled; f = 10 MHz; VCC = 1.8 Vtyp 25 pF8
Power dissipation capacitance per flip−flop CpdOutputs enabled; f = 10 MHz; VCC = 2.5 Vtyp 29 pF8
Power dissipation capacitance per flip−flop CpdOutputs enabled; f = 10 MHz; VCC = 3.3 Vtyp 30 pF8
Power dissipation capacitance per flip−flop CpdOutputs disabled; f = 10 MHz; VCC = 1.8 Vtyp 9 pF8
Power dissipation capacitance per flip−flop CpdOutputs disabled; f = 10 MHz; VCC = 2.5 Vtyp 9 pF8
Power dissipation capacitance per flip−flop CpdOutputs disabled; f = 10 MHz; VCC = 3.3 Vtyp 11 pF8

Pins, by the datasheet

20
1 OE
Output enable; high places all eight outputs in the high-impedance state. · p. 1
2 1D
Data input for flip-flop 1. · p. 1
3 2D
Data input for flip-flop 2. · p. 1
4 3D
Data input for flip-flop 3. · p. 1
5 4D
Data input for flip-flop 4. · p. 1
6 5D
Data input for flip-flop 5. · p. 1
7 6D
Data input for flip-flop 6. · p. 1
8 7D
Data input for flip-flop 7. · p. 1
9 8D
Data input for flip-flop 8. · p. 1
10 GND
Ground. · p. 1
11 CLK
Clock input; the positive transition transfers the data inputs to the Q outputs. · p. 1
12 8Q
3-state output for flip-flop 8. · p. 1
13 7Q
3-state output for flip-flop 7. · p. 1
14 6Q
3-state output for flip-flop 6. · p. 1
15 5Q
3-state output for flip-flop 5. · p. 1
16 4Q
3-state output for flip-flop 4. · p. 1
17 3Q
3-state output for flip-flop 3. · p. 1
18 2Q
3-state output for flip-flop 2. · p. 1
19 1Q
3-state output for flip-flop 1. · p. 1
20 VCC
Supply voltage. · p. 1

Ordering codes, by the datasheet

15
SN74LVC574ARGYR
QFN − RGY · −40°C to 85°C; reel of 1000 · p. 2
SN74LVC574AGQNR
VFBGA − GQN · −40°C to 85°C; reel of 1000 · p. 2
SN74LVC574AZQNR
VFBGA − ZQN (Pb-free) · −40°C to 85°C; reel of 1000 · p. 2
SN74LVC574AN
PDIP − N · −40°C to 125°C; tube of 20 · p. 2
SN74LVC574ADW
SOIC − DW · −40°C to 125°C; tube of 25 · p. 2
SN74LVC574ADWR
SOIC − DW · −40°C to 125°C; reel of 2000 · p. 2
SN74LVC574ANSR
SOP − NS · −40°C to 125°C; reel of 2000 · p. 2
SN74LVC574ADBR
SSOP − DB · −40°C to 125°C; reel of 2000 · p. 2
SN74LVC574APW
TSSOP − PW · −40°C to 125°C; tube of 70 · p. 2
SN74LVC574APWR
TSSOP − PW · −40°C to 125°C; reel of 2000 · p. 2
SN74LVC574APWT
TSSOP − PW · −40°C to 125°C; reel of 250 · p. 2
SN74LVC574ADGVR
TVSOP − DGV · −40°C to 125°C; reel of 2000 · p. 2
SNJ54LVC574AJ
CDIP − J · −55°C to 125°C; tube of 20 · p. 2
SNJ54LVC574AW
CFP − W · −55°C to 125°C; tube of 85 · p. 2
SNJ54LVC574AFK
LCCC − FK · −55°C to 125°C; tube of 55 · p. 2

Parts like it

8

Questions

Is there a KiCad symbol and footprint for the SN74LVC574APW?

Yes. The symbol is 74xx:74LS574 and the footprint Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm, both drawn on this page. PCBKit places them on a board for you when you design with it.

What package is the SN74LVC574APW?

TSSOP-20, with 20 pins. Its footprint is drawn on this page.

Where is the SN74LVC574APW datasheet?

Texas Instruments publishes it: the Datasheet link on this page opens it.

Where can I order the SN74LVC574APW?

JLCPCB lists it as part C7672, with 285 in stock; the sellers' links on this page open their listings.

What can replace the SN74LVC574APW?

Parts like it in the library: the MC74LCX574DT by onsemi, the CLVC574AQPWRG4Q1 by Texas Instruments, the SN74ABT273PWRE4 by Texas Instruments and the SN74ALVCH374PW by Texas Instruments. Check their datasheets: a part that fits the footprint may still differ in its ratings.