PCM1865DBTR

Texas InstrumentsExtended

-40℃~+125℃ 1.65V 110dB 192kHz 192kHz 24 3V~3.6V 4 Programmable gain、Multiplexers、Internal reference source、ESD protection SPI、I2C TSSOP-30 Analog Front End (AFE) ROHS

Datasheet JLCPCB LCSC

Part id: ti/PCM1865DBTR
Category: Analog Front End (AFE)
Package: TSSOP-30
Pins: 30
In stock: 741 at JLCPCB (C181312)
Used on: 7 open-source boards

Overview

The PCM1865DBTR is an analog Front End made by Texas Instruments in a TSSOP-30 package with 30 pins. -40℃~+125℃ 1.65V 110dB 192kHz 192kHz 24 3V~3.6V 4 Programmable gain、Multiplexers、Internal reference source、ESD protection SPI、I2C TSSOP-30 Analog Front End (AFE) ROHS.

PCBKit's library has its KiCad symbol (EasyEDA_Cloud:PCM1865DBTR, from EasyEDA) and its footprint (EasyEDA_Cloud:TSSOP-30_L7.8-W4.4-P0.50-LS6.4-BL, from EasyEDA), ready for a KiCad board. 741 are in stock at JLCPCB (part C181312). 7 open-source boards in 4 repositories on GitHub use it.

Symbol

EasyEDA_Cloud:PCM1865DBTRFrom EasyEDA

Footprint

EasyEDA_Cloud:TSSOP-30_L7.8-W4.4-P0.50-LS6.4-BLFrom EasyEDA

From the datasheet

Supply, least: 3 V · AVDD, recommended operating min · p. 12
Supply, most: 3.6 V · AVDD, recommended operating max · p. 12
Supply, least: 1.62 V · IOVDD, 1.8 V operation min · p. 12
Supply, most: 1.98 V · IOVDD, 1.8 V operation max · p. 12
Supply, absolute maximum: 3.9 V · AVDD to AGND, absolute max · p. 12
Works from: -40 °C · Operating ambient temperature min · p. 12
Works up to: 125 °C · Operating ambient temperature max · p. 12
Junction, hottest: 150 °C · Junction temperature absolute max · p. 12
Junction to air (DBT (TSSOP)): 79.6 K/W · Junction-to-ambient thermal resistance · p. 12
Junction to case (DBT (TSSOP)): 15.1 K/W · Junction-to-case top thermal resistance · p. 12
Junction to board (DBT (TSSOP)): 33.1 K/W · Junction-to-board thermal resistance · p. 12
Takes working: 41.01 mA · sum of AVDD, DVDD and IOVDD typical currents, 4-channel active mode, 3.3 V supplies · p. 14
Takes working: 39.31 mA · sum of AVDD, DVDD and IOVDD and LDO typical currents, 4-channel active mode, IOVDD = LDO = 1.8 V · p. 15
Takes asleep: 5.35 mA · sum of AVDD, DVDD and IOVDD typical currents, 4-channel sleep mode, 3.3 V supplies · p. 14
Takes asleep: 195 µA · sum of AVDD, DVDD and IOVDD typical currents, 4-channel software standby, 3.3 V supplies · p. 14
Takes asleep: 5.15 mA · sum of AVDD, DVDD and IOVDD and LDO typical currents, 4-channel sleep mode, IOVDD = LDO = 1.8 V · p. 15

What it is and has

Audio ADC sample rate: 8 kHz to 192 kHz · p. 1
Signal-to-noise ratio: 110 dB · p. 1
Single-ended full-scale input: 2.1 VRMS · p. 1
Differential full-scale input: 4.2 VRMS · p. 1
Audio PLL: Integrated high-performance audio PLL · p. 1
Supply: Single 3.3-V power-supply operation · p. 1
Audio interface: Master or slave · p. 1
Protection: Automatic PGA clipping suppression control · p. 1
Package: TSSOP (30), 7.80 mm × 4.40 mm · p. 1
SNR: 110 dB · p. 1
ADC sample rate: 8 kHz to 192 kHz · p. 1
Digital microphones: Up to four, shared clock from GPIO2 and two data lines · p. 34

Around it

cap 1-µF: between VREF and AGND; Reference voltage output decoupling. · p. 11
cap 0.1-µF: between AVDD and AGND; Analog supply decoupling. · p. 11
cap 10-µF: between AVDD and AGND; Analog supply decoupling. · p. 11
cap 0.1-µF: between LDO and DGND; Internal LDO decoupling. · p. 11
cap 10-µF: between LDO and DGND; Internal LDO decoupling. · p. 11
cap 0.1-µF: between DVDD and DGND; Digital supply decoupling. · p. 11
cap 10-µF: between DVDD and DGND; Digital supply decoupling. · p. 11

Specifications

101

Parameter	Conditions	As printed	Page
Supply voltage	AVDD to AGND; over operating temperature	min -0.3 · max 3.9 V	12
Supply voltage	DVDD to DGND; over operating temperature	min -0.3 · max 3.9 V	12
Supply voltage	IOVDD to DGND; over operating temperature	min -0.3 · max 3.9 V	12
Ground voltage differences	AGND to DGND	min -0.3 · max 0.3 V	12
Digital input voltage	Digital input to DGND	min -0.3 V	12
Digital input voltage	XI to DGND	min -0.3 · max 2.1 V	12
Analog input voltage	VINxx to AGND	min -1.7 · max 5 V	12
Temperature TA	Operating ambient	min -40 · max 125 °C	12
Temperature TJ	Junction	min -40 · max 150 °C	12
Temperature Tstg	Storage	min -40 · max 150 °C	12
Electrostatic discharge V(ESD)	Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001; ±2000 V	max 2000 V	12
Electrostatic discharge V(ESD)	Charged-device model (CDM), per JEDEC specification JESD22-C101; ±750 V	max 750 V	12
Analog supply voltage to AGND AVDD		min 3 · typ 3.3 · max 3.6 V	12
Digital supply voltage to DGND DVDD		min 3 · typ 3.3 · max 3.6 V	12
IO supply voltage to DGND IOVDD	at 1.8 V	min 1.62 · typ 1.8 · max 1.98 V	12
IO supply voltage to DGND IOVDD	at 3.3 V	min 3 · typ 3.3 · max 3.6 V	12
Operating ambient temperature TA		min -40 · max 125 °C	12
Junction-to-ambient thermal resistance RθJA	PCM186x, DBT (TSSOP), 30 PINS	typ 79.6 °C/W	12
Junction-to-case (top) thermal resistance RθJC(top)	PCM186x, DBT (TSSOP), 30 PINS	typ 15.1 °C/W	12
Junction-to-board thermal resistance RθJB	PCM186x, DBT (TSSOP), 30 PINS	typ 33.1 °C/W	12
Junction-to-top characterization parameter ψJT	PCM186x, DBT (TSSOP), 30 PINS	typ 0.4 °C/W	12
Junction-to-board characterization parameter ψJB	PCM186x, DBT (TSSOP), 30 PINS	typ 32.6 °C/W	12
Input channel signal-to-noise ratio, differential input	PCM1865; 0-dB PGA gain, –60-dB input signal, master mode at Diff input	min 97 · typ 110 dB	13
Input channel signal-to-noise ratio, differential input	32-dB PGA gain, –86-dB input signal, master mode at Diff input	min 85 · typ 90 dB	13
Input channel THD+N, differential input	0-dB PGA gain, –1-dB input signal, master mode at Diff input	min -85 · typ -93 dB	13
Input channel THD+N, differential input	32-dB PGA gain, –33-dB input signal, master mode at Diff input	min -76 · typ -84 dB	13
L channel to R channel separation line input	0-dB PGA gain, –1-dB input signal, master mode	typ -105 dB	13
L channel to R channel separation mic input	20-dB PGA gain, –1-dB input signal, master mode	typ -105 dB	13
L1 channel to L2 channel separation line input	0-dB PGA gain, –1-dB input signal, master mode	typ -105 dB	13
R1 channel to R2 channel separation line input	0-dB PGA gain, –1-dB input signal, master mode	typ -105 dB	13
L1 channel to L2 channel separation mic input	20-dB PGA gain, –1-dB input signal, master mode	typ -105 dB	13
R1 channel to R2 channel separation mic input	20-dB PGA gain, –1-dB input signal, master mode	typ -105 dB	13
Range of analog PGA	–12 to +12 dB (1-dB step), 20 dB, and 32 dB	min -12 · max 32 dB	13
Accuracy of PGA + ADC		typ 0.5 dB	13
Matching between PGA + ADCs on-chip		typ 0.05 dB	13
Full-scale voltage input	Single-ended mode	max 2.1 VRMS	13
Full-scale voltage input	Differential mode (2.1 VRMS per pin)	max 4.2 VRMS	13
Input channel signal-to-noise ratio, single-ended input	PCM1865; 0-dB PGA gain, –60-dB input signal, master mode at SE input	typ 106 dB	13
Input channel signal-to-noise ratio, single-ended input	32-dB PGA gain, –92-dB input signal, master mode at SE input	typ 75 dB	13
Input channel THD+N, single-ended input	0-dB PGA gain, –1-dB input signal, master mode at SE input	typ 87 dB	13
Input channel THD+N, single-ended input	32-dB PGA gain, –33-dB input signal, master mode at SE input	typ 68 dB	13
Input impedance per analog input pin	PCM1865	typ 10 kΩ	13
Common-mode rejection ratio CMRR	Differential input, 1-kHz signal on both pins and measure level at output	typ 56 dB	13
Default Energysense signal detection threshold	At 1 kHz	typ -57 dBFS	13
Energysense signal bandwidth		typ 10 kHz	13
Energysense accuracy	Specified by design	typ 3 dB	13
Secondary ADC accuracy		typ 12 bits	13
Secondary ADC sampling rate		min 8 · max 192 kHz	13
AVDD current	4-channel device, AVDD = DVDD = IOVDD = 3.3 V, active mode; TA = 25°C, slave mode, single-speed mode, fS = 48 kHz, system clock = 512 × fS, 24-bit data	typ 31 mA	14
DVDD current	4-channel device, AVDD = DVDD = IOVDD = 3.3 V, active mode	typ 0.01 mA	14
IOVDD current	4-channel device, AVDD = DVDD = IOVDD = 3.3 V, active mode	typ 10 mA	14
Total power	4-channel device, AVDD = DVDD = IOVDD = 3.3 V, active mode	typ 135.3 mW	14
AVDD current	4-channel device, AVDD = DVDD = IOVDD = 3.3 V, sleep mode	typ 2.8 mA	14
DVDD current	4-channel device, AVDD = DVDD = IOVDD = 3.3 V, sleep mode	typ 0.35 mA	14
IOVDD current	4-channel device, AVDD = DVDD = IOVDD = 3.3 V, sleep mode	typ 2.2 mA	14
Total power	4-channel device, AVDD = DVDD = IOVDD = 3.3 V, sleep mode	typ 17.655 mW	14
AVDD current	4-channel device, AVDD = DVDD = IOVDD = 3.3 V, standby mode for software device	typ 0.06 mA	14
DVDD current	4-channel device, AVDD = DVDD = IOVDD = 3.3 V, standby mode for software device	typ 0.015 mA	14
IOVDD current	4-channel device, AVDD = DVDD = IOVDD = 3.3 V, standby mode for software device	typ 0.12 mA	14
Total power	4-channel device, AVDD = DVDD = IOVDD = 3.3 V, standby mode for software device	typ 0.644 mW	14
AVDD current	4-channel device, AVDD = DVDD = 3.3 V, IOVDD = LDO = 1.8 V, active mode	typ 31 mA	15
DVDD current	4-channel device, AVDD = DVDD = 3.3 V, IOVDD = LDO = 1.8 V, active mode	typ 0.01 mA	15
IOVDD and LDO Current	4-channel device, AVDD = DVDD = 3.3 V, IOVDD = LDO = 1.8 V, active mode	typ 8.3 mA	15
Total power	4-channel device, AVDD = DVDD = 3.3 V, IOVDD = LDO = 1.8 V, active mode	typ 117.3 mW	15
AVDD current	4-channel device, AVDD = DVDD = 3.3 V, IOVDD = LDO = 1.8 V, sleep mode	typ 2.8 mA	15
DVDD current	4-channel device, AVDD = DVDD = 3.3 V, IOVDD = LDO = 1.8 V, sleep mode	typ 0.35 mA	15
IOVDD and LDO Current	4-channel device, AVDD = DVDD = 3.3 V, IOVDD = LDO = 1.8 V, sleep mode	typ 2 mA	15
Total power	4-channel device, AVDD = DVDD = 3.3 V, IOVDD = LDO = 1.8 V, sleep mode	typ 13.995 mW	15
AVDD current	4-channel device, AVDD = DVDD = 3.3 V, IOVDD = LDO = 1.8 V, standby mode for software device	typ 0.06 mA	15
DVDD current	4-channel device, AVDD = DVDD = 3.3 V, IOVDD = LDO = 1.8 V, standby mode for software device	typ 0.007 mA	15
Total power (1)	4-channel device, AVDD = DVDD = 3.3 V, IOVDD = LDO = 1.8 V, standby mode for software device	typ 0.221 mW	15
Additional current consumption	on IOVDD when XTAL is used	typ 0.5 mA	15
Additional current consumption	on DVDD in BCK PLL mode	typ 1.5 mA	15
Additional current consumption	on IOVDD when master mode is enabled	typ 2 mA	15
Additional current consumption	IOVDD = 3.3 V or IOVDD = LDO = 1.8 V, fS = 192 kHz, 4-channel active mode	typ 7.5 mA	15
Power-supply rejection ratio PSRR	TA = 25°C, AVDD = DVDD = IOVDD = 3.3 V, slave mode, single-speed mode, fS = 48 kHz, system clock = 512 × fS, 24-bit data	typ 80 dB	15
Mic bias noise	TA = 25°C, AVDD = DVDD = IOVDD = 3.3 V	typ 5 uVRMS	15
Mic bias current drive	TA = 25°C, AVDD = DVDD = IOVDD = 3.3 V	typ 4 mA	15
Mic bias voltage	TA = 25°C, AVDD = DVDD = IOVDD = 3.3 V	typ 2.6 V	15
Output logic high voltage level VOH	IOH = 2 mA	typ 75 %IOVDD	15
Output logic low voltage level VOL	IOL = –2 mA	typ 25 %IOVDD	15
Input logic high current level \|IIH\|1	All digital pins	max 10 uA	15
Input logic low current level \|IIL\|1	All digital pins	max -10 uA	15
Pass band	CLASSIC FIR	typ 0.454 fS	16
Stop band	CLASSIC FIR	typ 0.583 fS	16
Pass-band ripple	CLASSIC FIR	typ 0.05 dB	16
Stop-band attenuation	CLASSIC FIR	typ -65 dB	16
Group delay or latency	CLASSIC FIR	typ 30 Samples	16
HPF –3-dB cutoff frequency	CLASSIC FIR	typ 1 Hz	16
Pass band	LOW LATENCY IIR	typ 0.454 fS	16
Stop band	LOW LATENCY IIR	typ 0.546 fS	16
Pass-band ripple	LOW LATENCY IIR	typ 0.02 dB	16
Stop-band attenuation	LOW LATENCY IIR	typ -75 dB	16
Group delay or latency	LOW LATENCY IIR	typ 10 Samples	16
HPF –3-dB cutoff frequency	LOW LATENCY IIR	typ 1 Hz	16
XTAL support	TA = 25°C, AVDD = DVDD = IOVDD = 3.3 V, master mode, single-speed mode, fS = 48 kHz, system clock = 256 × fS, 24-bit data	min 15 · max 35 MHz	16
MCLK frequency	3.3 V on MCLK pin	min 1 · max 50 MHz	16
MCLK	1.8 V MCLK input on XI pin	min 1 · max 50 MHz	16
MCLK input duty cycle	1.8 V MCLK	min 48 · max 52 %	16
Maximum BCK frequency	IOVDD = 3.3 V	max 50 MHz	16
Maximum BCK frequency	IOVDD = 1.8 V	max 25 MHz	16

Pins, by the datasheet

1 VINL2/VIN1M: Analog input 2, L-channel, or differential M input for input 1. · p. 11
2 VINR2/VIN2M: Analog input 2, R-channel, or differential M input for input 2. · p. 11
3 VINL1/VIN1P: Analog input 1, L-channel, or differential P input for input 1. · p. 11
4 VINR1/VIN2P: Analog input 1, R-channel, or differential P input for input 2. · p. 11
5 Mic Bias: Microphone bias output. · p. 11
6 VREF: Reference voltage output decoupling point, typically 0.5 AVDD; connect 1-uF capacitor to AGND. · p. 11
7 AGND: Analog ground. · p. 11
8 AVDD: Analog power supply, typically 3.3 V; connect 0.1-uF and 10-uF capacitors to AGND. · p. 11
9 XO: Crystal oscillator output. · p. 11
10 XI: Crystal oscillator input or master clock input, 1.8-V CMOS signal. · p. 11
11 LDO: Internal LDO decoupling output or external 1.8-V input to bypass LDO; connect 0.1-uF and 10-uF capacitors to DGND. · p. 11
12 DGND: Digital ground. · p. 11
13 DVDD: Digital power supply, typically 3.3 V; connect 0.1-uF and 10-uF capacitors to DGND. · p. 11
14 IOVDD: Power supply for I/O voltages, typically 3.3 V or 1.8 V. · p. 11
15 SCKI: CMOS level (3.3 V) master clock input. · p. 11
16 LRCK: Audio data world clock (left right clock) input/output; Schmitt trigger input with internal pull-down, typically 50 kΩ. · p. 11
17 BCK: Audio data bit clock input/output; Schmitt trigger input with internal pull-down, typically 50 kΩ. · p. 11
18 DOUT: Audio data digital output. · p. 11
19 GPIO3/INTC: GPIO 3 or interrupt C. · p. 11
20 GPIO2/INTB/DMCLK: GPIO 2, interrupt B, or digital microphone clock output. · p. 11
21 GPIO1/INTA/DMIN: GPIO 1, interrupt A, or digital microphone input. · p. 11
22 MISO/GPIO0/DMIN2: SPI master in, slave out; in I2C mode GPIO0 or DMIN2. · p. 11
23 MOSI/SDA: SPI master out, slave in; I2C SDA. · p. 11
24 MC/SCL: Serial bit clock in SPI or I2C mode. · p. 11
25 MS/AD: SPI chip select or I2C address pin. · p. 11
26 MD0: Control method select: I2C when tied low or not connected, SPI when tied high. · p. 11
27 VINL4/VIN4M: Analog input 4, L-channel, or differential M input for input 4. · p. 11
28 VINR4/VIN3M: Analog input 4, R-channel, or differential M input for input 3. · p. 11
29 VINL3/VIN4P: Analog input 3, L-channel, or differential P input for input 4. · p. 11
30 VINR3/VIN3P: Analog input 3, R-channel, or differential P input for input 3. · p. 11

Parameters

Current - Supply: 41.01mA
Data rate: 192kHz
Features: Programmable gain
Interface: SPI
Junction Temperature(Max): 150℃
Number of channels: 4
Operating Temperature: -40℃~+125℃
Resolution(Bits): 24
S/N Ratio: 110dB
Sampling Rate: 192kHz
Standby Current: 5.35mA
Thermal Resistance(Junction to Ambient): 79.6℃/W
Thermal Resistance(Junction to Board): 33.1℃/W
Thermal Resistance(Junction to Case): 15.1℃/W
Voltage - Supply: 1.62V~3.6V
Voltage - Supply(Absolute Max): 3.9V
Voltage Reference Value: 1.65V

Order codes

PCM1865DBTRLCSC C181312

Pinout

The pins of the PCM1865DBTR
Pin	Name	Type
1	VINL2/VIN1M	Unspecified
2	VINR2/VIN2M	Unspecified
3	VINL1/VIN1P	Unspecified
4	VINR1/VIN2P	Unspecified
5	MicBias	Unspecified
6	VREF	Unspecified
7	AGND	Unspecified
8	AVDD	Unspecified
9	XO	Unspecified
10	XI	Unspecified
11	LDO	Unspecified
12	DGND	Unspecified
13	DVDD	Unspecified
14	IOVDD	Unspecified
15	SCKI(3.3V)	Unspecified
16	LRCK	Unspecified
17	BCK	Unspecified
18	DOUT	Unspecified
19	GPIO 3/Int C	Unspecified
20	GPIO 2/Int B/DMCLK	Unspecified
21	GPIO 1/Int A/DMIN	Unspecified
22	MISO/GPIO0	Unspecified
23	MOSI/SDA	Unspecified
24	MC/SCL	Unspecified
25	MS/AD	Unspecified
26	MD0	Unspecified
27	VINL4/VIN4M	Unspecified
28	VINR4/VIN3M	Unspecified
29	VINL3/VIN4P	Unspecified
30	VINR3/VIN3P	Unspecified

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Questions

Is there a KiCad symbol and footprint for the PCM1865DBTR?

Yes. The symbol is EasyEDA_Cloud:PCM1865DBTR and the footprint EasyEDA_Cloud:TSSOP-30_L7.8-W4.4-P0.50-LS6.4-BL, both drawn on this page. PCBKit places them on a board for you when you design with it.

What package is the PCM1865DBTR?

TSSOP-30, with 30 pins. Its footprint is drawn on this page.

Where is the PCM1865DBTR datasheet?

Texas Instruments publishes it: the Datasheet link on this page opens it.

Where can I order the PCM1865DBTR?

JLCPCB lists it as part C181312, with 741 in stock; the sellers' links on this page open their listings.

Which open-source boards use the PCM1865DBTR?

7 boards in 4 repositories on GitHub; the most starred are listed on this page, with their KiCad files.

Overview

Symbol

Footprint

From the datasheet

What it is and has

Around it

Specifications

Pins, by the datasheet

Open-source boards using it

Power Supplies

PCM186x Breakout

Route

Rv2 final

Endstufe

InputBoard