4 layers115 × 85 mm
OPA810IDBV
Texas Instruments
-40℃~+125℃ 1 100dB 1pA 2.5uV/℃ 200V/us 2pA 3.7mA 4.75V~27V 500uV 6.3nV/√Hz@500kHz 70MHz 75mA Rail-to-Rail Input, Rail-to-Rail Output Short-Circuit Protection、Built-in compensation SOT-23-5 FET Input Amplifiers ROHS
Extended
- Category
- FET Input Amplifiers
- Package
- SOT-23-5
- Pins
- 5
Overview
The OPA810IDBV is a FET Input Amplifier made by Texas Instruments in a SOT-23-5 package with 5 pins. -40℃~+125℃ 1 100dB 1pA 2.5uV/℃ 200V/us 2pA 3.7mA 4.75V~27V 500uV 6.3nV/√Hz@500kHz 70MHz 75mA Rail-to-Rail Input, Rail-to-Rail Output Short-Circuit Protection、Built-in compensation SOT-23-5 FET Input Amplifiers ROHS.
PCBKit's library has its KiCad symbol (Amplifier_Operational:OPA810xDBV, from KiCad's library) and its footprint (Package_TO_SOT_SMD:SOT-23-5, from KiCad's library), ready for a KiCad board. 4,075 are in stock at JLCPCB (part C2833513). 1 open-source board in 1 repository on GitHub use it.
Symbol
Footprint
From the datasheet
13- Supply, least
- 4.75 V · VS, recommended operating total supply, min · p. 4
- Supply, most
- 27 V · VS, recommended operating total supply, max · p. 4
- Works from
- -40 °C · Ambient temperature, min · p. 4
- Works up to
- 125 °C · Ambient temperature, max · p. 4
- Junction, hottest
- 150 °C · Junction temperature, absolute max · p. 4
- Takes working
- 3.7 mA · IQ per channel, 10-V supply, typical · p. 6
- Takes at most
- 4.7 mA · IQ per channel, 24-V supply, max · p. 8
- A pin gives at most
- 40 mA · Continuous output source or sink, TA = –40°C to +85°C, absolute max · p. 4
- A pin gives at most
- 15 mA · Continuous output source or sink, TA = 125°C, absolute max · p. 4
- Junction to air (DBV (SOT-23))
- 174.3 K/W · Junction-to-ambient thermal resistance · p. 4
- Junction to case (DBV (SOT-23))
- 94.7 K/W · Junction-to-case (top) thermal resistance · p. 4
- Junction to board (DBV (SOT-23))
- 45.4 K/W · Junction-to-board thermal resistance · p. 4
- Edge
- 4 ns · Output rise time, 200-mV step, 10-V supply, typical · p. 5
What it is and has
10- Amplifier channels
- 1, FET-input, unity-gain stable, voltage-feedback · p. 22
- Gain-bandwidth product
- 70MHz · p. 1
- Small-signal bandwidth
- 140MHz · p. 1
- Slew rate
- 200V/µs · p. 1
- Input and output range
- Rail-to-rail · p. 1
- Input voltage noise
- 6.3nV/√Hz at 500kHz · p. 1
- Input current noise
- 5fA/√Hz at 10kHz · p. 1
- Input bias current
- 2pA typical, FET input stage · p. 1
- Package
- DBV (SOT-23, 5), 2.9mm × 2.8mm · p. 1
- Protection
- Output short-circuit protection · p. 23
Specifications
104| Parameter | Conditions | As printed | Page |
|---|---|---|---|
| Supply voltage (total bipolar supplies)(4) VS | Over operating free-air temperature range; printed limit ±14 V; VS = VS+ – VS– | max 14 V | 4 |
| Differential input voltage(2) VIN,Diff | Printed limit ±7 V; lower of ±7 V or total supply voltage | max 7 V | 4 |
| Continuous input current II | Printed limit ±10 mA | max 10 mA | 4 |
| Continuous output current(3) IO | TA = –40℃ to +85℃; printed limit ±40 mA; long-term electromigration limit | max 40 mA | 4 |
| Continuous output current(3) IO | TA = 125℃; printed limit ±15 mA; long-term electromigration limit | max 15 mA | 4 |
| Junction temperature TJ | max 150 °C | 4 | |
| Storage temperature Tstg | min -65 · max 125 °C | 4 | |
| Electrostatic discharge V(ESD) | Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1); ±2500 V | max 2500 V | 4 |
| Electrostatic discharge V(ESD) | Charged-device model (CDM), per ANSI/ESDA/JEDEC JS-002(2); ±1500 V | max 1500 V | 4 |
| Total supply voltage VS | Over operating free-air temperature range | min 4.75 · max 27 V | 4 |
| Ambient temperature TA | 25°C is the NOM column | min -40 · typ 25 · max 125 °C | 4 |
| Junction-to-ambient thermal resistance RθJA | OPA810, DBV (SOT-23), 5 pins | typ 174.3 °C/W | 4 |
| Junction-to-case (top) thermal resistance RθJC(top) | OPA810, DBV (SOT-23), 5 pins | typ 94.7 °C/W | 4 |
| Junction-to-board thermal resistance RθJB | OPA810, DBV (SOT-23), 5 pins | typ 45.4 °C/W | 4 |
| Junction-to-top characterization parameter ψJT | OPA810, DBV (SOT-23), 5 pins | typ 21.6 °C/W | 4 |
| Junction-to-board characterization parameter ψJB | OPA810, DBV (SOT-23), 5 pins | typ 45 °C/W | 4 |
| Small-signal bandwidth SSBW | G = 1, VO = 20 mVPP, RF = 0 Ω | typ 135 MHz | 5 |
| Small-signal bandwidth SSBW | G = 1, VO = 20 mVPP, RF = 0 Ω, CL = 10 pF | typ 140 MHz | 5 |
| Small-signal bandwidth SSBW | G = –1, VO = 20 mVPP | typ 68 MHz | 5 |
| Large-signal bandwidth LSBW | G = 2, VO = 2 VPP | typ 41 MHz | 5 |
| Gain-bandwidth product GBWP | typ 70 MHz | 5 | |
| Bandwidth for 0.1-dB flatness | G = 2, VO = 20 mVPP | typ 16 MHz | 5 |
| Slew rate (20%-80%)(3) SR | G = 2, VO = –2-V to 2-V step | typ 200 V/us | 5 |
| Rise time | VO = 200-mV step | typ 4 ns | 5 |
| Fall time | VO = 200-mV step | typ 4 ns | 5 |
| Settling time to 0.1% | G = 2, VO = 2-V step | typ 47 ns | 5 |
| Settling time to 0.1% | G = 2, VO = 8-V step | typ 65 ns | 5 |
| Settling time to 0.001% | G = 2, VO = 2-V step | typ 330 ns | 5 |
| Settling time to 0.001% | G = 2, VO = 8-V step | typ 230 ns | 5 |
| Input overdrive recovery | G = 1, RF = 0 Ω, (VS– – 0.5 V) to (VS+ + 0.5 V) input | typ 55 ns | 5 |
| Output overdrive recovery | G = –1, (VS– – 0.5 V) to (VS+ + 0.5 V) input | typ 55 ns | 5 |
| Second-order harmonic distortion HD2 | f = 100 kHz, RL = 1 kΩ, VO = 2 VPP | typ -120 dBc | 5 |
| Second-order harmonic distortion HD2 | f = 1 MHz, RL = 1 kΩ, VO = 2 VPP | typ -101 dBc | 5 |
| Third-order harmonic distortion HD3 | f = 100 kHz, RL = 1 kΩ, VO = 2 VPP | typ -137 dBc | 5 |
| Third-order harmonic distortion HD3 | f = 1 MHz, RL = 1 kΩ, VO = 2 VPP | typ -101 dBc | 5 |
| Input-referred voltage noise en | Flat-band, 1/f corner at 1.5 kHz | typ 6.3 nV/√Hz | 5 |
| Input-referred current noise in | f = 10 kHz | typ 5 fA/√Hz | 5 |
| Closed-loop output impedance zO | f = 100 kHz | typ 0.007 Ω | 5 |
| Open-loop voltage gain AOL | f = dc, VO = ±2.5 V | min 108 · typ 120 dB | 5 |
| Input offset voltage VOS | DBV and DCK packages | typ 100 · max 715 uV | 5 |
| Input offset voltage drift | TA = –40°C to +125°C | typ 2.5 · max 10 uV/°C | 5 |
| Input bias current | typ 2 · max 20 pA | 5 | |
| Input offset current | typ 1 · max 20 pA | 5 | |
| Allowable input differential voltage | See Figure 6-54; typical ±7 V | typ 7 V | 6 |
| Differential input capacitance | In open-loop configuration | typ 0.5 pF | 6 |
| Linear output drive (sourcing and sinking) IO(max) | VO = 2.65 V, RL = 51 Ω, ΔVOS < 1 mV | min 52 · typ 75 mA | 6 |
| Output short-circuit current ISC | typ 100 mA | 6 | |
| Capacitive load drive CL | < 3-dB peaking, RS = 0 Ω | typ 10 pF | 6 |
| Quiescent current per channel IQ | typ 3.7 · max 4.6 mA | 6 | |
| Gain-bandwidth product | Auxiliary CMOS input stage | typ 27 MHz | 6 |
| Input-referred voltage noise | Auxiliary CMOS input stage; f = 1 MHz | typ 20 nV/√Hz | 6 |
| Input bias current | Auxiliary CMOS input stage; VCM = VS+ – 1.5 V | typ 2 · max 20 pA | 6 |
| Small-signal bandwidth SSBW | G = 1, Vo = 20 mVPP, RF = 0 Ω | typ 135 MHz | 7 |
| Small-signal bandwidth SSBW | G = 1, Vo = 20 mVPP, RF = 0 Ω, CL= 10 pF | typ 140 MHz | 7 |
| Small-signal bandwidth SSBW | G = –1, Vo = 20 mVPP | typ 68 MHz | 7 |
| Large-signal bandwidth LSBW | G = 2 Vo = 2 VPP | typ 44 MHz | 7 |
| Large-signal bandwidth LSBW | G = 2 Vo = 10 VPP | typ 14 MHz | 7 |
| Bandwidth for 0.1-dB flatness | G = 2, Vo = 20 mVPP | typ 16 MHz | 7 |
| Slew rate (20%-80%)(3) SR | G = 2, Vo = –2-V to 2-V step | typ 237 V/us | 7 |
| Slew rate (20%-80%)(3) SR | G = –1, Vo = –2-V to 2-V step | typ 222 V/us | 7 |
| Slew rate (20%-80%)(3) SR | G = 2, Vo = –4.5-V to 3.5-V step | typ 254 V/us | 7 |
| Rise time | Vo = 200-mV step | typ 4 ns | 7 |
| Fall time | Vo = 200-mV step | typ 4 ns | 7 |
| Settling time to 0.1% | G = 2, Vo = 2-V step | typ 47 ns | 7 |
| Settling time to 0.1% | G = 2, Vo = 10-V step | typ 70 ns | 7 |
| Settling time to 0.001% | G = 2, Vo = 2-V step | typ 320 ns | 7 |
| Settling time to 0.001% | G = 2, Vo = 10-V step | typ 200 ns | 7 |
| Input overdrive recovery | G = 1, RF = 0 Ω, (VS– – 0.5 V) to (VS+ + 0.5 V) input | typ 35 ns | 7 |
| Output overdrive recovery | G = –1, (VS– – 0.5 V) to (VS+ + 0.5 V) input | typ 45 ns | 7 |
| Second-order harmonic distortion HD2 | f = 100 kHz, RL = 1 kΩ, Vo = 2 VPP | typ -118 dBc | 7 |
| Second-order harmonic distortion HD2 | f = 100 kHz, RL =1 kΩ, Vo = 10 VPP | typ -108 dBc | 7 |
| Second-order harmonic distortion HD2 | f = 1 MHz, RL = 1 kΩ, Vo = 2 VPP | typ -112 dBc | 7 |
| Second-order harmonic distortion HD2 | f = 1 MHz, RL=1 kΩ, Vo = 10 VPP | typ -91 dBc | 7 |
| Third-order harmonic distortion HD3 | f = 100 kHz, RL = 1 kΩ, Vo = 2 VPP | typ -136 dBc | 7 |
| Third-order harmonic distortion HD3 | f = 100 kHz, RL =1 kΩ, Vo = 10 VPP | typ -130 dBc | 7 |
| Third-order harmonic distortion HD3 | f = 1 MHz, RL = 1 kΩ, Vo = 2 VPP | typ -104 dBc | 7 |
| Third-order harmonic distortion HD3 | f = 1 MHz, RL =1 kΩ, Vo = 10 VPP | typ -91 dBc | 7 |
| Open-loop voltage gain AOL | f = dc, Vo = ±8 V | min 108 · typ 120 dB | 7 |
| Input offset voltage VOS | DBV and DCK packages | typ 100 · max 550 uV | 7 |
| Allowable input differential voltage | see Figure 6-54; typical ±7 V | typ 7 V | 8 |
| Linear output drive (sourcing and sinking) IO(max) | Vo = 7.25 V, RL = 151 Ω, ΔVOS < 1 mV | min 48 · typ 64 mA | 8 |
| Output short-circuit current ISC | typ 108 mA | 8 | |
| Quiescent current per channel IQ | typ 3.8 · max 4.7 mA | 8 | |
| Input bias current | Auxiliary CMOS input stage; VCM = VS+ – 1.5 V | typ 2 · max 24 pA | 8 |
| Small-signal bandwidth SSBW | G = 1, Vo = 20 mVPP, RF = 0 Ω | typ 133 MHz | 9 |
| Small-signal bandwidth SSBW | G = 1, Vo = 20 mVPP, RF= 0 Ω, CL= 10 pF | typ 135 MHz | 9 |
| Small-signal bandwidth SSBW | G = –1, Vo = 20 mVPP | typ 65 MHz | 9 |
| Large-signal bandwidth LSBW | G = 2 Vo = 2 VPP | typ 36 MHz | 9 |
| Slew rate (20%-80%)(3) SR | G = 2, Vo = –1-V to 1-V step | typ 134 V/us | 9 |
| Slew rate (20%-80%)(3) SR | G = 2, Vo = –2-V to 2-V step, VS = ±2.5 V | typ 78 V/us | 9 |
| Settling time to 0.1% | G = 2, Vo = –2-V to 0-V step, VS = ±2.5 V | typ 100 ns | 9 |
| Settling time to 0.001% | G = 2, Vo = –2-V to 0-V step, VS = ±2.5 V | typ 565 ns | 9 |
| Input overdrive recovery | G = 1, (VS– – 0.5 V) to (VS+ + 0.5 V) input, VS = ±2.5 V | typ 76 ns | 9 |
| Output overdrive recovery | G = –1, (VS– – 0.5 V) to (VS+ + 0.5 V) input, VS = ±2.5 V | typ 93 ns | 9 |
| Second-order harmonic distortion HD2 | f = 100 kHz, RL = 1 kΩ, Vo = 2 VPP | typ -102 dBc | 9 |
| Second-order harmonic distortion HD2 | f = 1 MHz, RL = 1 kΩ, Vo = 2 VPP | typ -81 dBc | 9 |
| Third-order harmonic distortion HD3 | f = 100 kHz, RL = 1 kΩ, Vo = 2 VPP | typ -114 dBc | 9 |
| Third-order harmonic distortion HD3 | f = 1 MHz, RL = 1 kΩ, Vo = 2 VPP | typ -92 dBc | 9 |
| Open-loop voltage gain AOL | f = dc, Vo = 1.25 V to 3.25 V | min 104 · typ 118 dB | 9 |
| Input offset voltage VOS | DBV and DCK packages | typ 100 · max 760 uV | 9 |
| Allowable input differential voltage | See Figure 6-54; typical ±5 V | typ 5 V | 9 |
| Linear output drive (sourcing and sinking) IO(max) | VO = 1.4 V, RL = 27.5 Ω, ΔVOS < 1 mV, VS+ = 3 V and VS– = –2 V | min 50 · typ 64 mA | 10 |
| Output short-circuit current ISC | typ 96 mA | 10 | |
| Quiescent current per channel IQ | min 3.15 · typ 3.7 · max 4.5 mA | 10 |
Pins, by the datasheet
5- 1 VO
- Output pin. · p. 3
- 2 VS–
- Negative power-supply pin. · p. 3
- 3 VIN+
- Noninverting input pin. · p. 3
- 4 VIN–
- Inverting input pin. · p. 3
- 5 VS+
- Positive power-supply pin. · p. 3
Parameters
24- Common Mode Rejection Ratio(CMRR)
- 100dB
- Current - Supply
- 3.7mA
- Current - Supply(Max)
- 4.7mA
- Features
- Built-in compensation
- Gain Bandwidth Product
- 70MHz
- Ib - Input Bias Current
- 2pA
- Input Offset Current(Ios)
- 1pA
- Input Offset Voltage Drift(Vos TC)
- 2.5uV/℃
- Junction Temperature(Max)
- 150℃
- Noise density(eN)
- 6.3nV/√Hz@500kHz
- Number of Channels
- Single-channel
- Operating Temperature
- -40℃~+125℃
- Output Current
- 75mA
- Output Current per Pin(Max)
- 40mA
- Quiescent Current(Iq)
- 3.7mA
- Rail To Rail
- Rail-to-Rail Input, Rail-to-Rail Output
- Rise Time
- 4ns
- Single Supply
- 4.75V~27V
- Slew Rate
- 200V/us
- Thermal Resistance(Junction to Ambient)
- 174.3℃/W
- Thermal Resistance(Junction to Board)
- 45.4℃/W
- Thermal Resistance(Junction to Case)
- 94.7℃/W
- Voltage - Supply
- 4.75V~27V
- Vos - Input Offset Voltage
- 500uV
Order codes
2- OPA810IDBVRLCSC C2833513
- OPA810IDBVTLCSC C4154868
Pinout
5| Pin | Name | Type |
|---|---|---|
| 1 | — | Output |
| 2 | V- | Power in |
| 3 | + | Input |
| 4 | - | Input |
| 5 | V+ | Power in |
Open-source boards using it
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Is there a KiCad symbol and footprint for the OPA810IDBV?
Yes. The symbol is Amplifier_Operational:OPA810xDBV and the footprint Package_TO_SOT_SMD:SOT-23-5, both drawn on this page. PCBKit places them on a board for you when you design with it.
What package is the OPA810IDBV?
SOT-23-5, with 5 pins. Its footprint is drawn on this page.
Where is the OPA810IDBV datasheet?
Texas Instruments publishes it: the Datasheet link on this page opens it.
Where can I order the OPA810IDBV?
JLCPCB lists it as part C2833513, with 4,075 in stock; the sellers' links on this page open their listings.
What can replace the OPA810IDBV?
Parts like it in the library: the OPA810QDBVRQ1 by Texas Instruments, the OPA137N/250 by Texas Instruments, the OPA137NA/250E4 by Texas Instruments and the MC34071M5/TR-HG by HGSEMI. Check their datasheets: a part that fits the footprint may still differ in its ratings.
Which open-source boards use the OPA810IDBV?
1 board in 1 repository on GitHub; the most starred are listed on this page, with their KiCad files.
Parts like it
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