Overview
The LM76005RNP is a DC DC Converter made by Texas Instruments in a WQFN-30-EP(4x6) package with 31 pins. -40℃~+125℃@(TJ) 1 1V~57V 200kHz~500kHz 2uA 3.5V~60V 5A Adjustable Buck Buck Built-in Yes WQFN-30-EP(4x6) DC-DC Converters ROHS.
PCBKit's library has its KiCad symbol (Regulator_Switching:LM76005, from KiCad's library) and its footprint (Package_DFN_QFN:Texas_RNP0030B_WQFN-30-1EP_4x6mm_P0.5mm_EP1.8x4.5mm, from KiCad's library), ready for a KiCad board. 5,681 are in stock at JLCPCB (part C2866241).
Symbol
Footprint
From the datasheet
15- Supply, least
- 3.5 V · PVIN, recommended operating min · p. 5
- Supply, most
- 60 V · PVIN, recommended operating max · p. 5
- Supply, absolute maximum
- 65 V · PVIN to PGND, absolute max · p. 5
- Junction, hottest
- 150 °C · Junction temperature, absolute max · p. 5
- Takes asleep
- 1.2 µA · PVIN shutdown current, typical, VEN = 0 V · p. 6
- Takes working
- 15 µA · Operating quiescent current with switching, typical, no load · p. 9
- Gives
- 5 A · Continuous output current, max · p. 5
- Current limit
- 6.8 A · High-side short-circuit current limit, typical · p. 7
- Feedback reference
- 1.006 V · FB feedback voltage, PWM mode, typical · p. 6
- Dropout
- 650 mV · Input-to-output differential at 1.5 A, VOUT = 5 V, 400 kHz, typical · p. 9
- Switches at
- 400 kHz · Internal oscillator, RT open, typical · p. 8
- Junction to air (RNP (WQFN))
- 29.6 K/W · Junction-to-ambient thermal resistance · p. 6
- Junction to case (RNP (WQFN))
- 17.6 K/W · Junction-to-case top thermal resistance · p. 6
- Junction to board (RNP (WQFN))
- 9.1 K/W · Junction-to-board thermal resistance · p. 6
- Junction, hottest
- 125 °C · maximum operating junction temperature · p. 37
What it is and has
11- Converter
- 3.5-V to 60-V, 5-A synchronous step-down · p. 1
- Functional safety
- Functional Safety-Capable · p. 1
- Input transient protection
- Up to 65 V · p. 1
- Operating mode
- Pin-selectable FPWM · p. 1
- Output voltage range
- 1 V to 95% of VIN · p. 1
- Synchronization
- External clock · p. 1
- Soft start
- Adjustable, 6.3 ms default · p. 1
- Efficiency
- 95% at 400 kHz, 12 V input, 5 V output, 2 A · p. 1
- Package
- WQFN (30), 6.00 mm × 4.00 mm · p. 1
- Input transient protection
- up to 65 V · p. 1
- EMI
- Optimized for low EMI requirements · p. 1
Around it
8- cap 470-nF
- between BOOT and SW; High-quality bootstrap capacitor for high-side driver. · p. 4
- cap 2.2-µF
- between VCC and GND; High-quality capacitor for internal bias supply. · p. 4
- cap 1-µF
- between BIAS and GND; Required when BIAS input is used; ground BIAS when unused. · p. 4
- cap 10 μF to 22 μF
- between PVIN and PGND; Recommended high frequency input decoupling; X5R or X7R ceramic. Place close to the pins. · p. 24
- cap two 4.7-μF
- between PVIN and PGND; Design example: X7R dielectric, rated for 100 V. · p. 24
- cap 47 nF
- between PVIN and PGND; High frequency filtering; place as close as possible to the device pins. · p. 24
- ind 6.8-μH
- between SW and VOUT; 5-V output design example; saturation current rating over 8 A. · p. 25
- cap three 47-µF
- between VOUT and PGND; Design example: 10-V X7R ceramic capacitors in parallel. · p. 26
Specifications
89| Parameter | Conditions | As printed | Page |
|---|---|---|---|
| Input voltages | PVIN to PGND | min -0.3 · max 65 V | 5 |
| Input voltages | EN to AGND; maximum VIN + 0.3 V | min -0.3 V | 5 |
| Input voltages | FB, RT, SS/TRK to AGND | min -0.3 · max 5 V | 5 |
| Input voltages | PGOOD to AGND | min -0.1 · max 20 V | 5 |
| Input voltages | SYNC to AGND | min -0.3 · max 5.5 V | 5 |
| Input voltages | BIAS to AGND; maximum Lower of (VIN + 0.3) or 30 | min -0.3 V | 5 |
| Input voltages | AGND to PGND | min -0.3 · max 0.3 V | 5 |
| Output voltages | SW to PGND; maximum VIN + 0.3 V | min -0.3 V | 5 |
| Output voltages | SW to PGND less than 10-ns transients | min -3.5 · max 65 V | 5 |
| Output voltages | BOOT to SW | min -0.3 · max 5.5 V | 5 |
| Output voltages | VCC to AGND | min -0.3 · max 5.5 V | 5 |
| Junction temperature, TJ TJ | min -40 · max 150 °C | 5 | |
| Storage temperature, Tstg Tstg | min -65 · max 150 °C | 5 | |
| Electrostatic discharge V(ESD) | Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001; ±2000 V | min -2000 · max 2000 V | 5 |
| Electrostatic discharge V(ESD) | Charged-device model (CDM), per JEDEC specification JESD22-C101; ±500 V | min -500 · max 500 V | 5 |
| Input voltages | PVIN to PGND | min 3.5 · max 60 V | 5 |
| Input voltages | EN; maximum VIN | min 0 V | 5 |
| Input voltages | FB | min 0 · max 4.5 V | 5 |
| Input voltages | PGOOD | min 0 · max 18 V | 5 |
| Input voltages | BIAS input not used | min 0 · max 0.3 V | 5 |
| Input voltages | BIAS input used; maximum Lower of (VIN + 0.3) or 24 | min 0 V | 5 |
| Input voltages | AGND to PGND | min -0.1 · max 0.1 V | 5 |
| Switching Frequency FSW | min 200 · max 500 kHz | 5 | |
| Output voltage VOUT | Maximum 95% of VIN | min 1 V | 5 |
| Output current IOUT | min 0 · max 5 A | 5 | |
| Operating junction temperature, TJ TJ | min -40 · max 125 °C | 5 | |
| Junction-to-ambient thermal resistance RθJA | RNP (WQFN), 30 PINS | typ 29.6 °C/W | 6 |
| Junction-to-case (top) thermal resistance RθJC(top) | RNP (WQFN), 30 PINS | typ 17.6 °C/W | 6 |
| Junction-to-board thermal resistance RθJB | RNP (WQFN), 30 PINS | typ 9.1 °C/W | 6 |
| Junction-to-top characterization parameter ψJT | RNP (WQFN), 30 PINS | typ 0.2 °C/W | 6 |
| Junction-to-board characterization parameter ψJB | RNP (WQFN), 30 PINS | typ 9 °C/W | 6 |
| Junction-to-case (bottom) thermal resistance RθJC(bot) | RNP (WQFN), 30 PINS | typ 1 °C/W | 6 |
| Operating input voltage range VIN | min 3.5 · max 60 V | 6 | |
| Shutdown quiescent current; measured at PVIN pin ISD | VEN = 0 V | typ 1.2 · max 10 uA | 6 |
| Operating quiescent current from VIN (non-switching) IQ_NONSW | VEN = 2 V, VFB = 1.5 V, VBIAS = 3.3 V external | typ 2 · max 12 uA | 6 |
| Enable input high level for VCC output VEN_VCC_H | VEN rising | max 1.2 V | 6 |
| Enable input low level for VCC output VEN_VCC_L | VEN falling | min 0.3 V | 6 |
| Enable input high level for VOUT VEN_VOUT_H | VEN rising | min 1.14 · typ 1.204 · max 1.25 V | 6 |
| Enable input hysteresis for VOUT VEN_VOUT_HYS | VEN falling hysteresis | typ -150 mV | 6 |
| Enable input leakage current ILKG_EN | VEN = 2 V | typ 1.4 · max 200 nA | 6 |
| Internal VCC voltage VCC | PWM operation | typ 3.29 V | 6 |
| Internal VCC voltage VCC | PFM operation | typ 3.1 V | 6 |
| Internal VCC undervoltage lockout VCC_UVLO | VCC rising | min 2.96 · typ 3.14 · max 3.27 V | 6 |
| Internal VCC undervoltage lockout VCC_UVLO | VCC falling hysteresis | typ -565 mV | 6 |
| Input change over VBIAS_ON | VBIAS rising | typ 3.11 · max 3.25 V | 6 |
| Input change over VBIAS_ON | VBIAS falling hysteresis | typ -63 mV | 6 |
| Operating quiescent current from external VBIAS (non-switching) IBIAS_NONSW | VEN = 2 V, VFB = 1.5 V, VBIAS = 3.3 V external | typ 21 · max 50 uA | 6 |
| Feedback voltage VFB | PWM mode | min 0.987 · typ 1.006 · max 1.017 V | 6 |
| Input leakage current at FB pin ILKG_FB | VFB = 1 V | typ 0.2 · max 60 nA | 6 |
| BOOT - SW undervoltage lockout VBOOT_UVLO | min 1.6 · typ 2.2 · max 2.7 V | 7 | |
| Short-circuit, high-side current limit IHS_LIMIT | Internal comparator trip point | min 6 · typ 6.8 · max 7.8 A | 7 |
| Low-side current limit ILS_LIMIT | Internal comparator trip point | min 4.5 · typ 5.1 · max 5.8 A | 7 |
| Negative current limit INEG_LIMIT | typ -4.1 A | 7 | |
| Hiccup threshold on FB pin VHICCUP | min 0.38 · typ 0.42 · max 0.46 V | 7 | |
| Zero cross-current limit IL_ZC | typ 0.05 A | 7 | |
| Soft-start charge current ISSC | min 1.8 · typ 2 · max 2.2 uA | 7 | |
| Soft-start discharge resistance RSSD | UVLO, TSD, OCP; or EN = 0 V | typ 2 kΩ | 7 |
| Power-good overvoltage threshold VPGOOD_OV | % of FB voltage | min 106 · typ 110 · max 113 % | 7 |
| Power-good undervoltage threshold VPGOOD_UV | % of FB voltage | min 86 · typ 90 · max 93 % | 7 |
| Power-good hysteresis VPGOOD_HYS | % of FB voltage | typ 2.5 % | 7 |
| Minimum input voltage for proper PGOOD function VPGOOD_VALID | 50-uA pullup to PGOOD pin, VEN = 0 V | typ 1.3 · max 2 V | 7 |
| Power-good on-resistance RPGOOD | VEN = 2.5 V | typ 40 · max 100 Ω | 7 |
| Power-good on-resistance RPGOOD | VEN = 0 V | typ 30 · max 90 Ω | 7 |
| High-side MOSFET on-resistance RDS_ON_HS | IOUT = 1 A, VBIAS = VOUT = 3.3 V; measured at pins | typ 95 · max 150 mΩ | 7 |
| Low-side MOSFET on-resistance RDS_ON_LS | IOUT = 1 A, VBIAS = VOUT = 3.3 V; measured at pins | typ 45 · max 85 mΩ | 7 |
| Thermal shutdown threshold TSD | Shutdown threshold | typ 150 °C | 7 |
| Recovery threshold TSD | typ 135 °C | 7 | |
| Number of switching cycles before hiccup is tripped NOC | Ensured by design | typ 128 Cycles | 8 |
| Overcurrent hiccup retry delay time tOC | typ 46 ms | 8 | |
| Internal soft-start time tSS | CSS = OPEN, from EN rising edge to PGOOD rising edge | min 3.5 · typ 6.3 ms | 8 |
| PGOOD rising edge deglitch delay tPGOOD_RISE | min 80 · typ 140 · max 200 us | 8 | |
| PGOOD falling edge deglitch delay tPGOOD_FALL | min 80 · typ 140 · max 200 us | 8 | |
| Minimum switch on-time tON-MIN | typ 65 · max 95 ns | 8 | |
| Minimum switch off-time tOFF-MIN | typ 95 · max 130 ns | 8 | |
| Maximum switch on-time tON-MAX | HS timeout in dropout | min 3.8 · typ 8 · max 11.4 us | 8 |
| Adjustable frequency by RT or SYNC fADJ | RT =133 kΩ, 0.1% | min 270 · typ 300 · max 330 kHz | 8 |
| Internal oscillator frequency fOSC | RT = Open | min 350 · typ 400 · max 450 kHz | 8 |
| Sync input high level threshold VSYNC_HIGH | max 2 V | 8 | |
| Sync input low level threshold VSYNC_LOW | min 0.4 V | 8 | |
| Mode input high level threshold for FPWM VMODE_HIGH | typ 0.42 V | 8 | |
| Mode input low level threshold for AUTO mode VMODE_LOW | typ 0.4 V | 8 | |
| Sync input minimum on- and off-time tSYNC_MIN | typ 80 ns | 8 | |
| Output voltage offset at no load in auto mode VFB_PFM | VIN = 3.8 V to 36 V, VSYNC = 0 V, auto mode; IOUT = 0 A | typ 2 % | 9 |
| Minimum input to output voltage differential to maintain specified accuracy Vdrop | VOUT = 5 V, IOUT = 1.5 A, fSW = 400 kHz | typ 0.65 V | 9 |
| Operating quiescent current (switching) IQ_SW | VEN = 3.3 V, IOUT = 0 A, RT = open, VBIAS = VOUT = 3.3 V, RFBT = 1 Meg | typ 15 uA | 9 |
| Minimum inductor peak current IPEAK_MIN | VSYNC = 0 V, IOUT = 10 mA | typ 1 A | 9 |
| Operating quiescent current from external VBIAS (switching) IBIAS_SW | fSW = 400 kHz, IOUT = 1 A | typ 7 mA | 9 |
| Maximum switch duty cycle DMAX | While in frequency foldback | min 97.5 % | 9 |
| Dead time between high-side and low-side MOSFETs tDEAD | typ 4 ns | 9 |
Pins, by the datasheet
31- 1 SW
- Switching output; connect to power inductor and bootstrap capacitor. · p. 4
- 2 SW
- Switching output; connect to power inductor and bootstrap capacitor. · p. 4
- 3 SW
- Switching output; connect to power inductor and bootstrap capacitor. · p. 4
- 4 SW
- Switching output; connect to power inductor and bootstrap capacitor. · p. 4
- 5 SW
- Switching output; connect to power inductor and bootstrap capacitor. · p. 4
- 6 BOOT
- High-side driver bootstrap connection; connect a high-quality 470-nF capacitor to SW. · p. 4
- 7 NC
- Not internally connected; leave floating to maximize high-voltage clearance. · p. 4
- 8 VCC
- Internal bias supply output; connect a high-quality 2.2-uF capacitor to GND; external loading is not recommended. · p. 4
- 9 BIAS
- Optional LDO supply input; tie to VOUT when 3.3 V ≤ VOUT ≤ 18 V or an external 3.3-V or 5-V rail, with 1-uF bypass; ground when unused. · p. 4
- 10 RT
- Resistor to ground sets switching frequency; floating selects 400 kHz; do not short to ground. · p. 4
- 11 SS/TRK
- Float for internal 6.3-ms soft start, add capacitor to ground to extend it, or connect an external tracking ramp; do not short to ground. · p. 4
- 12 FB
- Feedback input; connect a resistor divider to set output voltage; never short to ground during operation. · p. 4
- 13 AGND
- Analog ground reference; connect to system ground. · p. 4
- 14 AGND
- Analog ground reference; connect to system ground. · p. 4
- 15 AGND
- Analog ground reference; connect to system ground. · p. 4
- 16 PGOOD
- Power-good flag; pull up to a suitable supply through a current-limiting resistor; low indicates regulation fault or EN low. · p. 4
- 17 SYNC/MODE
- Ground selects light-load DCM/PFM, logic high selects forced PWM, and an external rising-edge clock synchronizes switching with forced PWM; do not float. · p. 4
- 18 EN
- Precision enable; high enables and low disables; may tie to VIN or use a resistor divider for adjustable UVLO; do not float. · p. 4
- 19 NC
- Not internally connected; connect to ground copper for heat sinking and reliability. · p. 4
- 20 PVIN
- Supply to internal bias LDO and high-side FET; place input bypass capacitors immediately beside PVIN and PGND with short traces. · p. 4
- 21 PVIN
- Supply to internal bias LDO and high-side FET; place input bypass capacitors immediately beside PVIN and PGND with short traces. · p. 4
- 22 PVIN
- Supply to internal bias LDO and high-side FET; place input bypass capacitors immediately beside PVIN and PGND with short traces. · p. 4
- 23 NC
- Not internally connected; leave floating to maximize high-voltage clearance. · p. 4
- 24 PGND
- Low-side FET power ground; connect to system ground, DAP/EP, AGND, and capacitor grounds; minimize path to CIN. · p. 4
- 25 PGND
- Low-side FET power ground; connect to system ground, DAP/EP, AGND, and capacitor grounds; minimize path to CIN. · p. 4
- 26 PGND
- Low-side FET power ground; connect to system ground, DAP/EP, AGND, and capacitor grounds; minimize path to CIN. · p. 4
- 27 NC
- Not internally connected; connect to ground copper for heat sinking and reliability. · p. 4
- 28 NC
- Not internally connected; connect to ground copper for heat sinking and reliability. · p. 4
- 29 NC
- Not internally connected; connect to ground copper for heat sinking and reliability. · p. 4
- 30 NC
- Not internally connected; connect to ground copper for heat sinking and reliability. · p. 4
- EP DAP
- Low-impedance AGND connection and major heat dissipation path; solder to system ground copper; thermal vias preferred. · p. 4
Ordering codes, by the datasheet
4- LM76005RNPR
- WQFN (RNP), 30 pins · 3000-piece LARGE T&R; lead finish NIPDAU | SN · p. 40
- LM76005RNPR.B
- WQFN (RNP), 30 pins · 3000-piece LARGE T&R; lead finish NIPDAU · p. 40
- LM76005RNPRG4
- WQFN (RNP), 30 pins · 3000-piece LARGE T&R; lead finish NIPDAU · p. 40
- LM76005RNPRG4.B
- WQFN (RNP), 30 pins · 3000-piece LARGE T&R; lead finish NIPDAU · p. 40
Parameters
22- Current Limit
- 6.8A
- Features
- Hiccup current limiting
- Frequency - Switching
- 400kHz
- Function
- Step-down type
- Junction Temperature(Max)
- 150℃
- Number of Outputs
- 1
- Operating Temperature
- -40℃~+125℃@(TJ)
- Output Current
- 5A
- Output Type
- Adjustable
- Output Voltage
- 1V~57V
- Quiescent Current
- 15uA
- Reference Voltage
- 1.006V
- Standby Current
- 1.2uA
- Switch tube (built-in/external)
- Built-in
- Synchronous Rectifier
- Yes
- Thermal Resistance(Junction to Ambient)
- 29.6℃/W
- Thermal Resistance(Junction to Board)
- 9.1℃/W
- Thermal Resistance(Junction to Case)
- 17.6℃/W
- Topology
- Buck
- Voltage - Supply
- 3.5V~60V
- Voltage - Supply(Absolute Max)
- 65V
- Voltage Dropout
- 650mV
Order codes
1- LM76005RNPRLCSC C2866241
Pinout
31| Pin | Name | Type |
|---|---|---|
| 1 | SW | Power out |
| 2 | SW | Passive |
| 3 | SW | Passive |
| 4 | SW | Passive |
| 5 | SW | Passive |
| 6 | BOOT | Input |
| 7 | NC | Not connected |
| 8 | VCC | Power out |
| 9 | BIAS | Power in |
| 10 | RT | Input |
| 11 | SS/TRK | Input |
| 12 | FB | Input |
| 13 | AGND | Power in |
| 14 | AGND | Passive |
| 15 | AGND | Passive |
| 16 | PGOOD | Open collector |
| 17 | SYNC/MODE | Input |
| 18 | EN | Input |
| 19 | NC_{GND} | Passive |
| 20 | PVIN | Power in |
| 21 | PVIN | Passive |
| 22 | PVIN | Passive |
| 23 | NC | Not connected |
| 24 | PGND | Power in |
| 25 | PGND | Passive |
| 26 | PGND | Passive |
| 27 | NC_{GND} | Passive |
| 28 | NC_{GND} | Passive |
| 29 | NC_{GND} | Passive |
| 30 | NC_{GND} | Passive |
| 31 | AGND | Passive |
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Is there a KiCad symbol and footprint for the LM76005RNP?
Yes. The symbol is Regulator_Switching:LM76005 and the footprint Package_DFN_QFN:Texas_RNP0030B_WQFN-30-1EP_4x6mm_P0.5mm_EP1.8x4.5mm, both drawn on this page. PCBKit places them on a board for you when you design with it.
What package is the LM76005RNP?
WQFN-30-EP(4x6), with 31 pins. Its footprint is drawn on this page.
Where is the LM76005RNP datasheet?
Texas Instruments publishes it: the Datasheet link on this page opens it.
Where can I order the LM76005RNP?
JLCPCB lists it as part C2866241, with 5,681 in stock; the sellers' links on this page open their listings.
What can replace the LM76005RNP?
Parts like it in the library: the LM76005QRNPRQ1 by Texas Instruments. Check their datasheets: a part that fits the footprint may still differ in its ratings.
