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LM5155DSS

Texas InstrumentsExtended

-40℃~+125℃@(TJ) 1 1.5A 2.2MHz 3.5V~45V Boost Boost、SEPIC、Flyback External No WSON-12-EP(2x3) DC-DC Converters ROHS

Part id
ti/LM5155DSS
Category
DC DC Controllers
Package
WSON-12-EP(2x3)
Pins
13
In stock
5,687 at JLCPCB (C545416)
Used on
3 open-source boards

Overview

The LM5155DSS is a DC DC Controller made by Texas Instruments in a WSON-12-EP(2x3) package with 13 pins. -40℃~+125℃@(TJ) 1 1.5A 2.2MHz 3.5V~45V Boost Boost、SEPIC、Flyback External No WSON-12-EP(2x3) DC-DC Converters ROHS.

PCBKit's library has its KiCad symbol (EasyEDA_Cloud:LM51551DSSR, from EasyEDA) and its footprint (EasyEDA_Cloud:WSON-12_L3.0-W2.0-P0.5-BL-EP2.7, from EasyEDA), ready for a KiCad board. 5,687 are in stock at JLCPCB (part C545416). 3 open-source boards in 2 repositories on GitHub use it.

Symbol

EP13UVLO/SYNC12PGOOD11RT10SS9FB8AGND7COMP6CS5PGND4GATE3VCC2BIAS1
EasyEDA_Cloud:LM51551DSSRFrom EasyEDA

Footprint

13
EasyEDA_Cloud:WSON-12_L3.0-W2.0-P0.5-BL-EP2.7From EasyEDA

From the datasheet

16
Supply, least
3.5 V · BIAS, recommended operating min, internal VCC regulator · p. 14
Supply, most
45 V · BIAS, recommended operating max, internal VCC regulator · p. 14
Supply, least
2.97 V · BIAS, recommended operating min, BIAS connected to VCC · p. 14
Supply, most
16 V · BIAS, recommended operating max, BIAS connected to VCC · p. 14
Supply, absolute maximum
50 V · BIAS, absolute max to AGND · p. 5
Junction, hottest
150 °C · Junction temperature, absolute max · p. 5
Takes working
480 µA · BIAS operating current typical, 12 V, VUVLO = 2 V, VFB = VREF, RT = 220 kΩ · p. 6
Takes at most
540 µA · BIAS operating current max, 12 V, VUVLO = 2 V, VFB = VREF, RT = 220 kΩ · p. 6
Takes asleep
2.6 µA · BIAS shutdown current typical, VBIAS = 12 V, VUVLO = 0 V · p. 6
Feedback reference
1 V · FB reference typical · p. 7
Switches at
100 kHz · Switching frequency typical, RT = 220 kΩ · p. 7
Switches at
2.2 MHz · Switching frequency typical, RT = 9.09 kΩ · p. 7
Junction to air (DSS(WSON))
40.8 K/W · Junction-to-ambient, LM5155EVM-BST · p. 6
Junction to air (DSS(WSON))
63.7 K/W · Junction-to-ambient thermal resistance · p. 6
Junction to case (DSS(WSON))
61 K/W · Junction-to-case top thermal resistance · p. 6
Junction to board (DSS(WSON))
32.1 K/W · Junction-to-board thermal resistance · p. 6

What it is and has

6
Control
Peak-current-mode control; boost, SEPIC, and flyback topologies · p. 11
Package
12-pin WSON, 3 mm × 2 mm · p. 1
Hiccup mode protection
Disabled · p. 3
Protection
Cycle-by-cycle current limit, overvoltage protection, line UVLO, thermal shutdown · p. 11
Additional functions
Low shutdown IQ, programmable soft start, programmable slope compensation · p. 3
Monitoring and synchronization
Precision reference, power-good indicator, external clock synchronization · p. 3

Around it

1
cap 1 µF to 4.7 µF
between VCC and PGND; Ceramic bypass capacitor for the internal VCC regulator and MOSFET driver supply. · p. 14

Specifications

71
ParameterConditionsAs printedPage
BIAS to AGNDmin -0.3 · max 50 V5
UVLO to AGNDMaximum VBIAS+0.3 Vmin -0.3 V5
SS to AGNDThis pin is not specified to have an external voltage applied.min -0.3 · max 3.8 V5
RT to AGNDThis pin is not specified to have an external voltage applied.min -0.3 · max 3.8 V5
FB to AGNDmin -0.3 · max 3.8 V5
CS to AGND(DC)DCmin -0.3 · max 0.3 V5
CS to AGND(100ns transient)100ns transientmin -1 V5
CS to AGND(20ns transient)20ns transientmin -2 V5
PGND to AGNDmin -0.3 · max 0.3 V5
VCC to AGNDMaximum is 18 V or VBIAS + 0.3 V, whichever is lower.min -0.3 · max 18 V5
GATE to AGND (100ns transient)100ns transientmin -1 V5
GATE to AGND (50ns transient)50ns transientmin -2 V5
PGOOD to AGNDMaximum sink current limited to 1 mA when VPGOOD>VBIAS.min -0.3 · max 18 V5
COMP to AGNDInternal maximum voltage clamp can handle up to 1.6 mA.min -0.3 V5
Junction temperature TJmin -40 · max 150 °C5
Storage temperature Tstgmin -55 · max 150 °C5
Electrostatic discharge V(ESD)Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins; ±2000 Vmax 2000 V5
Electrostatic discharge V(ESD)Charged device model (CDM), per JEDEC specification JESD22-C101, all pins; ±500 Vmax 500 V5
Bias input VBIAS2.97–16 V with VCC directly connected to BIAS; 3.5–45 V with internal VCC regulator.min 2.97 · max 45 V6
VCC voltage VVCCLess than VBIAS + 0.3 Vmin 2.97 · max 16 V6
UVLO input VUVLOmin 0 · max 45 V6
FB input VFBmin 0 · max 3.7 V6
Typical switching frequency fSWmin 100 · max 2200 kHz6
Synchronization pulse frequency fSYNCmin 100 · max 2200 kHz6
Operating junction temperature TJmin -40 · max 125 °C6
Junction-to-ambient thermal resistance (LM5155EVM-BST) RθJADSS(WSON), 12 pinstyp 40.8 °C/W6
Junction-to-ambient thermal resistance RθJADSS(WSON), 12 pinstyp 63.7 °C/W6
Junction-to-case (top) thermal resistance RθJC(top)DSS(WSON), 12 pinstyp 61 °C/W6
Junction-to-board thermal resistance RθJBDSS(WSON), 12 pinstyp 32.1 °C/W6
Junction-to-top characterization parameter (LM5155EVM-BST) ψJTDSS(WSON), 12 pinstyp 1.5 °C/W6
Junction-to-top characterization parameter ψJTDSS(WSON), 12 pinstyp 2.3 °C/W6
Junction-to-board characterization parameter (LM5155EVM-BST) ψJBDSS(WSON), 12 pinstyp 22.5 °C/W6
Junction-to-board characterization parameter ψJBDSS(WSON), 12 pinstyp 31.9 °C/W6
Junction-to-case (bottom) thermal resistance RθJC(bot)DSS(WSON), 12 pinstyp 11.2 °C/W6
BIAS shutdown current ISHUTDOWN(BIAS)VBIAS = 12 V, VUVLO = 0 Vtyp 2.6 · max 5 uA6
BIAS operating current IOPERATING(BIAS)VBIAS = 12 V, VUVLO = 2 V, VFB = VREF, RT = 220 kΩtyp 480 · max 540 uA6
VCC regulation VVCC-REGVBIAS = 8 V, No loadmin 6.5 · typ 6.85 · max 7 V6
VCC regulationVBIAS = 8 V, IVCC = 35 mAmin 6.5 V6
VCC UVLO threshold VVCC-UVLO(RISING)VCC risingmin 2.75 · typ 2.85 · max 2.95 V6
VCC UVLO hysteresisVCC fallingtyp 0.063 V6
VCC sourcing current limit IVCC-CLVBIAS = 10 V, VVCC = 0 Vmin 35 · typ 105 mA6
Enable threshold VEN(RISING)EN risingmin 0.4 · typ 0.52 · max 0.7 V6
Enable threshold VEN(FALLING)EN fallingmin 0.33 · typ 0.49 · max 0.63 V6
Enable hysteresis VEN(HYS)EN fallingtyp 0.03 V7
UVLO / SYNC threshold VUVLO(RISING)UVLO risingmin 1.425 · typ 1.5 · max 1.575 V7
UVLO / SYNC threshold VUVLO(FALLING)UVLO fallingmin 1.37 · typ 1.45 · max 1.52 V7
UVLO / SYNC threshold hysteresis VUVLO(HYS)UVLO fallingtyp 0.05 V7
UVLO hysteresis current IUVLOVUVLO = 1.6 Vmin 4 · typ 5 · max 6 uA7
Soft-start current ISSmin 9 · typ 10 · max 11 uA7
SS pull-down switch RDSONtyp 55 Ω7
Switching frequency fsw1RT = 220 kΩmin 85 · typ 100 · max 115 kHz7
Switching frequency fsw2RT = 9.09 kΩmin 1980 · typ 2200 · max 2420 kHz7
Minimum on-time tON(MIN)RT = 9.09 kΩtyp 50 ns7
Maximum duty cycle limit DMAX1RT = 9.09 kΩmin 80 · typ 85 · max 90 %7
Maximum duty cycle limit DMAX2RT = 220 kΩmin 90 · typ 93 · max 96 %7
Peak slope compensation current ISLOPERT = 220 kΩmin 22.5 · typ 30 · max 37.5 uA7
Current Limit threshold (CS-PGND) VCLTHmin 93 · typ 100 · max 107 mV7
FB reference VREFLM5155min 0.99 · typ 1 · max 1.01 V7
Transconductance Gmtyp 2 mA/V7
COMP sourcing currentVCOMP = 1.2 Vmin 180 uA7
COMP clamp voltageCOMP rising (VUVLO = 2.0V)min 2.5 · typ 2.8 V7
COMP clamp voltageCOMP fallingtyp 1 · max 1.1 V7
Over-voltage threshold VOVTHFB rising (referece to VREF)min 107 · typ 110 · max 113 %7
Over-voltage thresholdFB falling (referece to VREF)typ 105 %7
PGOOD pull-down switch RDSON1 mA sinkingtyp 90 Ω7
Undervoltage threshold VUVTHFB falling (referece to VREF)min 87 · typ 90 · max 93 %7
Undervoltage thresholdFB rising (referece to VREF)typ 95 %7
High-state voltage drop100 mA sinkingtyp 0.25 V7
Low-state voltage drop100 mA sourcingtyp 0.15 V7
Thermal shutdown threshold TTSDTemperature risingtyp 175 °C7
Thermal shutdown hysteresistyp 15 °C7

Pins, by the datasheet

12
1 BIAS
Supply input to the VCC regulator; connect a bypass capacitor to PGND. · p. 4
2 VCC
Internal VCC regulator output and MOSFET driver supply input; connect a ceramic bypass capacitor to PGND. · p. 4
3 GATE
N-channel MOSFET gate drive output; connect to the gate through a short, low inductance path. · p. 4
4 PGND
Power ground; connect directly to the sense resistor ground through a wide, short, low inductance path. · p. 4
5 CS
Current sense input; connect to the positive side of the sense resistor through a short path. · p. 4
6 COMP
Transconductance error amplifier output; connect loop compensation components between COMP and PGND. · p. 4
7 AGND
Analog ground; connect to the analog ground plane through a wide, short path. · p. 4
8 FB
Inverting error amplifier input; connect an output voltage divider for boost/SEPIC and return its low-side resistor to AGND. · p. 4
9 SS
Soft-start programming input; connect a capacitor to AGND to set the reference ramp rate. · p. 4
10 RT
Switching frequency setting input; connect a resistor between RT and AGND. · p. 4
11 PGOOD
Power-good output goes low when FB is below the undervoltage threshold; connect a pullup resistor to the system voltage rail. · p. 4
— EP
Exposed pad must connect to AGND and a large ground copper plane to decrease thermal resistance. · p. 4

Open-source boards using it

3
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Parts like it

3

Questions

Is there a KiCad symbol and footprint for the LM5155DSS?

Yes. The symbol is EasyEDA_Cloud:LM51551DSSR and the footprint EasyEDA_Cloud:WSON-12_L3.0-W2.0-P0.5-BL-EP2.7, both drawn on this page. PCBKit places them on a board for you when you design with it.

What package is the LM5155DSS?

WSON-12-EP(2x3), with 13 pins. Its footprint is drawn on this page.

Where is the LM5155DSS datasheet?

Texas Instruments publishes it: the Datasheet link on this page opens it.

Where can I order the LM5155DSS?

JLCPCB lists it as part C545416, with 5,687 in stock; the sellers' links on this page open their listings.

What can replace the LM5155DSS?

Parts like it in the library: the LM5155QDSSRQ1 by Texas Instruments, the LM51551DSST by Texas Instruments and the LM5155QDSSTQ1 by Texas Instruments. Check their datasheets: a part that fits the footprint may still differ in its ratings.

Which open-source boards use the LM5155DSS?

3 boards in 2 repositories on GitHub; the most starred are listed on this page, with their KiCad files.