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LM5106MMX, in 3D

LM5106MMX

Texas Instruments

-40℃~+125℃ 1.2A 1.8A 1.8V~2.2V 10ns 15ns 2 32ns 340uA 8V~14V Half-Bridge MOSFET Under Voltage Protection VSSOP-10-0.5mm Gate Drivers ROHS

Extended
Category
Gate Drivers
Package
VSSOP-10-0.5mm
Pins
10

Overview

The LM5106MMX is a gate Driver made by Texas Instruments in a VSSOP-10-0.5mm package with 10 pins. -40℃~+125℃ 1.2A 1.8A 1.8V~2.2V 10ns 15ns 2 32ns 340uA 8V~14V Half-Bridge MOSFET Under Voltage Protection VSSOP-10-0.5mm Gate Drivers ROHS.

PCBKit's library has its KiCad symbol (EasyEDA_Cloud:LM5106MMX_NOPB, from EasyEDA) and its footprint (EasyEDA_Cloud:VSSOP-10_L3.0-W3.0-P0.50-LS4.9-BL, from EasyEDA), ready for a KiCad board. 6,000 are in stock at JLCPCB (part C91879).

Symbol

VSS9VDD1HO3RDT6NC5LO10EN7HB2IN8HS4
EasyEDA_Cloud:LM5106MMX_NOPBFrom EasyEDA

Footprint

EasyEDA_Cloud:VSSOP-10_L3.0-W3.0-P0.50-LS4.9-BLFrom EasyEDA

From the datasheet

11
Supply, least
8 V · VDD, recommended operating min · p. 4
Supply, most
14 V · VDD, recommended operating max · p. 4
Supply, absolute maximum
18 V · VDD to VSS, absolute max · p. 4
Junction, hottest
150 °C · Junction temperature, absolute max · p. 4
Takes working
3.6 mA · sum of VDD and HB operating currents, typical at 500 kHz, no output load · p. 5
Takes at most
6.5 mA · sum of VDD and HB operating currents, max at 500 kHz, no output load · p. 5
Takes asleep
400 µA · sum of VDD and HB quiescent currents, typical with IN = EN = 0 V · p. 5
Junction to air (DGS)
165.3 K/W · Junction-to-ambient thermal resistance · p. 5
Junction to case (DGS)
58.9 K/W · Junction-to-case top thermal resistance · p. 5
Junction to board (DGS)
54.4 K/W · Junction-to-board thermal resistance · p. 5
Edge
10 ns · Either output fall time, typical at CL = 1000pF · p. 6

What it is and has

7
Peak output sink current
1.8 A · p. 1
Peak output source current
1.2 A · p. 1
Bootstrap supply voltage
Up to 118-V DC · p. 1
Control input
Single TTL compatible input · p. 1
Dead-time
Programmable turnon delays · p. 1
Enable input
Enable input pin · p. 1
Protection
Supply rail undervoltage lockout · p. 1

Around it

3
cap not specified
between VDD and VSS; Low ESR/ESL; place as close to the IC as possible. · p. 3
cap not specified
between HB and HS; Bootstrap capacitor, positive terminal to HB, negative terminal to HS; place as close to the IC as possible. · p. 3
res not specified
between RDT and VSS; Programs turnon delay of both MOSFETs; place close to the IC to minimize noise coupling. · p. 3

Specifications

55
ParameterConditionsAs printedPage
VDD to VSSmin -0.3 · max 18 V4
HB to HSmin -0.3 · max 18 V4
IN and EN to VSSmin -0.3 V4
LO to VSSmin -0.3 V4
HS to VSSSee footnote (3) concerning negative transients.max 100 V4
HB to VSSmax 118 V4
RDT to VSSmin -0.3 · max 5 V4
Junction Temperaturemax 150 °C4
Storage temperature range, Tstg Tstgmin -55 · max 150 °C4
Electrostatic discharge V(ESD)Human body model (HBM), per ANSI/ESDA/JEDEC JS-001 (1)max 1500 V4
VDD VDDmin 8 · max 14 V4
HS HSSee footnote (1) concerning negative transients.min -1 · max 100 V4
HS Slew RateStrict upper bound (< 50).max 50 V/ns4
Junction Temperaturemin -40 · max 125 °C4
Junction-to-ambient thermal resistance RθJADGS, 10 PINS; table header reads LM5102.typ 165.3 °C/W5
Junction-to-case (top) thermal resistance RθJC(top)DGS, 10 PINS; table header reads LM5102.typ 58.9 °C/W5
Junction-to-board thermal resistance RθJBDGS, 10 PINS; table header reads LM5102.typ 54.4 °C/W5
Junction-to-top characterization parameter ψJTDGS, 10 PINS; table header reads LM5102.typ 6.2 °C/W5
Junction-to-board characterization parameter ψJBDGS, 10 PINS; table header reads LM5102.typ 83.6 °C/W5
VDD Quiescent Current IDDIN = EN = 0 V; TJ = +25°C, VDD = HB = 12 V, VSS = HS = 0 V, no load on LO or HO, RDT = 100kΩ.typ 0.34 · max 0.6 mA5
VDD Operating Current IDDOf = 500 kHz; TJ = +25°C, VDD = HB = 12 V, VSS = HS = 0 V, EN = 5 V, no load on LO or HO, RDT = 100kΩ.typ 2.1 · max 3.5 mA5
Total HB Quiescent Current IHBIN = EN = 0 V; TJ = +25°C, VDD = HB = 12 V, VSS = HS = 0 V, no load on LO or HO, RDT = 100kΩ.typ 0.06 · max 0.2 mA5
Total HB Operating Current IHBOf = 500 kHz; TJ = +25°C, VDD = HB = 12 V, VSS = HS = 0 V, EN = 5 V, no load on LO or HO, RDT = 100kΩ.typ 1.5 · max 3 mA5
HB to VSS Current, Quiescent IHBSHS = HB = 100 V; other conditions per table header.typ 0.1 · max 10 uA5
HB to VSS Current, Operating IHBSOf = 500 kHz; other conditions per table header.typ 0.5 mA5
Low Level Input Voltage Threshold VILINPUT IN and EN; conditions per table header.min 0.8 · typ 1.8 V5
High Level Input Voltage Threshold VIHINPUT IN and EN; conditions per table header.typ 1.8 · max 2.2 V5
Input Pulldown Resistance Pin IN and EN RpdConditions per table header.min 100 · typ 200 · max 500 kΩ5
Nominal Voltage at RDT VRDTConditions per table header.min 2.7 · typ 3 · max 3.3 V5
RDT Pin Current Limit IRDTRDT = 0 V; other conditions per table header.min 0.75 · typ 1.5 · max 2.25 mA5
VDD Rising Threshold VDDRConditions per table header.min 6.2 · typ 6.9 · max 7.6 V5
VDD Threshold Hysteresis VDDHConditions per table header.typ 0.5 V5
HB Rising Threshold VHBRConditions per table header.min 5.9 · typ 6.6 · max 7.3 V5
HB Threshold Hysteresis VHBHConditions per table header.typ 0.4 V5
Low-Level Output Voltage VOLLLO GATE DRIVER; ILO = 100 mA; other conditions per table header.typ 0.21 · max 0.4 V5
High-Level Output Voltage VOHLLO GATE DRIVER; ILO = –100 mA, VOHL = VDD – VLO; other conditions per table header.typ 0.5 · max 0.85 V5
Peak Pullup Current IOHLLO = 0 V; other conditions per table header.typ 1.2 A5
Peak Pulldown Current IOLLLO = 12 V; other conditions per table header.typ 1.8 A5
Low-Level Output Voltage VOLHHO GATE DRIVER; IHO = 100 mA; other conditions per table header.typ 0.21 · max 0.4 V5
High-Level Output Voltage VOHHHO GATE DRIVER; IHO = –100 mA, VOHH = HB – HO; other conditions per table header.typ 0.5 · max 0.85 V5
Peak Pullup Current IOHHHO = 0 V; TJ = +25°C, VDD = HB = 12 V, VSS = HS = 0 V, EN = 5 V, no load on LO or HO, RDT = 100kΩ.typ 1.2 A6
Peak Pulldown Current IOLHHO = 12 V; other conditions per table header.typ 1.8 A6
Junction to Ambient θJASee (2) (3): four-layer board; package unspecified in this row.typ 40 °C/W6
Lower Turn-Off Propagation Delay tLPHLTJ = +25°C, VDD = HB = 12 V, VSS = HS = 0 V, no load on LO or HO.typ 32 · max 56 ns6
Upper Turn-Off Propagation Delay tHPHLConditions per table header.typ 32 · max 56 ns6
Lower Turn-On Propagation Delay tLPLHRDT = 100k; other conditions per table header.min 400 · typ 520 · max 640 ns6
Upper Turn-On Propagation Delay tHPLHRDT = 100k; other conditions per table header.min 450 · typ 570 · max 690 ns6
Lower Turn-On Propagation Delay tLPLHRDT = 10k; other conditions per table header.min 85 · typ 115 · max 160 ns6
Upper Turn-On Propagation Delay tHPLHRDT = 10k; other conditions per table header.min 85 · typ 115 · max 160 ns6
Enable and Shutdown propagation delay ten, tsdConditions per table header.typ 36 ns6
Dead-time LO OFF to HO ON & HO OFF to LO ON DT1, DT2RDT = 100k; other conditions per table header.typ 510 ns6
Dead-time LO OFF to HO ON & HO OFF to LO ON DT1, DT2RDT = 10k; other conditions per table header.typ 86 ns6
Dead-time matching MDTRDT = 100k; other conditions per table header.typ 50 ns6
Either Output Rise Time tRCL = 1000pF; other conditions per table header.typ 15 ns6
Either Output Fall Time tFCL = 1000pF; other conditions per table header.typ 10 ns6

Pins, by the datasheet

10
1 VDD
Positive gate drive supply; decouple to VSS with a low ESR/ESL capacitor close to the IC. · p. 3
2 HB
High-side gate driver bootstrap rail; connect the bootstrap capacitor positive terminal here and negative terminal to HS, close to the IC. · p. 3
3 HO
High-side gate driver output; connect to the high-side N-MOS gate through a short, low inductance path. · p. 3
4 HS
High-side MOSFET source connection; connect to the bootstrap capacitor negative terminal and the high-side N-MOS source. · p. 3
5 NC
Not connected. · p. 3
6 RDT
Dead-time programming pin; a resistor to VSS programs both MOSFET turnon delays and should be close to the IC. · p. 3
7 EN
TTL compatible driver enable input with hysteresis; low holds LO and HO low. · p. 3
8 IN
TTL compatible gate driver input with hysteresis; high turns on the high-side MOSFET and turns off the low-side MOSFET. · p. 3
9 VSS
Ground return; all signals are referenced to this ground. · p. 3
10 LO
Low-side gate driver output; connect to the low-side N-MOS gate through a short, low inductance path. · p. 3

Ordering codes, by the datasheet

12
LM5106MM/NOPB
VSSOP (DGS), 10 pins · 1000, SMALL T&R; -40 to 125 °C; SN lead finish. · p. 18
LM5106MM/NOPB.A
VSSOP (DGS), 10 pins · 1000, SMALL T&R; -40 to 125 °C; SN lead finish. · p. 18
LM5106MM/NOPB.B
VSSOP (DGS), 10 pins · 1000, SMALL T&R; -40 to 125 °C; SN lead finish. · p. 18
LM5106MMX/NOPB
VSSOP (DGS), 10 pins · 3500, LARGE T&R; -40 to 125 °C; SN lead finish. · p. 18
LM5106MMX/NOPB.A
VSSOP (DGS), 10 pins · 3500, LARGE T&R; -40 to 125 °C; SN lead finish. · p. 18
LM5106MMX/NOPB.B
VSSOP (DGS), 10 pins · 3500, LARGE T&R; -40 to 125 °C; SN lead finish. · p. 18
LM5106SD/NOPB
WSON (DPR), 10 pins · 1000, SMALL T&R; -40 to 125 °C; NIPDAU | SN lead finish. · p. 18
LM5106SD/NOPB.A
WSON (DPR), 10 pins · 1000, SMALL T&R; -40 to 125 °C; SN lead finish. · p. 18
LM5106SD/NOPB.B
WSON (DPR), 10 pins · 1000, SMALL T&R; -40 to 125 °C; SN lead finish. · p. 18
LM5106SDX/NOPB
WSON (DPR), 10 pins · 4500, LARGE T&R; -40 to 125 °C; NIPDAU | SN lead finish. · p. 18
LM5106SDX/NOPB.A
WSON (DPR), 10 pins · 4500, LARGE T&R; -40 to 125 °C; SN lead finish. · p. 18
LM5106SDX/NOPB.B
WSON (DPR), 10 pins · 4500, LARGE T&R; -40 to 125 °C; SN lead finish. · p. 18

Parameters

21
Current - Output High(IOH)
1.2A
Current - Output Low(IOL)
1.8A
Current - Supply
3.6mA
Current - Supply(Max)
6.5mA
Driven Configuration
Half-Bridge
Fall Time
10ns
Features
Dead-time control
Input Logic Level - High
1.8V~2.2V
Junction Temperature(Max)
150℃
Load Type
MOSFET
Number of Drivers
2
Operating Temperature
-40℃~+125℃
Propagation Delay tpHL
32ns
Quiescent Current(Iq)
340uA
Rise Time
10ns
Standby Current
400uA
Thermal Resistance(Junction to Ambient)
165.3℃/W
Thermal Resistance(Junction to Board)
54.4℃/W
Thermal Resistance(Junction to Case)
58.9℃/W
Voltage - Supply
8V~14V
Voltage - Supply(Absolute Max)
18V

Order codes

1

Pinout

10
The pins of the LM5106MMX
PinNameType
1VDDUnspecified
2HBUnspecified
3HOOutput
4HSUnspecified
5NCUnspecified
6RDTUnspecified
7ENUnspecified
8INUnspecified
9VSSUnspecified
10LOOutput

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Questions

Is there a KiCad symbol and footprint for the LM5106MMX?

Yes. The symbol is EasyEDA_Cloud:LM5106MMX_NOPB and the footprint EasyEDA_Cloud:VSSOP-10_L3.0-W3.0-P0.50-LS4.9-BL, both drawn on this page. PCBKit places them on a board for you when you design with it.

What package is the LM5106MMX?

VSSOP-10-0.5mm, with 10 pins. Its footprint is drawn on this page.

Where is the LM5106MMX datasheet?

Texas Instruments publishes it: the Datasheet link on this page opens it.

Where can I order the LM5106MMX?

JLCPCB lists it as part C91879, with 6,000 in stock; the sellers' links on this page open their listings.

What can replace the LM5106MMX?

Parts like it in the library: the LM5106MM/NOPB by Texas Instruments, the LM5102MM by Texas Instruments and the LM5102MMX by Texas Instruments. Check their datasheets: a part that fits the footprint may still differ in its ratings.

Parts like it

3