
Jetson orin baseboard
antmicro/jetson-orin-baseboard
Baseboard targetting the NVIDIA Jetson Orin Nano and Jetson Orin NX

The HD3SS3220RNHT is a power Distribution Switche made by Texas Instruments in a WQFN-30-EP(2.5x4.5) package with 31 pins. -40℃~+85℃ 2 8Ω Active High、Active Low Overcurrent Protection WQFN-30-EP(2.5x4.5) Analog Switches, Multiplexers ROHS.
PCBKit's library has its KiCad symbol (HD3SS3220RNH:HD3SS3220RNH, from Antmicro) and its footprint (wqfn-30-1ep-4-6x2-6mm-p0-4mm:WQFN-30-1EP_4.6x2.6mm_P0.4mm, from Antmicro), ready for a KiCad board. 37 are in stock at JLCPCB (part C2155924). 3 open-source boards in 3 repositories on GitHub use it.
| Parameter | Conditions | As printed | Page |
|---|---|---|---|
| 5V Supply Voltage VDD5 | min -0.3 · max 6 V | 5 | |
| 3.3V Supply Voltage VCC33 | min -0.3 · max 4 V | 5 | |
| Control Pins | ADDR, PORT, ID, INT_N/OUT3, ENn_CC, SDA/OUT1, SCL/OUT2; maximum VDD5 +0.3 V | min -0.3 V | 5 |
| Control Pins | CC1, CC2 | min -0.3 · max 6 V | 5 |
| Control Pins | ENn_MUX, DIR; maximum VCC33 +0.3 V | min -0.3 V | 5 |
| Control Pins | VBUS_DET | min -0.3 · max 4 V | 5 |
| Super-speed Differential Signal Pins | [RX/TX] [p/n], [RX/TX][2/1][p/n] | min -0.3 · max 2.5 V | 5 |
| Storage temperature Tstg | min -65 · max 150 °C | 5 | |
| Electrostatic discharge V(ESD) | Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001; ±2000 V | max 2000 V | 5 |
| Electrostatic discharge V(ESD) | Charged-device model (CDM), per JEDEC specification JESD22-C101; ±1500 V | max 1500 V | 5 |
| 5V Supply Voltage range VDD5 | With 200mA VCONN current for VCONN ≥ 4.75V at connector, VDD5 ≥ 5V is recommended | min 4.5 · max 5.5 V | 5 |
| 3.3V Supply Voltage range VCC33 | min 3 · max 3.6 V | 5 | |
| Supply range for I2C (SDA, SCL) pins VDD | min 1.65 · max 3.6 V | 5 | |
| VDD5 supply ramp time VDD5(ramp) | max 25 ms | 5 | |
| High speed signal pins differential voltage V(diff) | min 0 · max 1.8 VPP | 5 | |
| High speed signal pins common mode voltage V(cm) | min 0 · max 2 V | 5 | |
| Operating free-air/ambient temperature (HD3SS3220) TA | HD3SS3220 | min 0 · max 70 °C | 5 |
| System V(BUS) input voltage through 900K resistor V(BUS) | min 4 · typ 5 · max 28 V | 5 | |
| Bulk capacitance on VCONN. Only when VCONN is on. C(BULK) | Disconnected when VCONN is off. Shall be placed on VDD5. | min 10 · max 200 uF | 5 |
| External Pull up resistor on Open Drain IOs (OUT1, OUT2, INT/OUT3, ID, VCONN_FAULT_N, and DIR pins) R(p_ODext) | Nominal value | typ 200 KΩ | 5 |
| Tri-level input external pull-up resistor (PORT and ADDR pins) R(p_TLext) | Nominal value | typ 4.7 KΩ | 5 |
| External pull up resistor to advertise 1.5A (CURRENT_MODE pin) R(p_15A) | Nominal value | typ 500 KΩ | 5 |
| External pull up resistor to advertise 3A (CURRENT_MODE pin) R(p_3A) | Nominal value | typ 10 KΩ | 5 |
| External Pull up resistance on I2C bus R(p_i2c_ext) | Could be 4.7K or higher. Nominal value listed | typ 2.2 KΩ | 5 |
| External resistor on VBUS_DET pin R(VBUS) | Nominal value in typ field | min 880 · typ 900 · max 910 KΩ | 6 |
| Junction-to-ambient thermal resistance RθJA | HD3SS3220, RNH (VQFN), 30 PINS | typ 60.9 °C/W | 6 |
| Junction-to-case (top) thermal resistance RθJC(top) | HD3SS3220, RNH (VQFN), 30 PINS | typ 50.4 °C/W | 6 |
| Junction-to-board thermal resistance RθJB | HD3SS3220, RNH (VQFN), 30 PINS | typ 22.8 °C/W | 6 |
| Junction-to-top characterization parameter ψJT | HD3SS3220, RNH (VQFN), 30 PINS | typ 1.7 °C/W | 6 |
| Junction-to-board characterization parameter ψJB | HD3SS3220, RNH (VQFN), 30 PINS | typ 22.6 °C/W | 6 |
| Junction-to-case (bottom) thermal resistance RθJC(bot) | HD3SS3220, RNH (VQFN), 30 PINS | typ 12.1 °C/W | 6 |
| Current consumption in active mode- both CC controller and SS mux on I(ACTIVE) | ENn_CC/Mux = L | typ 0.7 · max 0.9 mA | 6 |
| Current consumption in active mode – CC controller on and SS mux off ICC | ENn_CC = L, ENn_Mux = H | typ 0.2 mA | 6 |
| Current consumption in shutdown mode I(SHUTDOWN) | ENn_CC/Mux = H | typ 5 uA | 6 |
| Pulldown resistor when in dead-battery mode. R(CC_DB) | CC PINS | min 4.1 · typ 5.1 · max 6.1 kΩ | 6 |
| Pulldown resistor when in UFP or DRP mode. R(CC_D) | CC PINS | min 4.6 · typ 5.1 · max 5.6 kΩ | 6 |
| Voltage level for detecting a DFP attach when configured as a UFP and DFP is advertising default current source capability. V(UFP_CC_USB) | CC PINS | min 0.25 · max 0.61 V | 6 |
| Voltage level for detecting a DFP attach when configured as a UFP and DFP is advertising medium (1.5A) current source capability. V(UFP_CC_MED) | CC PINS | min 0.7 · max 1.16 V | 6 |
| Voltage level for detecting a DFP attach when configured as a UFP and DFP is advertising high (3A) current source capability. V(UFP_CC_HIGH) | CC PINS | min 1.31 · max 2.04 V | 6 |
| Voltage level for detecting a UFP attach when configured as a DFP and advertising default current source capability. V(DFP_CC_USB) | CC PINS | min 1.51 · typ 1.6 · max 1.64 V | 6 |
| Voltage level for detecting a UFP attach when configured as a DFP and advertising 1.5A current source capability. V(DFP_CC_MED) | CC PINS | min 1.51 · typ 1.6 · max 1.64 V | 6 |
| Voltage level for detecting a UFP attach when configured as a DFP and advertising 3A current source capability. V(DFP_CC_HIGH) | CC PINS | min 2.46 · typ 2.6 · max 2.74 V | 6 |
| Voltage level for detecting an active cable attach when configured as a DFP and advertising default current source capability. V(AC_CC_USB) | CC PINS | min 0.15 · typ 0.2 · max 0.25 V | 6 |
| Voltage level for detecting an active cable attach when configured as a DFP and advertising 1.5A current source capability. V(AC_CC_MED) | CC PINS | min 0.35 · typ 0.4 · max 0.45 V | 6 |
| Voltage level for detecting an active cable attach when configured as a DFP and advertising 3A current source capability. V(DFP_CC_HIGH) | CC PINS | min 0.75 · typ 0.8 · max 0.84 V | 7 |
| Default mode pull-up current source when operating in DFP or DRP mode. ICC(DEFAULT_P) | CC PINS | min 64 · typ 80 · max 96 uA | 7 |
| Medium (1.5A) mode pull-up current source when operating in DFP or DRP mode. ICC(MED_P) | CC PINS | min 166 · typ 180 · max 194 uA | 7 |
| High (3A) mode pull-up current source when operating in DFP or DRP mode. ICC(HIGH_P) | CC PINS; minimum transcribed as printed | min 34 · typ 330 · max 356 uA | 7 |
| Low-level input voltage VIL | 3-Level Input Pins: PORT, ADDR, ENn_CC and CURRENT_MODE | max 0.4 V | 7 |
| High-level input current IIH | 3-Level Input Pins: PORT, ADDR, ENn_CC and CURRENT_MODE | min 20 · max 20 uA | 7 |
| Low-level input current IIL | 3-Level Input Pins: PORT, ADDR, ENn_CC and CURRENT_MODE | min -10 · max 10 uA | 7 |
| Current Leakage on ID pin IID(LKG) | VDD5 = 0V, ID = 5V | max 10 uA | 7 |
| Internal pull-up resistance (PORT and ADDR pins) R(pu) | typ 588 kΩ | 7 | |
| Internal pull-down resistance (PORT and ADDR pins) R(pd) | typ 1.1 MΩ | 7 | |
| Internal pull-down resistance (CURRENT_MODE pin) R(pd_CURRENT) | typ 275 kΩ | 7 | |
| Internal pull-up resistance (ENn_CC pin) R(ENn_CC) | typ 1.1 MΩ | 7 | |
| High-level input current IIH | Input Pins: ENn_MUX | min -1 · max 1 uA | 7 |
| Low-level input current IIL | Input Pins: ENn_MUX | min -1 · max 1 uA | 7 |
| Low-level signal output voltage VOL | Open Drain Output Pins: OUT1, OUT2, INT_N/OUT3, ID, VCONN_FAULT_N, DIR; IOL = –1.6mA | max 0.4 V | 7 |
| High-level input voltage VIH | I2C– SDA/OUT1, SCL/OUT2 can Operate from 1.8/3.3V (±10%) | min 1.05 V | 7 |
| Low-level input voltage VIL | I2C– SDA/OUT1, SCL/OUT2 can Operate from 1.8/3.3V (±10%) | max 0.4 V | 7 |
| Low-level output voltage (open-drain) VOL | I2C– SDA/OUT1, SCL/OUT2; IOL = –1.6mA | max 0.4 V | 7 |
| VBUS threshold range V(BUS_THR) | VBUS_DET IO Pin (Connected to System VBUS Signal) | min 2.95 · typ 3.3 · max 3.8 V | 7 |
| External resistor between VBUS and VBUS_DET pin RVBUS | min 855 · typ 887 · max 920 KΩ | 7 | |
| Internal pull-down resistor at VBUS_DET pin R(VBUS_DET_INT) | typ 95 kΩ | 7 | |
| On resistance of the VCONN power FET RON | VCONN | max 1.25 Ω | 7 |
| Voltage tolerance on VCONN power FET V(TOL) | VCONN | max 5.5 V | 7 |
| Voltage to pass through VCONN power FET V(pass) | VCONN | max 5.5 V | 7 |
| VCONN current limit. VCONN will be disconnected above this value I(VCONN) | VCONN | min 225 · typ 300 · max 375 mA | 7 |
| Differential Insertion Loss IL | MUX High Speed Performance Parameters; f = 0.3Mhz | typ -0.43 dB | 7 |
| Differential Insertion Loss IL | MUX High Speed Performance Parameters; f = 2.5Ghz | typ -1.07 dB | 7 |
| Differential Insertion Loss IL | MUX High Speed Performance Parameters; f = 5Ghz | typ -1.42 dB | 7 |
| Bandwidth BW | MUX High Speed Performance Parameters | typ 8 Ghz | 7 |
| Pin | Name | Type |
|---|---|---|
| 1 | CC2 | Passive |
| 2 | CC1 | Passive |
| 3 | CURRENT_MODE | Passive |
| 4 | PORT | Passive |
| 5 | VBUS_DET | Passive |
| 6 | TX+ | Passive |
| 7 | TX- | Passive |
| 8 | VCC33 | Passive |
| 9 | RX+ | Passive |
| 10 | RX- | Passive |
| 11 | DIR | Passive |
| 12 | ENn_MUX | Passive |
| 13 | GND | Passive |
| 14 | RX1- | Passive |
| 15 | RX1+ | Passive |
| 16 | TX1- | Passive |
| 17 | TX1+ | Passive |
| 18 | RX2- | Passive |
| 19 | RX2+ | Passive |
| 20 | TX2- | Passive |
| 21 | TX2+ | Passive |
| 22 | ADDR | Passive |
| 23 | INT_N/OUT3 | Passive |
| 24 | VCONN_FAULT_N | Passive |
| 25 | SDA/OUT1 | Passive |
| 26 | SCL/OUT2 | Passive |
| 27 | ID | Passive |
| 28 | GND | Passive |
| 29 | ENn_CC | Passive |
| 30 | VDD5 | Passive |
| 31 | GND | Passive |

antmicro/jetson-orin-baseboard
Baseboard targetting the NVIDIA Jetson Orin Nano and Jetson Orin NX

CopperPilot/Jetson-AI-Cam-CopperPilot
A carrier for Jetson Nano, Xavier NX and TX2 NX with two IMX219 cameras on a 39 mm stereo baseline, dual 4K outputs and CAN.

<iframe src="https://pcbkit.io/embed/parts/ti/HD3SS3220RNHT" title="HD3SS3220RNHT in PCBKit" width="100%" height="480" style="border:0;border-radius:12px" allow="fullscreen" loading="lazy"></iframe><img src="https://pcbkit.io/embed/parts/ti/HD3SS3220RNHT.jpg" alt="HD3SS3220RNHT" width="1200" height="900">[](https://pcbkit.io/parts/ti/HD3SS3220RNHT)Yes. The symbol is HD3SS3220RNH:HD3SS3220RNH and the footprint wqfn-30-1ep-4-6x2-6mm-p0-4mm:WQFN-30-1EP_4.6x2.6mm_P0.4mm, both drawn on this page. PCBKit places them on a board for you when you design with it.
WQFN-30-EP(2.5x4.5), with 31 pins. Its footprint is drawn on this page.
Texas Instruments publishes it: the Datasheet link on this page opens it.
JLCPCB lists it as part C2155924, with 37 in stock; the sellers' links on this page open their listings.
3 boards in 3 repositories on GitHub; the most starred are listed on this page, with their KiCad files.