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CSD17571Q2 on a board, in 3D

CSD17571Q2

Texas Instruments

-55℃~+150℃ 1 N-channel 12pF 131pF 2.5W 22A 29mΩ@4.5V 2V 3.1nC@4.5V 30V 468pF N-Channel WSON-6(2x2) MOSFETs ROHS

Extended
DatasheetJLCPCBLCSCti/CSD17571Q2
Category
MOSFETs
Package
WSON-6(2x2)
Pins
8

Overview

The CSD17571Q2 is a MOSFET made by Texas Instruments in a WSON-6(2x2) package with 8 pins. -55℃~+150℃ 1 N-channel 12pF 131pF 2.5W 22A 29mΩ@4.5V 2V 3.1nC@4.5V 30V 468pF N-Channel WSON-6(2x2) MOSFETs ROHS.

PCBKit's library has its KiCad symbol (Pinmap_Generic:Q_NMOS_1D_2D_3G_4S_5D_6D_7D_8S, from PCBKit's generic symbols) and its footprint (EasyEDA_Cloud:WSON-6_L2.0-W2.0-P0.65-BL_CSD17571Q2, from EasyEDA), ready for a KiCad board. 933 are in stock at JLCPCB (part C962382). 5 open-source boards in 5 repositories on GitHub use it.

Symbol

Pinmap_Generic:Q_NMOS_1D_2D_3G_4S_5D_6D_7D_8SFrom PCBKit's generic symbols

Footprint

12345678
EasyEDA_Cloud:WSON-6_L2.0-W2.0-P0.65-BL_CSD17571Q2From EasyEDA

From the datasheet

11
Drain-source, most
30 V · Drain-to-source voltage, absolute max · p. 1
Gate-source, most
20 V · Gate-to-source voltage, absolute max magnitude ±20 V · p. 1
Drain current, most
7.6 A · Continuous drain current, max at TA = 25°C, RθJA = 50°C/W · p. 1
Junction, hottest
150 °C · Operating junction temperature, max · p. 1
On resistance
24 mΩ · Typical, VGS = 4.5 V, IDS = 5 A · p. 3
On resistance
20 mΩ · Typical, VGS = 10 V, IDS = 5 A · p. 3
Gate threshold
1.6 V · Typical, VDS = VGS, IDS = 250 uA · p. 3
Forward voltage
800 mV · Body diode, typical at IDS = 5 A, VGS = 0 V · p. 3
Edge
2.6 ns · Fall time, typical, VDS = 15 V, VGS = 4.5 V, IDS = 5 A, RG = 2 Ω · p. 3
Junction to case (Q2)
6.2 K/W · Junction-to-case thermal resistance, max · p. 3
Junction to air (Q2)
65 K/W · Junction-to-ambient thermal resistance, max, 1 inch² 2 oz. Cu on FR4 · p. 3

What it is and has

7
Gate charge
Low Qg and Qgd · p. 1
Thermal resistance
Low · p. 1
Avalanche rating
Avalanche rated · p. 1
Terminal plating
Pb-free · p. 1
RoHS
Compliant · p. 1
Halogen
Halogen free · p. 1
Package
SON 2 mm × 2 mm plastic package · p. 1

Specifications

33
ParameterConditionsAs printedPage
Drain-to-Source Voltage VDSTA = 25°Cmax 30 V1
Gate-to-Source Voltage VGSTA = 25°C; ±20 Vmin -20 · max 20 V1
Continuous Drain Current (Package Limit) IDTA = 25°Cmax 22 A1
Continuous Drain Current(1) IDTA = 25°C; RθJA = 50 on 1 in² Cu (2 oz.) on 0.060" thick FR4 PCBmax 7.6 A1
Pulsed Drain Current, TA = 25°C(2) IDMTA = 25°C; pulse duration 10 us, duty cycle ≤2%max 39 A1
Power Dissipation(1) PDTA = 25°C; RθJA = 50 on 1 in² Cu (2 oz.) on 0.060" thick FR4 PCBmax 2.5 W1
Operating Junction and Storage Temperature Range TJ, Tstgmin -55 · max 150 °C1
Avalanche Energy, single pulse EASTA = 25°C; ID = 12 A, L = 0.1 mH, RG = 25 Ωmax 7.2 mJ1
Drain-to-Source Voltage BVDSSTA = 25°C; VGS = 0 V, ID = 250 uAmin 30 V3
Drain-to-Source Leakage Current IDSSTA = 25°C; VGS = 0 V, VDS = 24 Vmax 1 uA3
Gate-to-Source Leakage Current IGSSTA = 25°C; VDS = 0 V, VGS = 20 Vmax 100 nA3
Gate-to-Source Threshold Voltage VGS(th)TA = 25°C; VDS = VGS, IDS = 250 uAmin 1.3 · typ 1.6 · max 2 V3
Drain-to-Source On-Resistance RDS(on)TA = 25°C; VGS = 4.5 V, IDS = 5 Atyp 24 · max 29 mΩ3
Drain-to-Source On-Resistance RDS(on)TA = 25°C; VGS = 10 V, IDS = 5 Atyp 20 · max 24 mΩ3
Transconductance gƒsTA = 25°C; VDS = 15 V, IDS = 5 Atyp 43 S3
Input Capacitance CISSTA = 25°C; VGS = 0 V, VDS = 15 V, ƒ = 1 MHztyp 360 · max 468 pF3
Output Capacitance COSSTA = 25°C; VGS = 0 V, VDS = 15 V, ƒ = 1 MHztyp 101 · max 131 pF3
Reverse Transfer Capacitance CRSSTA = 25°C; VGS = 0 V, VDS = 15 V, ƒ = 1 MHztyp 9 · max 12 pF3
Series Gate Resistance RgTA = 25°Ctyp 3.8 · max 7.6 Ω3
Gate Charge Total (4.5 V) QgTA = 25°C; VDS = 15 V, IDS = 5 Atyp 2.4 · max 3.1 nC3
Gate Charge – Gate-to-Drain QgdTA = 25°C; VDS = 15 V, IDS = 5 Atyp 0.6 nC3
Gate Charge Gate-to-Source QgsTA = 25°C; VDS = 15 V, IDS = 5 Atyp 0.9 nC3
Gate Charge at Vth Qg(th)TA = 25°C; VDS = 15 V, IDS = 5 Atyp 0.6 nC3
Output Charge QOSSTA = 25°C; VDS = 15 V, VGS = 0 Vtyp 3.4 nC3
Turn On Delay Time td(on)TA = 25°C; VDS = 15 V, VGS = 4.5 V, IDS = 5 A, RG = 2 Ωtyp 5.3 ns3
Rise Time trTA = 25°C; VDS = 15 V, VGS = 4.5 V, IDS = 5 A, RG = 2 Ωtyp 19 ns3
Turn Off Delay Time td(off)TA = 25°C; VDS = 15 V, VGS = 4.5 V, IDS = 5 A, RG = 2 Ωtyp 8 ns3
Fall Time tƒTA = 25°C; VDS = 15 V, VGS = 4.5 V, IDS = 5 A, RG = 2 Ωtyp 2.6 ns3
Diode Forward Voltage VSDTA = 25°C; IDS = 5 A, VGS = 0 Vtyp 0.8 · max 1 V3
Reverse Recovery Charge QrrTA = 25°C; VDD = 15 V, IF = 5 A, di/dt = 300 A/ustyp 2.3 nC3
Reverse Recovery Time trrTA = 25°C; VDD = 15 V, IF = 5 A, di/dt = 300 A/ustyp 11 ns3
Junction-to-Case Thermal Resistance (1) RθJCTA = 25°C; Q2; mounted on a 1 inch², 2 oz. Cu pad on a 1.5 inches × 1.5 inches, 0.06 inch thick FR4 PCB; specified by designmax 6.2 °C/W3
Junction-to-Ambient Thermal Resistance (1) (2) RθJATA = 25°C; Q2; device mounted on FR4 material with 1 inch², 2 oz. Cumax 65 °C/W3

Pins, by the datasheet

6
1 D
Drain. · p. 1
2 D
Drain. · p. 1
3 G
Gate. · p. 1
4 S
Source. · p. 1
5 D
Drain. · p. 1
6 D
Drain. · p. 1

Ordering codes, by the datasheet

3
CSD17571Q2
WSON (DQK) | 6 · 3000 | LARGE T&R; NIPDAU; -55 to 150°C; no difference in listed specifications · p. 11
CSD17571Q2.B
WSON (DQK) | 6 · 3000 | LARGE T&R; NIPDAU; -55 to 150°C; no difference in listed specifications · p. 11
CSD17571Q2G4.B
WSON (DQK) | 6 · 3000 | LARGE T&R; NIPDAU; -55 to 150°C; no difference in listed specifications · p. 11

Parameters

18
Current - Continuous Drain(Id)
7.6A
Drain to Source Voltage
30V
Gate Charge(Qg)
3.1nC@4.5V
Gate Threshold Voltage (Vgs(th))
1.6V
Input Capacitance(Ciss)
468pF
Junction Temperature(Max)
150℃
Number
1 N-channel
Operating Temperature
-55℃~+150℃
Output Capacitance(Coss)
131pF
Pd - Power Dissipation
2.5W
RDS(on)
29mΩ@4.5V
Reverse Transfer Capacitance (Crss@Vds)
12pF
Rise Time
2.6ns
Thermal Resistance(Junction to Ambient)
65℃/W
Thermal Resistance(Junction to Case)
6.2℃/W
Type
N-Channel
Vgs
±20V
Voltage - Forward(Vf)
800mV

Order codes

1

Pinout

8
The pins of the CSD17571Q2
PinNameType
1DPassive
2DPassive
3GInput
4SPassive
5DPassive
6DPassive
7DPassive
8SPassive

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Questions

Is there a KiCad symbol and footprint for the CSD17571Q2?

Yes. The symbol is Pinmap_Generic:Q_NMOS_1D_2D_3G_4S_5D_6D_7D_8S and the footprint EasyEDA_Cloud:WSON-6_L2.0-W2.0-P0.65-BL_CSD17571Q2, both drawn on this page. PCBKit places them on a board for you when you design with it.

What package is the CSD17571Q2?

WSON-6(2x2), with 8 pins. Its footprint is drawn on this page.

Where is the CSD17571Q2 datasheet?

Texas Instruments publishes it: the Datasheet link on this page opens it.

Where can I order the CSD17571Q2?

JLCPCB lists it as part C962382, with 933 in stock; the sellers' links on this page open their listings.

Which open-source boards use the CSD17571Q2?

5 boards in 5 repositories on GitHub; the most starred are listed on this page, with their KiCad files.