2 layers45 × 23 mm
Tiny
pengshulin/mcush
MCUSH application platform (personal toolkit: firmware platform, debugger, hardware, test and application framework)
53 parts103
Overview
The STM32F103CBT6 is a microcontroller made by STMicroelectronics in a LQFP-48(7x7) package with 48 pins. -40℃~+85℃ 128KB 12bit 20KB 2V~3.6V 32 Bit 37 72MHz ARM Cortex-M3 Built-in FLASH LQFP-48(7x7) Microcontrollers (MCU/MPU/SOC) ROHS.
PCBKit's library has its KiCad symbol (MCU_ST_STM32F1:STM32F103CBTx, from KiCad's library) and its footprint (Package_QFP:LQFP-48_7x7mm_P0.5mm, from KiCad's library), ready for a KiCad board. 3,849 are in stock at JLCPCB (part C8304). 92 open-source boards in 69 repositories on GitHub use it.
Symbol
Footprint
From the datasheet
18- Supply, least
- 2 V · VDD, recommended operating min · p. 38
- Supply, most
- 3.6 V · VDD, recommended operating max · p. 38
- Supply, least
- 2.4 V · VDDA, ADC used, recommended operating min · p. 38
- Supply, least
- 1.8 V · VBAT, recommended operating min · p. 38
- Supply, absolute maximum
- 4 V · VDD and VDDA, absolute max · p. 37
- Works from
- -40 °C · TA, suffix 6, maximum power dissipation, min · p. 39
- Works up to
- 85 °C · TA, suffix 6, maximum power dissipation, max · p. 39
- Works up to
- 105 °C · TA, suffix 6, low power dissipation, max subject to TJmax · p. 39
- Junction, hottest
- 150 °C · TJ, absolute max · p. 38
- Junction, hottest
- 105 °C · TJ, suffix 6, operating max · p. 39
- Takes working
- 36 mA · VDD, typical Run from Flash, 72 MHz external clock, peripherals enabled, 3.3 V, 25 °C · p. 48
- Takes at most
- 50 mA · VDD, max Run from Flash, 72 MHz external clock, peripherals enabled, TA = 85 °C · p. 42
- Takes asleep
- 24 µA · VDD, typical Stop, regulator in Run mode, 3.3 V, 25 °C · p. 45
- Takes asleep
- 14 µA · VDD, typical Stop, regulator in Low Power mode, 3.3 V, 25 °C · p. 45
- Takes asleep
- 2 µA · VDD, typical Standby, watchdog, oscillators and RTC off, 3.3 V, 25 °C · p. 45
- A pin gives at most
- 25 mA · I/O and control pin, absolute max sink current · p. 38
- Junction to air (LQFP48)
- 55 K/W · junction to ambient · p. 93
- Supply, least
- 3 V · VDD, USB operating voltage min · p. 75
What it is and has
22- CPU core
- ARM 32-bit Cortex-M3 · p. 1
- Maximum CPU frequency
- 72 MHz · p. 1
- SRAM
- 20 Kbytes · p. 1
- Debug interfaces
- SWD and JTAG · p. 1
- DMA
- 7-channel DMA controller · p. 1
- ADC
- 2 x 12-bit, 1 µs converters · p. 1
- Temperature sensor
- Integrated · p. 1
- CRC calculation unit
- Integrated · p. 1
- Unique ID
- 96-bit · p. 1
- CAN
- 2.0B Active · p. 1
- USB
- USB 2.0 full-speed · p. 1
- Low-power modes
- Sleep, Stop and Standby · p. 1
- High-speed crystal oscillator
- 4-to-16 MHz · p. 1
- Low-speed internal oscillator
- 40 kHz RC · p. 1
- RTC oscillator
- 32 kHz with calibration · p. 1
- SysTick
- 24-bit downcounter · p. 1
- Timers
- 7 · p. 1
- CPU
- ARM 32-bit Cortex-M3 · p. 1
- Maximum clock frequency
- 72 MHz · p. 1
- Flash memory
- 128 Kbytes · p. 96
- Pin count
- 48 · p. 96
- Package
- LQFP48 7 × 7 mm · p. 1
Around it
4- cap 5 pF to 25 pF
- between OSC_IN and GND; CL1; high-quality ceramic for high-frequency applications; select for crystal load capacitance including pin and board capacitance. · p. 53
- cap 5 pF to 15 pF
- between OSC32_IN and GND; CL1; high-quality ceramic, selected to match the crystal or resonator; usually the same size as CL2. · p. 54
- cap 5 pF to 15 pF
- between OSC32_OUT and GND; CL2; high-quality ceramic, selected to match the crystal or resonator; usually the same size as CL1. · p. 54
- res 1.5 k
- between USBDP (D+) and 3.0-to-3.6 V; Pull-up required for compliance with USB 2.0 full-speed electrical specification. · p. 75
Specifications
381| Parameter | Conditions | As printed | Page |
|---|---|---|---|
| External main supply voltage (including VDDA and VDD) VDD − VSS | Absolute maximum | min -0.3 · max 4 V | 37 |
| Input voltage on any other pin VIN | Absolute maximum | max 4 V | 37 |
| Variations between different VDD power pins |ΔVDDx| | Absolute maximum | max 50 mV | 37 |
| Variations between all the different ground pins |VSSX − VSS| | Absolute maximum | max 50 mV | 37 |
| Total current into VDD/VDDA power lines (source) IVDD | Absolute maximum | max 150 mA | 38 |
| Total current out of VSS ground lines (sink) IVSS | Absolute maximum | max 150 mA | 38 |
| Output current sunk by any I/O and control pin IIO | Absolute maximum | max 25 mA | 38 |
| Output current source by any I/Os and control pin IIO | Absolute maximum | max -25 mA | 38 |
| Storage temperature range TSTG | Absolute maximum | min -65 · max 150 °C | 38 |
| Maximum junction temperature TJ | Absolute maximum | max 150 °C | 38 |
| Internal AHB clock frequency fHCLK | min 0 · max 72 MHz | 38 | |
| Internal APB1 clock frequency fPCLK1 | min 0 · max 36 MHz | 38 | |
| Internal APB2 clock frequency fPCLK2 | min 0 · max 72 MHz | 38 | |
| Standard operating voltage VDD | min 2 · max 3.6 V | 38 | |
| Analog operating voltage (ADC not used) VDDA | Must be the same potential as VDD | min 2 · max 3.6 V | 38 |
| Analog operating voltage (ADC used) VDDA | Must be the same potential as VDD | min 2.4 · max 3.6 V | 38 |
| Backup operating voltage VBAT | min 1.8 · max 3.6 V | 38 | |
| I/O input voltage VIN | FT IO; 2 V < VDD ≤ 3.6 V; disable internal pull-up/pull-down resistors above VDD + 0.3 V | min -0.3 · max 5.5 V | 39 |
| I/O input voltage VIN | FT IO; VDD = 2 V; disable internal pull-up/pull-down resistors above VDD + 0.3 V | min -0.3 · max 5.2 V | 39 |
| I/O input voltage VIN | BOOT0 | min 0 · max 5.5 V | 39 |
| Power dissipation at TA = 85 °C for suffix 6 or TA = 105 °C for suffix 7 PD | LQFP48; suffix 6, TA = 85 °C | max 363 mW | 39 |
| Ambient temperature for 6 suffix version TA | Maximum power dissipation | min -40 · max 85 °C | 39 |
| Ambient temperature for 6 suffix version TA | Low power dissipation; TJ must not exceed TJmax | min -40 · max 105 °C | 39 |
| Junction temperature range TJ | 6 suffix version | min -40 · max 105 °C | 39 |
| VDD rise time rate tVDD | Subject to general operating conditions for TA | min 0 us/V | 39 |
| VDD fall time rate tVDD | Subject to general operating conditions for TA | min 20 us/V | 39 |
| Supply current in Run mode IDD | External clock, all peripherals enabled; 72 MHz; TA = 85 °C | max 50 mA | 42 |
| Supply current in Run mode IDD | External clock, all peripherals enabled; 72 MHz; TA = 105 °C | max 50.3 mA | 42 |
| Supply current in Run mode IDD | External clock, all peripherals enabled; 48 MHz; TA = 85 °C | max 36.1 mA | 42 |
| Supply current in Run mode IDD | External clock, all peripherals enabled; 48 MHz; TA = 105 °C | max 36.2 mA | 42 |
| Supply current in Run mode IDD | External clock, all peripherals enabled; 36 MHz; TA = 85 °C | max 28.6 mA | 42 |
| Supply current in Run mode IDD | External clock, all peripherals enabled; 36 MHz; TA = 105 °C | max 28.7 mA | 42 |
| Supply current in Run mode IDD | External clock, all peripherals enabled; 24 MHz; TA = 85 °C | max 19.9 mA | 42 |
| Supply current in Run mode IDD | External clock, all peripherals enabled; 24 MHz; TA = 105 °C | max 20.1 mA | 42 |
| Supply current in Run mode IDD | External clock, all peripherals enabled; 16 MHz; TA = 85 °C | max 14.7 mA | 42 |
| Supply current in Run mode IDD | External clock, all peripherals enabled; 16 MHz; TA = 105 °C | max 14.9 mA | 42 |
| Supply current in Run mode IDD | External clock, all peripherals enabled; 8 MHz; TA = 85 °C | max 8.6 mA | 42 |
| Supply current in Run mode IDD | External clock, all peripherals enabled; 8 MHz; TA = 105 °C | max 8.9 mA | 42 |
| Supply current in Run mode IDD | External clock, all peripherals disabled; 72 MHz; TA = 85 °C | max 32.8 mA | 42 |
| Supply current in Run mode IDD | External clock, all peripherals disabled; 72 MHz; TA = 105 °C | max 32.9 mA | 42 |
| Supply current in Run mode IDD | External clock, all peripherals disabled; 48 MHz; TA = 85 °C | max 24.4 mA | 42 |
| Supply current in Run mode IDD | External clock, all peripherals disabled; 48 MHz; TA = 105 °C | max 24.5 mA | 42 |
| Supply current in Run mode IDD | External clock, all peripherals disabled; 36 MHz; TA = 85 °C | max 19.8 mA | 42 |
| Supply current in Run mode IDD | External clock, all peripherals disabled; 36 MHz; TA = 105 °C | max 19.9 mA | 42 |
| Supply current in Run mode IDD | External clock, all peripherals disabled; 24 MHz; TA = 85 °C | max 13.9 mA | 42 |
| Supply current in Run mode IDD | External clock, all peripherals disabled; 24 MHz; TA = 105 °C | max 14.2 mA | 42 |
| Supply current in Run mode IDD | External clock, all peripherals disabled; 16 MHz; TA = 85 °C | max 10.7 mA | 42 |
| Supply current in Run mode IDD | External clock, all peripherals disabled; 16 MHz; TA = 105 °C | max 11 mA | 42 |
| Supply current in Run mode IDD | External clock, all peripherals disabled; 8 MHz; TA = 85 °C | max 6.8 mA | 42 |
| Supply current in Run mode IDD | External clock, all peripherals disabled; 8 MHz; TA = 105 °C | max 7.1 mA | 42 |
| Supply current in Run mode IDD | External clock, all peripherals enabled; 72 MHz; TA = 85 °C | max 48 mA | 42 |
| Supply current in Run mode IDD | External clock, all peripherals enabled; 72 MHz; TA = 105 °C | max 50 mA | 42 |
| Supply current in Run mode IDD | External clock, all peripherals enabled; 48 MHz; TA = 85 °C | max 31.5 mA | 42 |
| Supply current in Run mode IDD | External clock, all peripherals enabled; 48 MHz; TA = 105 °C | max 32 mA | 42 |
| Supply current in Run mode IDD | External clock, all peripherals enabled; 36 MHz; TA = 85 °C | max 24 mA | 42 |
| Supply current in Run mode IDD | External clock, all peripherals enabled; 36 MHz; TA = 105 °C | max 25.5 mA | 42 |
| Supply current in Run mode IDD | External clock, all peripherals enabled; 24 MHz; TA = 85 °C | max 17.5 mA | 42 |
| Supply current in Run mode IDD | External clock, all peripherals enabled; 24 MHz; TA = 105 °C | max 18 mA | 42 |
| Supply current in Run mode IDD | External clock, all peripherals enabled; 16 MHz; TA = 85 °C | max 12.5 mA | 42 |
| Supply current in Run mode IDD | External clock, all peripherals enabled; 16 MHz; TA = 105 °C | max 13 mA | 42 |
| Supply current in Run mode IDD | External clock, all peripherals enabled; 8 MHz; TA = 85 °C | max 7.5 mA | 42 |
| Supply current in Run mode IDD | External clock, all peripherals enabled; 8 MHz; TA = 105 °C | max 8 mA | 42 |
| Supply current in Run mode IDD | External clock, all peripherals disabled; 72 MHz; TA = 85 °C | max 29 mA | 42 |
| Supply current in Run mode IDD | External clock, all peripherals disabled; 72 MHz; TA = 105 °C | max 29.5 mA | 42 |
| Supply current in Run mode IDD | External clock, all peripherals disabled; 48 MHz; TA = 85 °C | max 20.5 mA | 42 |
| Supply current in Run mode IDD | External clock, all peripherals disabled; 48 MHz; TA = 105 °C | max 21 mA | 42 |
| Supply current in Run mode IDD | External clock, all peripherals disabled; 36 MHz; TA = 85 °C | max 16 mA | 42 |
| Supply current in Run mode IDD | External clock, all peripherals disabled; 36 MHz; TA = 105 °C | max 16.5 mA | 42 |
| Supply current in Run mode IDD | External clock, all peripherals disabled; 24 MHz; TA = 85 °C | max 11.5 mA | 42 |
| Supply current in Run mode IDD | External clock, all peripherals disabled; 24 MHz; TA = 105 °C | max 12 mA | 42 |
| Supply current in Run mode IDD | External clock, all peripherals disabled; 16 MHz; TA = 85 °C | max 8.5 mA | 42 |
| Supply current in Run mode IDD | External clock, all peripherals disabled; 16 MHz; TA = 105 °C | max 9 mA | 42 |
| Supply current in Run mode IDD | External clock, all peripherals disabled; 8 MHz; TA = 85 °C | max 5.5 mA | 42 |
| Supply current in Run mode IDD | External clock, all peripherals disabled; 8 MHz; TA = 105 °C | max 6 mA | 42 |
| Supply current in Stop mode IDD | Regulator in Run mode; low-speed and high-speed internal RC oscillators and high-speed oscillator OFF; no independent watchdog; VDD = 2.4 V; TA = 25 °C | typ 23.5 uA | 45 |
| Supply current in Stop mode IDD | Regulator in Run mode; low-speed and high-speed internal RC oscillators and high-speed oscillator OFF; no independent watchdog; VDD = 3.3 V; TA = 25 °C | typ 24 uA | 45 |
| Supply current in Stop mode IDD | Regulator in Run mode; low-speed and high-speed internal RC oscillators and high-speed oscillator OFF; no independent watchdog; TA = 85 °C | max 200 uA | 45 |
| Supply current in Stop mode IDD | Regulator in Run mode; low-speed and high-speed internal RC oscillators and high-speed oscillator OFF; no independent watchdog; TA = 105 °C | max 370 uA | 45 |
| Supply current in Stop mode IDD | Regulator in Low Power mode; low-speed and high-speed internal RC oscillators and high-speed oscillator OFF; no independent watchdog; VDD = 2.4 V; TA = 25 °C | typ 13.5 uA | 45 |
| Supply current in Stop mode IDD | Regulator in Low Power mode; low-speed and high-speed internal RC oscillators and high-speed oscillator OFF; no independent watchdog; VDD = 3.3 V; TA = 25 °C | typ 14 uA | 45 |
| Supply current in Stop mode IDD | Regulator in Low Power mode; low-speed and high-speed internal RC oscillators and high-speed oscillator OFF; no independent watchdog; TA = 85 °C | max 180 uA | 45 |
| Supply current in Stop mode IDD | Regulator in Low Power mode; low-speed and high-speed internal RC oscillators and high-speed oscillator OFF; no independent watchdog; TA = 105 °C | max 340 uA | 45 |
| Supply current in Standby mode IDD | Low-speed internal RC oscillator and independent watchdog ON; VDD = 2.4 V; TA = 25 °C | typ 2.6 uA | 45 |
| Supply current in Standby mode IDD | Low-speed internal RC oscillator and independent watchdog ON; VDD = 3.3 V; TA = 25 °C | typ 3.4 uA | 45 |
| Supply current in Standby mode IDD | Low-speed internal RC oscillator ON, independent watchdog OFF; VDD = 2.4 V; TA = 25 °C | typ 2.4 uA | 45 |
| Supply current in Standby mode IDD | Low-speed internal RC oscillator ON, independent watchdog OFF; VDD = 3.3 V; TA = 25 °C | typ 3.2 uA | 45 |
| Supply current in Standby mode IDD | Low-speed internal RC oscillator and independent watchdog OFF, low-speed oscillator and RTC OFF; VDD = 2.4 V; TA = 25 °C | typ 1.7 uA | 45 |
| Supply current in Standby mode IDD | Low-speed internal RC oscillator and independent watchdog OFF, low-speed oscillator and RTC OFF; VDD = 3.3 V; TA = 25 °C | typ 2 uA | 45 |
| Supply current in Standby mode IDD | Low-speed internal RC oscillator and independent watchdog OFF, low-speed oscillator and RTC OFF; TA = 85 °C | max 4 uA | 45 |
| Supply current in Standby mode IDD | Low-speed internal RC oscillator and independent watchdog OFF, low-speed oscillator and RTC OFF; TA = 105 °C | max 5 uA | 45 |
| Backup domain supply current IDD_VBAT | Low-speed oscillator and RTC ON; VBAT = 2.0 V; TA = 25 °C | typ 0.9 uA | 45 |
| Backup domain supply current IDD_VBAT | Low-speed oscillator and RTC ON; VBAT = 2.4 V; TA = 25 °C | typ 1.1 uA | 45 |
| Backup domain supply current IDD_VBAT | Low-speed oscillator and RTC ON; VBAT = 3.3 V; TA = 25 °C | typ 1.4 uA | 45 |
| Backup domain supply current IDD_VBAT | Low-speed oscillator and RTC ON; TA = 85 °C; based on characterization, not tested in production | max 1.9 uA | 45 |
| Backup domain supply current IDD_VBAT | Low-speed oscillator and RTC ON; TA = 105 °C | max 2.2 uA | 45 |
| Supply current in Run mode IDD | External clock; 72 MHz; all peripherals enabled; TA = 25 °C, VDD = 3.3 V; ADC analog current additional | typ 36 mA | 48 |
| Supply current in Run mode IDD | External clock; 72 MHz; all peripherals disabled; TA = 25 °C, VDD = 3.3 V | typ 27 mA | 48 |
| Supply current in Run mode IDD | External clock; 48 MHz; all peripherals enabled; TA = 25 °C, VDD = 3.3 V; ADC analog current additional | typ 24.2 mA | 48 |
| Supply current in Run mode IDD | External clock; 48 MHz; all peripherals disabled; TA = 25 °C, VDD = 3.3 V | typ 18.6 mA | 48 |
| Supply current in Run mode IDD | External clock; 36 MHz; all peripherals enabled; TA = 25 °C, VDD = 3.3 V; ADC analog current additional | typ 19 mA | 48 |
| Supply current in Run mode IDD | External clock; 36 MHz; all peripherals disabled; TA = 25 °C, VDD = 3.3 V | typ 14.8 mA | 48 |
| Supply current in Run mode IDD | External clock; 24 MHz; all peripherals enabled; TA = 25 °C, VDD = 3.3 V; ADC analog current additional | typ 12.9 mA | 48 |
| Supply current in Run mode IDD | External clock; 24 MHz; all peripherals disabled; TA = 25 °C, VDD = 3.3 V | typ 10.1 mA | 48 |
| Supply current in Run mode IDD | External clock; 16 MHz; all peripherals enabled; TA = 25 °C, VDD = 3.3 V; ADC analog current additional | typ 9.3 mA | 48 |
| Supply current in Run mode IDD | External clock; 16 MHz; all peripherals disabled; TA = 25 °C, VDD = 3.3 V | typ 7.4 mA | 48 |
| Supply current in Run mode IDD | External clock; 8 MHz; all peripherals enabled; TA = 25 °C, VDD = 3.3 V; ADC analog current additional | typ 5.5 mA | 48 |
| Supply current in Run mode IDD | External clock; 8 MHz; all peripherals disabled; TA = 25 °C, VDD = 3.3 V | typ 4.6 mA | 48 |
| Supply current in Run mode IDD | External clock; 4 MHz; all peripherals enabled; TA = 25 °C, VDD = 3.3 V; ADC analog current additional | typ 3.3 mA | 48 |
| Supply current in Run mode IDD | External clock; 4 MHz; all peripherals disabled; TA = 25 °C, VDD = 3.3 V | typ 2.8 mA | 48 |
| Supply current in Run mode IDD | External clock; 2 MHz; all peripherals enabled; TA = 25 °C, VDD = 3.3 V; ADC analog current additional | typ 2.2 mA | 48 |
| Supply current in Run mode IDD | External clock; 2 MHz; all peripherals disabled; TA = 25 °C, VDD = 3.3 V | typ 1.9 mA | 48 |
| Supply current in Run mode IDD | External clock; 1 MHz; all peripherals enabled; TA = 25 °C, VDD = 3.3 V; ADC analog current additional | typ 1.6 mA | 48 |
| Supply current in Run mode IDD | External clock; 1 MHz; all peripherals disabled; TA = 25 °C, VDD = 3.3 V | typ 1.45 mA | 48 |
| Supply current in Run mode IDD | External clock; 500 kHz; all peripherals enabled; TA = 25 °C, VDD = 3.3 V; ADC analog current additional | typ 1.3 mA | 48 |
| Supply current in Run mode IDD | External clock; 500 kHz; all peripherals disabled; TA = 25 °C, VDD = 3.3 V | typ 1.25 mA | 48 |
| Supply current in Run mode IDD | External clock; 125 kHz; all peripherals enabled; TA = 25 °C, VDD = 3.3 V; ADC analog current additional | typ 1.08 mA | 48 |
| Supply current in Run mode IDD | External clock; 125 kHz; all peripherals disabled; TA = 25 °C, VDD = 3.3 V | typ 1.06 mA | 48 |
| Supply current in Run mode IDD | HSI, AHB prescaler used to reduce frequency; 64 MHz; all peripherals enabled; TA = 25 °C, VDD = 3.3 V; ADC analog current additional | typ 31.4 mA | 48 |
| Supply current in Run mode IDD | HSI, AHB prescaler used to reduce frequency; 64 MHz; all peripherals disabled; TA = 25 °C, VDD = 3.3 V | typ 23.9 mA | 48 |
| Supply current in Run mode IDD | HSI, AHB prescaler used to reduce frequency; 48 MHz; all peripherals enabled; TA = 25 °C, VDD = 3.3 V; ADC analog current additional | typ 23.5 mA | 48 |
| Supply current in Run mode IDD | HSI, AHB prescaler used to reduce frequency; 48 MHz; all peripherals disabled; TA = 25 °C, VDD = 3.3 V | typ 17.9 mA | 48 |
| Supply current in Run mode IDD | HSI, AHB prescaler used to reduce frequency; 36 MHz; all peripherals enabled; TA = 25 °C, VDD = 3.3 V; ADC analog current additional | typ 18.3 mA | 48 |
| Supply current in Run mode IDD | HSI, AHB prescaler used to reduce frequency; 36 MHz; all peripherals disabled; TA = 25 °C, VDD = 3.3 V | typ 14.1 mA | 48 |
| Supply current in Run mode IDD | HSI, AHB prescaler used to reduce frequency; 24 MHz; all peripherals enabled; TA = 25 °C, VDD = 3.3 V; ADC analog current additional | typ 12.2 mA | 48 |
| Supply current in Run mode IDD | HSI, AHB prescaler used to reduce frequency; 24 MHz; all peripherals disabled; TA = 25 °C, VDD = 3.3 V | typ 9.5 mA | 48 |
| Supply current in Run mode IDD | HSI, AHB prescaler used to reduce frequency; 16 MHz; all peripherals enabled; TA = 25 °C, VDD = 3.3 V; ADC analog current additional | typ 8.5 mA | 48 |
| Supply current in Run mode IDD | HSI, AHB prescaler used to reduce frequency; 16 MHz; all peripherals disabled; TA = 25 °C, VDD = 3.3 V | typ 6.8 mA | 48 |
| Supply current in Run mode IDD | HSI, AHB prescaler used to reduce frequency; 8 MHz; all peripherals enabled; TA = 25 °C, VDD = 3.3 V; ADC analog current additional | typ 4.9 mA | 48 |
| Supply current in Run mode IDD | HSI, AHB prescaler used to reduce frequency; 8 MHz; all peripherals disabled; TA = 25 °C, VDD = 3.3 V | typ 4 mA | 48 |
| Supply current in Run mode IDD | HSI, AHB prescaler used to reduce frequency; 4 MHz; all peripherals enabled; TA = 25 °C, VDD = 3.3 V; ADC analog current additional | typ 2.7 mA | 48 |
| Supply current in Run mode IDD | HSI, AHB prescaler used to reduce frequency; 4 MHz; all peripherals disabled; TA = 25 °C, VDD = 3.3 V | typ 2.2 mA | 48 |
| Supply current in Run mode IDD | HSI, AHB prescaler used to reduce frequency; 2 MHz; all peripherals enabled; TA = 25 °C, VDD = 3.3 V; ADC analog current additional | typ 1.6 mA | 48 |
| Supply current in Run mode IDD | HSI, AHB prescaler used to reduce frequency; 2 MHz; all peripherals disabled; TA = 25 °C, VDD = 3.3 V | typ 1.4 mA | 48 |
| Supply current in Run mode IDD | HSI, AHB prescaler used to reduce frequency; 1 MHz; all peripherals enabled; TA = 25 °C, VDD = 3.3 V; ADC analog current additional | typ 1.02 mA | 48 |
| Supply current in Run mode IDD | HSI, AHB prescaler used to reduce frequency; 1 MHz; all peripherals disabled; TA = 25 °C, VDD = 3.3 V | typ 0.9 mA | 48 |
| Supply current in Run mode IDD | HSI, AHB prescaler used to reduce frequency; 500 kHz; all peripherals enabled; TA = 25 °C, VDD = 3.3 V; ADC analog current additional | typ 0.73 mA | 48 |
| Supply current in Run mode IDD | HSI, AHB prescaler used to reduce frequency; 500 kHz; all peripherals disabled; TA = 25 °C, VDD = 3.3 V | typ 0.67 mA | 48 |
| Supply current in Run mode IDD | HSI, AHB prescaler used to reduce frequency; 125 kHz; all peripherals enabled; TA = 25 °C, VDD = 3.3 V; ADC analog current additional | typ 0.5 mA | 48 |
| Supply current in Run mode IDD | HSI, AHB prescaler used to reduce frequency; 125 kHz; all peripherals disabled; TA = 25 °C, VDD = 3.3 V | typ 0.48 mA | 48 |
| Electrostatic discharge voltage (human body model) VESD(HBM) | TA = +25 °C; JESD22-A114; class 2; based on characterization results, not tested in production | max 2000 V | 60 |
| Electrostatic discharge voltage (charge device model) VESD(CDM) | TA = +25 °C; ANSI/ESD STM5.3.1; class II; based on characterization results, not tested in production | max 500 V | 60 |
| Thermal resistance junction-ambient ΘJA | LQFP48 - 7 x 7 mm / 0.5 mm pitch | typ 55 °C/W | 93 |
| Input voltage on any other pin VIN | Min VSS − 0.3 V | max 4 V | 37 |
| Variations between different VDD power pins |ΔVDDx| | max 50 mV | 37 | |
| Variations between all the different ground pins |VSSX − VSS| | max 50 mV | 37 | |
| Total current into VDD/VDDA power lines (source) IVDD | max 150 mA | 38 | |
| Total current out of VSS ground lines (sink) IVSS | max 150 mA | 38 | |
| Output current sunk by any I/O and control pin IIO | max 25 mA | 38 | |
| Output current source by any I/Os and control pin IIO | max -25 mA | 38 | |
| Injected current on five volt tolerant pins IINJ(PIN) | Limits −5/+0 mA | min -5 · max 0 mA | 38 |
| Injected current on any other pin IINJ(PIN) | ±5 mA | max 5 mA | 38 |
| Total injected current (sum of all I/O and control pins) ΣIINJ(PIN) | ±25 mA; absolute sum of positive and negative injected currents | max 25 mA | 38 |
| Storage temperature range TSTG | min -65 · max 150 °C | 38 | |
| I/O input voltage VIN | Standard IO; max VDD + 0.3 V | min -0.3 V | 39 |
| I/O input voltage VIN | FT IO; 2 V < VDD ≤ 3.6 V | min -0.3 · max 5.5 V | 39 |
| I/O input voltage VIN | FT IO; VDD = 2 V | min -0.3 · max 5.2 V | 39 |
| VDD rise time rate tVDD | Subject to general operating conditions for TA; maximum ∞ | min 0 us/V | 39 |
| VDD fall time rate tVDD | Subject to general operating conditions for TA; maximum ∞ | min 20 us/V | 39 |
| Internal reference voltage VREFINT | −40 °C < TA < +105 °C | min 1.16 · typ 1.2 · max 1.26 V | 41 |
| Internal reference voltage VREFINT | −40 °C < TA < +85 °C | min 1.16 · typ 1.2 · max 1.24 V | 41 |
| ADC sampling time when reading the internal reference voltage TS_vrefint | typ 5.1 · max 17.1 us | 41 | |
| Internal reference voltage spread over the temperature range VRERINT | VDD = 3 V ±10 mV; guaranteed by design, not tested in production | max 10 mV | 41 |
| Temperature coefficient TCoeff | Guaranteed by design, not tested in production | max 100 ppm/°C | 41 |
| Supply current in Sleep mode IDD | External clock, all peripherals enabled; 72 MHz; TA = 85 °C | max 30 mA | 44 |
| Supply current in Sleep mode IDD | External clock, all peripherals enabled; 72 MHz; TA = 105 °C | max 32 mA | 44 |
| Supply current in Sleep mode IDD | External clock, all peripherals enabled; 48 MHz; TA = 85 °C | max 20 mA | 44 |
| Supply current in Sleep mode IDD | External clock, all peripherals enabled; 48 MHz; TA = 105 °C | max 20.5 mA | 44 |
| Supply current in Sleep mode IDD | External clock, all peripherals enabled; 36 MHz; TA = 85 °C | max 15.5 mA | 44 |
| Supply current in Sleep mode IDD | External clock, all peripherals enabled; 36 MHz; TA = 105 °C | max 16 mA | 44 |
| Supply current in Sleep mode IDD | External clock, all peripherals enabled; 24 MHz; TA = 85 °C | max 11.5 mA | 44 |
| Supply current in Sleep mode IDD | External clock, all peripherals enabled; 24 MHz; TA = 105 °C | max 12 mA | 44 |
| Supply current in Sleep mode IDD | External clock, all peripherals enabled; 16 MHz; TA = 85 °C | max 8.5 mA | 44 |
| Supply current in Sleep mode IDD | External clock, all peripherals enabled; 16 MHz; TA = 105 °C | max 9 mA | 44 |
| Supply current in Sleep mode IDD | External clock, all peripherals enabled; 8 MHz; TA = 85 °C | max 5.5 mA | 44 |
| Supply current in Sleep mode IDD | External clock, all peripherals enabled; 8 MHz; TA = 105 °C | max 6 mA | 44 |
| Supply current in Sleep mode IDD | External clock, all peripherals disabled; 72 MHz; TA = 85 °C | max 7.5 mA | 44 |
| Supply current in Sleep mode IDD | External clock, all peripherals disabled; 72 MHz; TA = 105 °C | max 8 mA | 44 |
| Supply current in Sleep mode IDD | External clock, all peripherals disabled; 48 MHz; TA = 85 °C | max 6 mA | 44 |
| Supply current in Sleep mode IDD | External clock, all peripherals disabled; 48 MHz; TA = 105 °C | max 6.5 mA | 44 |
| Supply current in Sleep mode IDD | External clock, all peripherals disabled; 36 MHz; TA = 85 °C | max 5 mA | 44 |
| Supply current in Sleep mode IDD | External clock, all peripherals disabled; 36 MHz; TA = 105 °C | max 5.5 mA | 44 |
| Supply current in Sleep mode IDD | External clock, all peripherals disabled; 24 MHz; TA = 85 °C | max 4.5 mA | 44 |
| Supply current in Sleep mode IDD | External clock, all peripherals disabled; 24 MHz; TA = 105 °C | max 5 mA | 44 |
| Supply current in Sleep mode IDD | External clock, all peripherals disabled; 16 MHz; TA = 85 °C | max 4 mA | 44 |
| Supply current in Sleep mode IDD | External clock, all peripherals disabled; 16 MHz; TA = 105 °C | max 4.5 mA | 44 |
| Supply current in Sleep mode IDD | External clock, all peripherals disabled; 8 MHz; TA = 85 °C | max 3 mA | 44 |
| Supply current in Sleep mode IDD | External clock, all peripherals disabled; 8 MHz; TA = 105 °C | max 4 mA | 44 |
| Backup domain supply current IDD_VBAT | Low-speed oscillator and RTC ON; TA = 85 °C | max 1.9 uA | 45 |
| Supply current in Run mode IDD | External clock; 72 MHz; all peripherals enabled; TA = 25 °C, VDD = 3.3 V; add 0.8 mA per enabled ADC analog part | typ 36 mA | 48 |
| Supply current in Run mode IDD | External clock; 48 MHz; all peripherals enabled; TA = 25 °C, VDD = 3.3 V; add 0.8 mA per enabled ADC analog part | typ 24.2 mA | 48 |
| Supply current in Run mode IDD | External clock; 36 MHz; all peripherals enabled; TA = 25 °C, VDD = 3.3 V; add 0.8 mA per enabled ADC analog part | typ 19 mA | 48 |
| Supply current in Run mode IDD | External clock; 24 MHz; all peripherals enabled; TA = 25 °C, VDD = 3.3 V; add 0.8 mA per enabled ADC analog part | typ 12.9 mA | 48 |
| Supply current in Run mode IDD | External clock; 16 MHz; all peripherals enabled; TA = 25 °C, VDD = 3.3 V; add 0.8 mA per enabled ADC analog part | typ 9.3 mA | 48 |
| Supply current in Run mode IDD | External clock; 8 MHz; all peripherals enabled; TA = 25 °C, VDD = 3.3 V; add 0.8 mA per enabled ADC analog part | typ 5.5 mA | 48 |
| Supply current in Run mode IDD | External clock; 4 MHz; all peripherals enabled; TA = 25 °C, VDD = 3.3 V; add 0.8 mA per enabled ADC analog part | typ 3.3 mA | 48 |
| Supply current in Run mode IDD | External clock; 2 MHz; all peripherals enabled; TA = 25 °C, VDD = 3.3 V; add 0.8 mA per enabled ADC analog part | typ 2.2 mA | 48 |
| Supply current in Run mode IDD | External clock; 1 MHz; all peripherals enabled; TA = 25 °C, VDD = 3.3 V; add 0.8 mA per enabled ADC analog part | typ 1.6 mA | 48 |
| Supply current in Run mode IDD | External clock; 500 kHz; all peripherals enabled; TA = 25 °C, VDD = 3.3 V; add 0.8 mA per enabled ADC analog part | typ 1.3 mA | 48 |
| Supply current in Run mode IDD | External clock; 125 kHz; all peripherals enabled; TA = 25 °C, VDD = 3.3 V; add 0.8 mA per enabled ADC analog part | typ 1.08 mA | 48 |
| Supply current in Run mode IDD | HSI, AHB prescaler; 64 MHz; all peripherals enabled; TA = 25 °C, VDD = 3.3 V; add 0.8 mA per enabled ADC analog part | typ 31.4 mA | 48 |
| Supply current in Run mode IDD | HSI, AHB prescaler; 64 MHz; all peripherals disabled; TA = 25 °C, VDD = 3.3 V | typ 23.9 mA | 48 |
| Supply current in Run mode IDD | HSI, AHB prescaler; 48 MHz; all peripherals enabled; TA = 25 °C, VDD = 3.3 V; add 0.8 mA per enabled ADC analog part | typ 23.5 mA | 48 |
| Supply current in Run mode IDD | HSI, AHB prescaler; 48 MHz; all peripherals disabled; TA = 25 °C, VDD = 3.3 V | typ 17.9 mA | 48 |
| Supply current in Run mode IDD | HSI, AHB prescaler; 36 MHz; all peripherals enabled; TA = 25 °C, VDD = 3.3 V; add 0.8 mA per enabled ADC analog part | typ 18.3 mA | 48 |
| Supply current in Run mode IDD | HSI, AHB prescaler; 36 MHz; all peripherals disabled; TA = 25 °C, VDD = 3.3 V | typ 14.1 mA | 48 |
| Supply current in Run mode IDD | HSI, AHB prescaler; 24 MHz; all peripherals enabled; TA = 25 °C, VDD = 3.3 V; add 0.8 mA per enabled ADC analog part | typ 12.2 mA | 48 |
| Supply current in Run mode IDD | HSI, AHB prescaler; 24 MHz; all peripherals disabled; TA = 25 °C, VDD = 3.3 V | typ 9.5 mA | 48 |
| Supply current in Run mode IDD | HSI, AHB prescaler; 16 MHz; all peripherals enabled; TA = 25 °C, VDD = 3.3 V; add 0.8 mA per enabled ADC analog part | typ 8.5 mA | 48 |
| Supply current in Run mode IDD | HSI, AHB prescaler; 16 MHz; all peripherals disabled; TA = 25 °C, VDD = 3.3 V | typ 6.8 mA | 48 |
| Supply current in Run mode IDD | HSI, AHB prescaler; 8 MHz; all peripherals enabled; TA = 25 °C, VDD = 3.3 V; add 0.8 mA per enabled ADC analog part | typ 4.9 mA | 48 |
| Supply current in Run mode IDD | HSI, AHB prescaler; 8 MHz; all peripherals disabled; TA = 25 °C, VDD = 3.3 V | typ 4 mA | 48 |
| Supply current in Run mode IDD | HSI, AHB prescaler; 4 MHz; all peripherals enabled; TA = 25 °C, VDD = 3.3 V; add 0.8 mA per enabled ADC analog part | typ 2.7 mA | 48 |
| Supply current in Run mode IDD | HSI, AHB prescaler; 4 MHz; all peripherals disabled; TA = 25 °C, VDD = 3.3 V | typ 2.2 mA | 48 |
| Supply current in Run mode IDD | HSI, AHB prescaler; 2 MHz; all peripherals enabled; TA = 25 °C, VDD = 3.3 V; add 0.8 mA per enabled ADC analog part | typ 1.6 mA | 48 |
| Supply current in Run mode IDD | HSI, AHB prescaler; 2 MHz; all peripherals disabled; TA = 25 °C, VDD = 3.3 V | typ 1.4 mA | 48 |
| Supply current in Run mode IDD | HSI, AHB prescaler; 1 MHz; all peripherals enabled; TA = 25 °C, VDD = 3.3 V; add 0.8 mA per enabled ADC analog part | typ 1.02 mA | 48 |
| Supply current in Run mode IDD | HSI, AHB prescaler; 1 MHz; all peripherals disabled; TA = 25 °C, VDD = 3.3 V | typ 0.9 mA | 48 |
| Supply current in Run mode IDD | HSI, AHB prescaler; 500 kHz; all peripherals enabled; TA = 25 °C, VDD = 3.3 V; add 0.8 mA per enabled ADC analog part | typ 0.73 mA | 48 |
| Supply current in Run mode IDD | HSI, AHB prescaler; 500 kHz; all peripherals disabled; TA = 25 °C, VDD = 3.3 V | typ 0.67 mA | 48 |
| Supply current in Run mode IDD | HSI, AHB prescaler; 125 kHz; all peripherals enabled; TA = 25 °C, VDD = 3.3 V; add 0.8 mA per enabled ADC analog part | typ 0.5 mA | 48 |
| Supply current in Run mode IDD | HSI, AHB prescaler; 125 kHz; all peripherals disabled; TA = 25 °C, VDD = 3.3 V | typ 0.48 mA | 48 |
| Supply current in Sleep mode IDD | External clock; 72 MHz; all peripherals enabled; TA = 25 °C, VDD = 3.3 V; add 0.8 mA per enabled ADC analog part | typ 14.4 mA | 49 |
| Supply current in Sleep mode IDD | External clock; 72 MHz; all peripherals disabled; TA = 25 °C, VDD = 3.3 V | typ 5.5 mA | 49 |
| Supply current in Sleep mode IDD | External clock; 48 MHz; all peripherals enabled; TA = 25 °C, VDD = 3.3 V; add 0.8 mA per enabled ADC analog part | typ 9.9 mA | 49 |
| Supply current in Sleep mode IDD | External clock; 48 MHz; all peripherals disabled; TA = 25 °C, VDD = 3.3 V | typ 3.9 mA | 49 |
| Supply current in Sleep mode IDD | External clock; 36 MHz; all peripherals enabled; TA = 25 °C, VDD = 3.3 V; add 0.8 mA per enabled ADC analog part | typ 7.6 mA | 49 |
| Supply current in Sleep mode IDD | External clock; 36 MHz; all peripherals disabled; TA = 25 °C, VDD = 3.3 V | typ 3.1 mA | 49 |
| Supply current in Sleep mode IDD | External clock; 24 MHz; all peripherals enabled; TA = 25 °C, VDD = 3.3 V; add 0.8 mA per enabled ADC analog part | typ 5.3 mA | 49 |
| Supply current in Sleep mode IDD | External clock; 24 MHz; all peripherals disabled; TA = 25 °C, VDD = 3.3 V | typ 2.3 mA | 49 |
| Supply current in Sleep mode IDD | External clock; 16 MHz; all peripherals enabled; TA = 25 °C, VDD = 3.3 V; add 0.8 mA per enabled ADC analog part | typ 3.8 mA | 49 |
| Supply current in Sleep mode IDD | External clock; 16 MHz; all peripherals disabled; TA = 25 °C, VDD = 3.3 V | typ 1.8 mA | 49 |
| Supply current in Sleep mode IDD | External clock; 8 MHz; all peripherals enabled; TA = 25 °C, VDD = 3.3 V; add 0.8 mA per enabled ADC analog part | typ 2.1 mA | 49 |
| Supply current in Sleep mode IDD | External clock; 8 MHz; all peripherals disabled; TA = 25 °C, VDD = 3.3 V | typ 1.2 mA | 49 |
| Supply current in Sleep mode IDD | External clock; 4 MHz; all peripherals enabled; TA = 25 °C, VDD = 3.3 V; add 0.8 mA per enabled ADC analog part | typ 1.6 mA | 49 |
| Supply current in Sleep mode IDD | External clock; 4 MHz; all peripherals disabled; TA = 25 °C, VDD = 3.3 V | typ 1.1 mA | 49 |
| Supply current in Sleep mode IDD | External clock; 2 MHz; all peripherals enabled; TA = 25 °C, VDD = 3.3 V; add 0.8 mA per enabled ADC analog part | typ 1.3 mA | 49 |
| Supply current in Sleep mode IDD | External clock; 2 MHz; all peripherals disabled; TA = 25 °C, VDD = 3.3 V | typ 1 mA | 49 |
| Supply current in Sleep mode IDD | External clock; 1 MHz; all peripherals enabled; TA = 25 °C, VDD = 3.3 V; add 0.8 mA per enabled ADC analog part | typ 1.11 mA | 49 |
| Supply current in Sleep mode IDD | External clock; 1 MHz; all peripherals disabled; TA = 25 °C, VDD = 3.3 V | typ 0.98 mA | 49 |
| Supply current in Sleep mode IDD | External clock; 500 kHz; all peripherals enabled; TA = 25 °C, VDD = 3.3 V; add 0.8 mA per enabled ADC analog part | typ 1.04 mA | 49 |
| Supply current in Sleep mode IDD | External clock; 500 kHz; all peripherals disabled; TA = 25 °C, VDD = 3.3 V | typ 0.96 mA | 49 |
| Supply current in Sleep mode IDD | External clock; 125 kHz; all peripherals enabled; TA = 25 °C, VDD = 3.3 V; add 0.8 mA per enabled ADC analog part | typ 0.98 mA | 49 |
| Supply current in Sleep mode IDD | External clock; 125 kHz; all peripherals disabled; TA = 25 °C, VDD = 3.3 V | typ 0.95 mA | 49 |
| Supply current in Sleep mode IDD | HSI, AHB prescaler; 64 MHz; all peripherals enabled; TA = 25 °C, VDD = 3.3 V; add 0.8 mA per enabled ADC analog part | typ 12.3 mA | 49 |
| Supply current in Sleep mode IDD | HSI, AHB prescaler; 64 MHz; all peripherals disabled; TA = 25 °C, VDD = 3.3 V | typ 4.4 mA | 49 |
| Supply current in Sleep mode IDD | HSI, AHB prescaler; 48 MHz; all peripherals enabled; TA = 25 °C, VDD = 3.3 V; add 0.8 mA per enabled ADC analog part | typ 9.3 mA | 49 |
| Supply current in Sleep mode IDD | HSI, AHB prescaler; 48 MHz; all peripherals disabled; TA = 25 °C, VDD = 3.3 V | typ 3.3 mA | 49 |
| Supply current in Sleep mode IDD | HSI, AHB prescaler; 36 MHz; all peripherals enabled; TA = 25 °C, VDD = 3.3 V; add 0.8 mA per enabled ADC analog part | typ 7 mA | 49 |
| Supply current in Sleep mode IDD | HSI, AHB prescaler; 36 MHz; all peripherals disabled; TA = 25 °C, VDD = 3.3 V | typ 2.5 mA | 49 |
| Supply current in Sleep mode IDD | HSI, AHB prescaler; 24 MHz; all peripherals enabled; TA = 25 °C, VDD = 3.3 V; add 0.8 mA per enabled ADC analog part | typ 4.8 mA | 49 |
| Supply current in Sleep mode IDD | HSI, AHB prescaler; 24 MHz; all peripherals disabled; TA = 25 °C, VDD = 3.3 V | typ 1.8 mA | 49 |
| Supply current in Sleep mode IDD | HSI, AHB prescaler; 16 MHz; all peripherals enabled; TA = 25 °C, VDD = 3.3 V; add 0.8 mA per enabled ADC analog part | typ 3.2 mA | 49 |
| Supply current in Sleep mode IDD | HSI, AHB prescaler; 16 MHz; all peripherals disabled; TA = 25 °C, VDD = 3.3 V | typ 1.2 mA | 49 |
| Supply current in Sleep mode IDD | HSI, AHB prescaler; 8 MHz; all peripherals enabled; TA = 25 °C, VDD = 3.3 V; add 0.8 mA per enabled ADC analog part | typ 1.6 mA | 49 |
| Supply current in Sleep mode IDD | HSI, AHB prescaler; 8 MHz; all peripherals disabled; TA = 25 °C, VDD = 3.3 V | typ 0.6 mA | 49 |
| Supply current in Sleep mode IDD | HSI, AHB prescaler; 4 MHz; all peripherals enabled; TA = 25 °C, VDD = 3.3 V; add 0.8 mA per enabled ADC analog part | typ 1 mA | 49 |
| Supply current in Sleep mode IDD | HSI, AHB prescaler; 4 MHz; all peripherals disabled; TA = 25 °C, VDD = 3.3 V | typ 0.5 mA | 49 |
| Supply current in Sleep mode IDD | HSI, AHB prescaler; 2 MHz; all peripherals enabled; TA = 25 °C, VDD = 3.3 V; add 0.8 mA per enabled ADC analog part | typ 0.72 mA | 49 |
| Supply current in Sleep mode IDD | HSI, AHB prescaler; 2 MHz; all peripherals disabled; TA = 25 °C, VDD = 3.3 V | typ 0.47 mA | 49 |
| Supply current in Sleep mode IDD | HSI, AHB prescaler; 1 MHz; all peripherals enabled; TA = 25 °C, VDD = 3.3 V; add 0.8 mA per enabled ADC analog part | typ 0.56 mA | 49 |
| Supply current in Sleep mode IDD | HSI, AHB prescaler; 1 MHz; all peripherals disabled; TA = 25 °C, VDD = 3.3 V | typ 0.44 mA | 49 |
| Supply current in Sleep mode IDD | HSI, AHB prescaler; 500 kHz; all peripherals enabled; TA = 25 °C, VDD = 3.3 V; add 0.8 mA per enabled ADC analog part | typ 0.49 mA | 49 |
| Supply current in Sleep mode IDD | HSI, AHB prescaler; 500 kHz; all peripherals disabled; TA = 25 °C, VDD = 3.3 V | typ 0.42 mA | 49 |
| Supply current in Sleep mode IDD | HSI, AHB prescaler; 125 kHz; all peripherals enabled; TA = 25 °C, VDD = 3.3 V; add 0.8 mA per enabled ADC analog part | typ 0.43 mA | 49 |
| Supply current in Sleep mode IDD | HSI, AHB prescaler; 125 kHz; all peripherals disabled; TA = 25 °C, VDD = 3.3 V | typ 0.41 mA | 49 |
| TIM2 | APB1; 25 °C; fHCLK = 72 MHz, fAPB1 = fHCLK/2, fAPB2 = fHCLK; default prescaler | typ 1.2 mA | 50 |
| TIM3 | APB1; 25 °C; fHCLK = 72 MHz, fAPB1 = fHCLK/2, fAPB2 = fHCLK; default prescaler | typ 1.2 mA | 50 |
| TIM4 | APB1; 25 °C; fHCLK = 72 MHz, fAPB1 = fHCLK/2, fAPB2 = fHCLK; default prescaler | typ 0.9 mA | 50 |
| SPI2 | APB1; 25 °C; fHCLK = 72 MHz, fAPB1 = fHCLK/2, fAPB2 = fHCLK; default prescaler | typ 0.2 mA | 50 |
| USART2 | APB1; 25 °C; fHCLK = 72 MHz, fAPB1 = fHCLK/2, fAPB2 = fHCLK; default prescaler | typ 0.35 mA | 50 |
| USART3 | APB1; 25 °C; fHCLK = 72 MHz, fAPB1 = fHCLK/2, fAPB2 = fHCLK; default prescaler | typ 0.35 mA | 50 |
| I2C1 | APB1; 25 °C; fHCLK = 72 MHz, fAPB1 = fHCLK/2, fAPB2 = fHCLK; default prescaler | typ 0.39 mA | 50 |
| I2C2 | APB1; 25 °C; fHCLK = 72 MHz, fAPB1 = fHCLK/2, fAPB2 = fHCLK; default prescaler | typ 0.39 mA | 50 |
| USB | APB1; 25 °C; fHCLK = 72 MHz, fAPB1 = fHCLK/2, fAPB2 = fHCLK; default prescaler | typ 0.65 mA | 50 |
| CAN | APB1; 25 °C; fHCLK = 72 MHz, fAPB1 = fHCLK/2, fAPB2 = fHCLK; default prescaler | typ 0.72 mA | 50 |
| GPIO A | APB2; 25 °C; fHCLK = 72 MHz, fAPB1 = fHCLK/2, fAPB2 = fHCLK; default prescaler | typ 0.47 mA | 50 |
| GPIO B | APB2; 25 °C; fHCLK = 72 MHz, fAPB1 = fHCLK/2, fAPB2 = fHCLK; default prescaler | typ 0.47 mA | 50 |
| GPIO C | APB2; 25 °C; fHCLK = 72 MHz, fAPB1 = fHCLK/2, fAPB2 = fHCLK; default prescaler | typ 0.47 mA | 50 |
| GPIO D | APB2; 25 °C; fHCLK = 72 MHz, fAPB1 = fHCLK/2, fAPB2 = fHCLK; default prescaler | typ 0.47 mA | 50 |
| GPIO E | APB2; 25 °C; fHCLK = 72 MHz, fAPB1 = fHCLK/2, fAPB2 = fHCLK; default prescaler | typ 0.47 mA | 50 |
| ADC1 | APB2; 25 °C; fHCLK = 56 MHz, fAPB1 = fHCLK/2, fAPB2 = fHCLK, fADCCLK = fAPB2/4; ADON = 1 | typ 1.81 mA | 50 |
| ADC2 | APB2; 25 °C; fHCLK = 56 MHz, fAPB1 = fHCLK/2, fAPB2 = fHCLK, fADCCLK = fAPB2/4; ADON = 1 | typ 1.78 mA | 50 |
| TIM1 | APB2; 25 °C; fHCLK = 72 MHz, fAPB1 = fHCLK/2, fAPB2 = fHCLK; default prescaler | typ 1.6 mA | 50 |
| SPI1 | APB2; 25 °C; fHCLK = 72 MHz, fAPB1 = fHCLK/2, fAPB2 = fHCLK; default prescaler | typ 0.43 mA | 50 |
| USART1 | APB2; 25 °C; fHCLK = 72 MHz, fAPB1 = fHCLK/2, fAPB2 = fHCLK; default prescaler | typ 0.85 mA | 50 |
| Oscillator frequency fOSC_IN | min 4 · typ 8 · max 16 MHz | 53 | |
| Feedback resistor RF | typ 200 kΩ | 53 | |
| Recommended load capacitance versus equivalent serial resistance of the crystal (RS) C | RS = 30 Ω | typ 30 pF | 53 |
| HSE driving current i2 | VDD = 3.3 V, VIN = VSS with 30 pF load | max 1 mA | 53 |
| Oscillator transconductance gm | Startup | min 25 mA/V | 53 |
| startup time tSU(HSE) | VDD is stabilized | typ 2 ms | 53 |
| Feedback resistor RF | typ 5 M | 54 | |
| Recommended load capacitance versus equivalent serial resistance of the crystal (RS) C | RS = 30 K | max 15 pF | 54 |
| LSE driving current I2 | VDD = 3.3 V, VIN = VSS | max 1.4 uA | 54 |
| Oscillator transconductance gm | min 5 uA/V | 54 | |
| Startup time tSU(LSE) | VDD is stabilized, TA = 50 °C | typ 1.5 s | 54 |
| Startup time tSU(LSE) | VDD is stabilized, TA = 25 °C | typ 2.5 s | 54 |
| Startup time tSU(LSE) | VDD is stabilized, TA = 10 °C | typ 4 s | 54 |
| Startup time tSU(LSE) | VDD is stabilized, TA = 0 °C | typ 6 s | 54 |
| Startup time tSU(LSE) | VDD is stabilized, TA = -10 °C | typ 10 s | 54 |
| Startup time tSU(LSE) | VDD is stabilized, TA = -20 °C | typ 17 s | 54 |
| Startup time tSU(LSE) | VDD is stabilized, TA = -30 °C | typ 32 s | 54 |
| Startup time tSU(LSE) | VDD is stabilized, TA = -40 °C | typ 60 s | 54 |
| Frequency fLSI | VDD = 3 V, TA = –40 to 105 °C | min 30 · typ 40 · max 60 kHz | 56 |
| LSI oscillator startup time tsu(LSI) | VDD = 3 V, TA = –40 to 105 °C | max 85 us | 56 |
| LSI oscillator power consumption IDD(LSI) | VDD = 3 V, TA = –40 to 105 °C | typ 0.65 · max 1.2 uA | 56 |
| Wakeup from Sleep mode tWUSLEEP | typ 1.8 us | 57 | |
| Wakeup from Stop mode (regulator in run mode) tWUSTOP | typ 3.6 us | 57 | |
| Wakeup from Stop mode (regulator in low power mode) tWUSTOP | typ 5.4 us | 57 | |
| Wakeup from Standby mode tWUSTDBY | typ 50 us | 57 | |
| PLL input clock fPLL_IN | min 1 · typ 8 · max 25 MHz | 57 | |
| PLL input clock duty cycle fPLL_IN | min 40 · max 60 % | 57 | |
| PLL multiplier output clock fPLL_OUT | min 16 · max 72 MHz | 57 | |
| PLL lock time tLOCK | max 200 us | 57 | |
| Cycle-to-cycle jitter Jitter | max 300 ps | 57 | |
| 16-bit programming time tprog | TA = –40 to +105 °C | min 40 · typ 52.5 · max 70 us | 57 |
| Page (1 KB) erase time tERASE | TA = –40 to +105 °C | min 20 · max 40 ms | 57 |
| Mass erase time tME | TA = –40 to +105 °C | min 20 · max 40 ms | 57 |
| Supply current IDD | Read mode, fHCLK = 72 MHz with 2 wait states, VDD = 3.3 V | max 20 mA | 58 |
| Supply current IDD | Write / Erase modes, fHCLK = 72 MHz, VDD = 3.3 V | max 5 mA | 58 |
| Supply current IDD | Power-down mode / Halt, VDD = 3.0 to 3.6 V | max 50 uA | 58 |
| Programming voltage Vprog | min 2 · max 3.6 V | 58 | |
| Endurance NEND | TA = –40 to +85 °C (6 suffix versions) | min 10 kcycles | 58 |
| Data retention tRET | 1 kcycle at TA = 85 °C | min 30 Years | 58 |
| Data retention tRET | 1 kcycle at TA = 105 °C | min 10 Years | 58 |
| Data retention tRET | 10 kcycles at TA = 55 °C | min 20 Years | 58 |
| Electrostatic discharge voltage (human body model) VESD(HBM) | TA = +25 °C, conforming to JESD22-A114; Class 2 | max 2000 V | 60 |
| Electrostatic discharge voltage (charge device model) VESD(CDM) | TA = +25 °C, conforming to ANSI/ESD STM5.3.1; Class II | max 500 V | 60 |
| Output low level voltage for an I/O pin when 8 pins are sunk at same time VOL | CMOS port, IIO = +8 mA, 2.7 V < VDD < 3.6 V | max 0.4 V | 66 |
| Output low level voltage for an I/O pin when 8 pins are sunk at same time VOL | TTL port, IIO = +8 mA, 2.7 V < VDD < 3.6 V | max 0.4 V | 66 |
| Output high level voltage for an I/O pin when 8 pins are sourced at same time VOH | TTL port, IIO = +8 mA, 2.7 V < VDD < 3.6 V | min 2.4 V | 66 |
| Output low level voltage for an I/O pin when 8 pins are sunk at same time VOL | IIO = +20 mA, 2.7 V < VDD < 3.6 V | max 1.3 V | 66 |
| Output low level voltage for an I/O pin when 8 pins are sunk at same time VOL | IIO = +6 mA, 2 V < VDD < 2.7 V | max 0.4 V | 66 |
| Maximum frequency fmax(IO)out | MODEx[1:0] = 10, CL = 50 pF, VDD = 2 V to 3.6 V | max 2 MHz | 67 |
| Output high to low level fall time tf(IO)out | MODEx[1:0] = 10, CL = 50 pF, VDD = 2 V to 3.6 V | max 125 ns | 67 |
| Output low to high level rise time tr(IO)out | MODEx[1:0] = 10, CL = 50 pF, VDD = 2 V to 3.6 V | max 125 ns | 67 |
| Maximum frequency fmax(IO)out | MODEx[1:0] = 01, CL = 50 pF, VDD = 2 V to 3.6 V | max 10 MHz | 67 |
| Output high to low level fall time tf(IO)out | MODEx[1:0] = 01, CL = 50 pF, VDD = 2 V to 3.6 V | max 25 ns | 67 |
| Output low to high level rise time tr(IO)out | MODEx[1:0] = 01, CL = 50 pF, VDD = 2 V to 3.6 V | max 25 ns | 67 |
| Maximum frequency Fmax(IO)out | MODEx[1:0] = 11, CL = 30 pF, VDD = 2.7 V to 3.6 V | max 50 MHz | 67 |
| Maximum frequency Fmax(IO)out | MODEx[1:0] = 11, CL = 50 pF, VDD = 2.7 V to 3.6 V | max 30 MHz | 67 |
| Maximum frequency Fmax(IO)out | MODEx[1:0] = 11, CL = 50 pF, VDD = 2 V to 2.7 V | max 20 MHz | 67 |
| Output high to low level fall time tf(IO)out | MODEx[1:0] = 11, CL = 30 pF, VDD = 2.7 V to 3.6 V | max 5 ns | 67 |
| Output high to low level fall time tf(IO)out | MODEx[1:0] = 11, CL = 50 pF, VDD = 2.7 V to 3.6 V | max 8 ns | 67 |
| Output high to low level fall time tf(IO)out | MODEx[1:0] = 11, CL = 50 pF, VDD = 2 V to 2.7 V | max 12 ns | 67 |
| Output low to high level rise time tr(IO)out | MODEx[1:0] = 11, CL = 30 pF, VDD = 2.7 V to 3.6 V | max 5 ns | 67 |
| Output low to high level rise time tr(IO)out | MODEx[1:0] = 11, CL = 50 pF, VDD = 2.7 V to 3.6 V | max 8 ns | 67 |
| Output low to high level rise time tr(IO)out | MODEx[1:0] = 11, CL = 50 pF, VDD = 2 V to 2.7 V | max 12 ns | 67 |
| Pulse width of external signals detected by the EXTI controller tEXTIpw | min 10 ns | 67 | |
| USB operating voltage VDD | min 3 · max 3.6 V | 75 | |
| Differential input sensitivity VDI | I(USBDP, USBDM) | min 0.2 V | 75 |
| Differential common mode range VCM | Includes VDI range | min 0.8 · max 2.5 V | 75 |
| Single ended receiver threshold VSE | min 1.3 · max 2 V | 75 | |
| Static output level low VOL | RL of 1.5 k to 3.6 V | max 0.3 V | 75 |
| Static output level high VOH | RL of 15 k to VSS | min 2.8 · max 3.6 V | 75 |
| Rise time tr | CL = 50 pF | min 4 · max 20 ns | 75 |
| Fall time tf | CL = 50 pF | min 4 · max 20 ns | 75 |
| Rise/ fall time matching trfm | tr/tf | min 90 · max 110 % | 75 |
| Output signal crossover voltage VCRS | min 1.3 · max 2 V | 75 | |
| Power supply VDDA | min 2.4 · max 3.6 V | 76 | |
| Positive reference voltage VREF+ | Internally connected to VDDA in LQFP packages; maximum VDDA | min 2.4 V | 76 |
| Current on the VREF input pin IVREF | typ 160 · max 220 uA | 76 | |
| ADC clock frequency fADC | min 0.6 · max 14 MHz | 76 | |
| Sampling rate fS | min 0.05 · max 1 MHz | 76 | |
| External trigger frequency fTRIG | fADC = 14 MHz | max 823 kHz | 76 |
| External trigger frequency fTRIG | max 17 1/fADC | 76 | |
| Conversion voltage range VAIN | Minimum 0 (VSSA or VREF- tied to ground); maximum VREF+ | min 0 V | 76 |
| External input impedance RAIN | See Equation 1 and Table 47 for details | max 50 k | 76 |
| Sampling switch resistance RADC | max 1 k | 76 | |
| Internal sample and hold capacitor CADC | max 8 pF | 76 | |
| Calibration time tCAL | fADC = 14 MHz | typ 5.9 us | 76 |
| Calibration time tCAL | typ 83 1/fADC | 76 | |
| Injection trigger conversion latency tlat | fADC = 14 MHz; add 1/fPCLK2 for external triggers | max 0.214 us | 76 |
| Injection trigger conversion latency tlat | Add 1/fPCLK2 for external triggers | max 3 1/fADC | 76 |
| Regular trigger conversion latency tlatr | fADC = 14 MHz; add 1/fPCLK2 for external triggers | max 0.143 us | 76 |
| Regular trigger conversion latency tlatr | Add 1/fPCLK2 for external triggers | max 2 1/fADC | 76 |
| Sampling time tS | fADC = 14 MHz | min 0.107 · max 17.1 us | 76 |
| Sampling time tS | min 1.5 · max 239.5 1/fADC | 76 | |
| Power-up time tSTAB | min 0 · typ 0 · max 1 us | 76 | |
| Total conversion time (including sampling time) tCONV | fADC = 14 MHz | min 1 · max 18 us | 76 |
| Total conversion time (including sampling time) tCONV | tS for sampling +12.5 for successive approximation | min 14 · max 252 1/fADC | 76 |
Pins, by the datasheet
32- 1 VBAT
- Backup supply. · p. 28
- 2 PC13-TAMPER-RTC
- PC13 GPIO or TAMPER-RTC. · p. 22
- 3 PC14-OSC32_IN
- PC14 GPIO or OSC32_IN. · p. 28
- 4 PC15-OSC32_OUT
- PC15 GPIO or OSC32_OUT. · p. 22
- 5 OSC_IN
- Oscillator input; remap PD0. · p. 28
- 6 OSC_OUT
- Oscillator output; remap PD1. · p. 28
- 7 NRST
- Reset. · p. 28
- 8 VSSA
- Analog ground. · p. 28
- 9 VDDA
- Analog supply. · p. 28
- 10 PA0-WKUP
- PA0 GPIO; WKUP, USART2_CTS, ADC12_IN0 or TIM2_CH1_ETR. · p. 29
- 11 PA1
- PA1 GPIO; USART2_RTS, ADC12_IN1 or TIM2_CH2. · p. 29
- 12 PA2
- PA2 GPIO; USART2_TX, ADC12_IN2 or TIM2_CH3. · p. 29
- 13 PA3
- PA3 GPIO; USART2_RX, ADC12_IN3 or TIM2_CH4. · p. 29
- 14 PA4
- PA4 GPIO; SPI1_NSS, USART2_CK or ADC12_IN4. · p. 29
- 15 PA5
- PA5 GPIO; SPI1_SCK or ADC12_IN5. · p. 29
- 16 PA6
- PA6 GPIO; SPI1_MISO, ADC12_IN6 or TIM3_CH1; remap TIM1_BKIN. · p. 29
- 17 PA7
- PA7 GPIO; SPI1_MOSI, ADC12_IN7 or TIM3_CH2; remap TIM1_CH1N. · p. 29
- 18 PB0
- PB0 GPIO; ADC12_IN8 or TIM3_CH3; remap TIM1_CH2N. · p. 29
- 19 PB1
- PB1 GPIO; ADC12_IN9 or TIM3_CH4; remap TIM1_CH3N. · p. 29
- 20 PB2
- Five volt tolerant PB2/BOOT1. · p. 30
- 21 PB10
- Five volt tolerant PB10 GPIO; I2C2_SCL or USART3_TX; remap TIM2_CH3. · p. 30
- 22 PB11
- Five volt tolerant PB11 GPIO; I2C2_SDA or USART3_RX; remap TIM2_CH4. · p. 30
- 23 VSS_1
- Ground. · p. 30
- 24 VDD_1
- Main supply. · p. 30
- 25 PB12
- Five volt tolerant PB12 GPIO; SPI2_NSS, I2C2_SMBAl, USART3_CK or TIM1_BKIN. · p. 30
- 26 PB13
- Five volt tolerant PB13 GPIO; SPI2_SCK, USART3_CTS or TIM1_CH1N. · p. 30
- 27 PB14
- Five volt tolerant PB14 GPIO; SPI2_MISO, USART3_RTS or TIM1_CH2N. · p. 30
- 28 PB15
- Five volt tolerant PB15 GPIO; SPI2_MOSI or TIM1_CH3N. · p. 30
- 45 PB8
- 5 V tolerant GPIO; TIM4_CH3; remapped I2C1_SCL or CANRX. · p. 33
- 46 PB9
- 5 V tolerant GPIO; TIM4_CH4; remapped I2C1_SDA or CANTX. · p. 33
- 47 VSS_3
- Ground supply pin; connect to external ground. · p. 33
- 48 VDD_3
- Main supply pin; connect to the external supply in the permitted range. · p. 33
Parameters
18- ADC (Bit)
- 12bit
- CPU Core
- ARM Cortex-M3
- CPU Maximum Speed
- 72MHz
- Core Size
- 32 Bit
- Current - Supply
- 36mA
- Current - Supply(Max)
- 50mA
- Junction Temperature(Max)
- 150℃
- Number of I/O
- 37
- Operating Temperature
- -40℃~+105℃
- Oscillator Type
- Built-in
- Output Current per Pin(Max)
- 25mA
- Program Memory Type
- FLASH
- Program Storage Size
- 128KB
- RAM Size
- 20KB
- Standby Current
- 24uA
- Thermal Resistance(Junction to Ambient)
- 55℃/W
- Voltage - Supply
- 1.8V~3.6V
- Voltage - Supply(Absolute Max)
- 4V
Order codes
1- STM32F103CBT6LCSC C8304
Pinout
48| Pin | Name | Type |
|---|---|---|
| 1 | VBAT | Power in |
| 2 | PC13 | Input/output |
| 3 | PC14 | Input/output |
| 4 | PC15 | Input/output |
| 5 | PD0 | Input/output |
| 6 | PD1 | Input/output |
| 7 | NRST | Input |
| 8 | VSSA | Power in |
| 9 | VDDA | Power in |
| 10 | PA0 | Input/output |
| 11 | PA1 | Input/output |
| 12 | PA2 | Input/output |
| 13 | PA3 | Input/output |
| 14 | PA4 | Input/output |
| 15 | PA5 | Input/output |
| 16 | PA6 | Input/output |
| 17 | PA7 | Input/output |
| 18 | PB0 | Input/output |
| 19 | PB1 | Input/output |
| 20 | PB2 | Input/output |
| 21 | PB10 | Input/output |
| 22 | PB11 | Input/output |
| 23 | VSS | Power in |
| 24 | VDD | Power in |
| 25 | PB12 | Input/output |
| 26 | PB13 | Input/output |
| 27 | PB14 | Input/output |
| 28 | PB15 | Input/output |
| 29 | PA8 | Input/output |
| 30 | PA9 | Input/output |
| 31 | PA10 | Input/output |
| 32 | PA11 | Input/output |
| 33 | PA12 | Input/output |
| 34 | PA13 | Input/output |
| 35 | VSS | Passive |
| 36 | VDD | Power in |
| 37 | PA14 | Input/output |
| 38 | PA15 | Input/output |
| 39 | PB3 | Input/output |
| 40 | PB4 | Input/output |
| 41 | PB5 | Input/output |
| 42 | PB6 | Input/output |
| 43 | PB7 | Input/output |
| 44 | BOOT0 | Input |
| 45 | PB8 | Input/output |
| 46 | PB9 | Input/output |
| 47 | VSS | Passive |
| 48 | VDD | Power in |
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Is there a KiCad symbol and footprint for the STM32F103CBT6?
Yes. The symbol is MCU_ST_STM32F1:STM32F103CBTx and the footprint Package_QFP:LQFP-48_7x7mm_P0.5mm, both drawn on this page. PCBKit places them on a board for you when you design with it.
What package is the STM32F103CBT6?
LQFP-48(7x7), with 48 pins. Its footprint is drawn on this page.
Where is the STM32F103CBT6 datasheet?
STMicroelectronics publishes it: the Datasheet link on this page opens it.
Where can I order the STM32F103CBT6?
JLCPCB lists it as part C8304, with 3,849 in stock; the sellers' links on this page open their listings.
What can replace the STM32F103CBT6?
Parts like it in the library: the STM32F103C8T6 by STMicroelectronics, the GD32F303CCT6 by GigaDevice, the GD32F103C8T6 by GigaDevice and the GD32F103CBT6 by GigaDevice. Check their datasheets: a part that fits the footprint may still differ in its ratings.
Which open-source boards use the STM32F103CBT6?
92 boards in 69 repositories on GitHub; the most starred are listed on this page, with their KiCad files.
Parts like it
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