| Drain-source voltage VDS | | max -30 V | 2 |
| Gate-source voltage VGS | | min -20 · max 20 V | 2 |
| Drain current (continuous) at Tpcb = 25 °C ID | Tpcb = 25 °C | max -9 A | 2 |
| Drain current (continuous) at Tpcb = 100 °C ID | Tpcb = 100 °C | max -5.9 A | 2 |
| Drain current (pulsed) IDM | Pulse width limited by safe operating area. | max -36 A | 2 |
| Total dissipation at Tpcb=25 °C PTOT | Tpcb=25 °C | max 3 W | 2 |
| Storage temperature range Tstg | | min -55 · max 150 °C | 2 |
| Operating junction temperature range Tj | | min -55 · max 150 °C | 2 |
| Thermal resistance junction-case Rthj-case | PowerFLAT™ 3.3x3.3 | max 2.5 °C/W | 2 |
| Thermal resistance junction-pcb Rthj-pcb | PowerFLAT™ 3.3x3.3; When mounted on FR-4 board of 1inch², 2oz Cu t < 10 s | max 42 °C/W | 2 |
| Drain-source breakdown voltage V(BR)DSS | TC = 25 °C; VGS = 0 V, ID = -1 mA | min -30 V | 3 |
| Zero gate voltage drain current IDSS | TC = 25 °C; VGS = 0 V, VDS = -30 V | max -1 uA | 3 |
| Zero gate voltage drain current IDSS | VGS = 0 V, VDS = -30 V, TC = 125 °C; Defined by design, not subject to production test. | max -10 uA | 3 |
| Gate-body leakage current IGSS | TC = 25 °C; VDS = 0 V, VGS = ± 20 V | max 100 nA | 3 |
| Gate threshold voltage VGS(th) | TC = 25 °C; VDS = VGS, ID = -250 uA | min -1 V | 3 |
| Static drain-source on-resistance RDS(on) | TC = 25 °C; VGS = -10 V, ID =-4.5 A | typ 12 · max 15 mΩ | 3 |
| Static drain-source on-resistance RDS(on) | TC = 25 °C; VGS = -4.5 V, ID = -4.5 A | typ 18 · max 22.5 mΩ | 3 |
| Input capacitance Ciss | TC = 25 °C; VDS = -25 V, f = 1 MHz, VGS = 0 V | typ 2615 pF | 3 |
| Output capacitance Coss | TC = 25 °C; VDS = -25 V, f = 1 MHz, VGS = 0 V | typ 340 pF | 3 |
| Reverse transfer capacitance Crss | TC = 25 °C; VDS = -25 V, f = 1 MHz, VGS = 0 V | typ 235 pF | 3 |
| Total gate charge Qg | TC = 25 °C; VDD = -15 V, ID = -9 A, VGS = -4.5 to 0 V; see Figure 13. Gate charge test circuit | typ 24 nC | 3 |
| Gate-source charge Qgs | TC = 25 °C; VDD = -15 V, ID = -9 A, VGS = -4.5 to 0 V; see Figure 13. Gate charge test circuit | typ 9 nC | 3 |
| Gate-drain charge Qgd | TC = 25 °C; VDD = -15 V, ID = -9 A, VGS = -4.5 to 0 V; see Figure 13. Gate charge test circuit | typ 8 nC | 3 |
| Turn-on delay time td(on) | TC = 25 °C; VDD = -15 V, ID = -4.5 A, RG = 4.7 Ω, VGS = -10 V; see Figure 12. Switching times test circuit for resistive load | typ 13.2 ns | 3 |
| Rise time tr | TC = 25 °C; VDD = -15 V, ID = -4.5 A, RG = 4.7 Ω, VGS = -10 V; see Figure 12. Switching times test circuit for resistive load | typ 93 ns | 3 |
| Turn-off delay time td(off) | TC = 25 °C; VDD = -15 V, ID = -4.5 A, RG = 4.7 Ω, VGS = -10 V; see Figure 12. Switching times test circuit for resistive load | typ 50 ns | 3 |
| Fall time tf | TC = 25 °C; VDD = -15 V, ID = -4.5 A, RG = 4.7 Ω, VGS = -10 V; see Figure 12. Switching times test circuit for resistive load | typ 18 ns | 3 |
| Forward on voltage VSD | TC = 25 °C; ISD = -9 A, VGS = 0 V | max -1.1 V | 3 |